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RAM )nless "#e s)!!ly 0$l"age is *i"#in "#e s!e%i&ied"$leran%es. T#e RESET signal is "#ere&$re genera"ed +y "#e!$*er s)!!ly ($d)le and (ade a0aila+le "$ all %$(!)"er ($d)les"#r$)g# "#e +)s. Sin%e I !lanned li""le )se $& (agne"i% (edia' I (ade n$s!e%ial arrange(en"s &$r /)i%2 da"a "rans&er "$ $r &r$( "#e%$(!)"er (e($ry. T#e %$(!)"er #as n$ DMA %a!a+ili"y and "#eMC,1 is #ard*ired "$ +e "#e +)s (as"er all "#e "i(e. In any%ase' "#e MC,1 is &as" en$)g# "$ #andle "#e da"a s"rea( "$$r &r$( a &l$!!y-dis% %$n"r$ller $n i"s $*n' *i"#$)" "#e aid $&a DMA %$n"r$ller. In "#e %ase $& a DSP a!!li%a"i$n *i"# a"y!i%al 1 2:; sa(!ling &re/)en%y' n$" )sing a DMA %$n"r$ller+rings a !enal"y $& $nly 1< $r less in "er(s $& CPU "i(e.Finally' &$r (e($ry-"$-(e($ry "rans&ers' "#e MC,1 L$$!-M$deins"r)%"i$ns are al($s" as &as" as a DMA %$n"r$ller. In a 1, +i" (i%r$%$(!)"er design is &re/)en"ly %$n0enien""$ )se s"andard +i" !eri!#eral de0i%es +e%a)se "#ey arein-e!esi0e and *idely a0aila+le. Sin%e "#ese are )s)ally "$$sl$* "$ in"er&a%e dire%"ly *i"# a #ig# s!eed 1, +i"(i%r$!r$%ess$r +)s' addi"i$nal in"er&a%e %ir%)i"s are re/)ired.

T#e la""er are !la%ed $n "#e !eri!#eral ($d)les *#ere re/)iredd)e "$ "#e li(i"ed n)(+er $& %$nd)%"$rs a0aila+le $n "#e%$(!)"er +)s.

7. MC,1 O!era"i$n-------------------- e&$re des%ri+ing "#e 0ari$)s %$(!)"er ($d)les' a +rie&des%ri!"i$n $& "#e MC,1 CPU $!era"i$n *ill +e (ade. T#isin"r$d)%"i$n is in"ended &$r "#e reader "#a" #as a +asi%2n$*ledge a+$)" "#e $!era"i$n $& a (i%r$%$(!)"er' in !ar"i%)lar$& a +i" (i%r$!r$%ess$r' +)" #as li""le $r n$ e!erien%e *i"#

1, +i" (i%r$!r$%ess$rs. T#e MC,1 #as a 1, +i" da"a +)s and 67 +i" in"ernalregis"ers. All addresses are in"ernally 67 +i"s l$ng and arere&erred "$ +i" +y"es' %$rres!$nding "$ an addressing range$& 767 $r 4 "era-+y"es. :$*e0er' "#e )!!er address +i"s aren$" a0aila+le e"ernally >"#ere are n$" en$)g# !ins $n "#e!a%2age?' and "#e addressing range is li(i"ed "$ 774 $r 1,(ega+y"es. T#ere are $nly 76 address lines' A1 "$ A76' sin%e"#e 1, +i" *ide +)s %an a%%ess "*$ +y"es a" a "i(e. In "#e %ase$& a single +y"e a%%ess' $nly #al& $& "#e a0aila+le da"a linesare )sed' ei"#er "#e l$*er da"a lines D "$ D9 >$dd address?$r "#e )!!er da"a lines D "$ D1@ >e0en address?. 1, +i" da"a *$rds are al*ays addressed +y an e0en address>LS=?. A *$rd a%%ess $n an $dd address >LS=1? *$)ld re/)ire"*$ se!ara"e +)s %y%les. T#e MC, series $& (i%r$!r$%ess$rsd$es n$" "$lera"e *$rd a%%esses $n $dd addresses' in %$n"ras"*i"# s$(e $"#er 1, +i" (i%r$!r$%ess$rs' and a %all "$ "#eaddress err$r #andling r$)"ine is genera"ed. All MC,1ins"r)%"i$n %$des are ei"#er $ne $r an in"eger n)(+er $& 1, +i"*$rds and "#e !r$gra( %$)n"er is al*ays in%re(en"ed in s"e!s $&7' 4' , $r $"#er e0en n)(+ers. A "y!i%al (e($ry a%%ess >read $r *ri"e? %y%le is s#$*n $nFig.1. T#e address lines A1 "$ A76 are se" &irs"' &$ll$*ed +y

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"#e Address S"r$+e >AS? signal g$ing l$*. T*$ da"a s"r$+elines' U!!er Da"a S"r$+e >UDS? and L$*er Da"a S"r$+e >LDS?sele%" "#e +y"e "$ +e a%%essed. In "#e %ase $& a *$rd a%%ess'+$"# UDS and LDS are asser"ed g$ing l$* si()l"ane$)sly. In"#e %ase $& a *ri"e %y%le' "#e ReadBri"e >RB? signal g$esl$* +e&$re "#e da"a s"r$+es. T#e (i%r$!r$%ess$r n$* *ai"s &$r"#e read $r *ri"e $!era"i$n "$ +e %$(!le"ed. #en "#e $!era"i$nis %$(!le"ed' "#e (e($ry signals "#is "$ "#e (i%r$!r$%ess$r +y!)lling "#e Da"a Trans&er ACn$*ledge >DTAC? line l$*. I& n$(e($ry is a0aila+le a" "#e s!e%i&ied address' an e"ernal l$gi%is )s)ally )sed "$ a%"i0a"e "#e )s ERR$r line >ERR?. T#e MC,1 s)!!lies "#ree addi"i$nal signals' na(ed&)n%"i$n %$des FC' FC1 and FC7' "$ +e""er des%ri+e "#e "y!e $&"#e +)s %y%le !er&$r(ed8 ins"r)%"i$n &e"%#' da"a read $r *ri"ein +$"# )ser and s)!er0is$r ($des $r in"err)!" a%2n$*ledge.F)n%"i$n %$de signals #a0e "$ +e de%$ded "$ge"#er *i"# "#eaddress lines A1 "$ A76 "$ sele%" de0i%es "ied $n "#e +)s. T#e MC,1 a%%e!"s se0en di&&eren" in"err)!"s *i"#di&&ering !ri$ri"ies. T#e #ig#es" !ri$ri"y in"err)!" is n$"(as2a+le >NMI? *#ile "#e $"#er in"err)!" le0els %an +e in#i+i"ed

+y se""ing +i"s in "#e s"a")s regis"er. T#e se0en in"err)!"re/)es"s are de%$ded &r$( "#ree in!)" lines8 IPL' IPL1 andIPL7' "$ red)%e "#e n)(+er $& !ins $n "#e (i%r$!r$%ess$r!a%2age. An e"ernal !ri$ri"y en%$der >)s)ally 94LS14? isre/)ired in ($s" a!!li%a"i$ns. CLOC is $+0i$)sly re/)ired +y "#e (i%r$!r$%ess$r i"sel&.RESET and :ALT are +$"# in!)"s8 "$ rese" "#e (i%r$!r$%ess$r'and $)"!)"s8 "$ rese" "#e !eri!#erals )nder !r$gra( %$n"r$l andsignal a d$)+le +)s err$r. Addi"i$nal %$n"r$l lines in%l)de anin"er&a%e &$r "#e sl$* , series !eri!#erals >PA' E' MA?and +)s re/)es" lines &$r DMA >R' G' GAC?. M$s" $& "#e (i%r$!r$%ess$r signals are +r$)g#" "$ "#e%$(!)"er +)s *i"#$)" )sing +)&&ers. T#e la""er are !la%ed $n

"#e in!)"s $& "#e 0ari$)s ($d)les "$ red)%e +)s l$ading. T#ea%")al +)s %$nne%"i$ns $n a ,4 !$le 5E)r$-%ard5 %$nne%"$r ares#$*n $n Fig.7.

6. Pr$%ess$r $ard------------------ T#e !r$%ess$r +$ard in%l)des "#e MC,1 %#i! and%$rres!$nding s)!!$r" %ir%)i"ry' )! "$ 67 2+y"es $& EPROM%$n"aining "#e $!era"ing sys"e(' ,4 2+y"es $& n$n0$la"ile RAMand "#e real-"i(e %alenderB%l$%2. T#e %$rres!$nding %ir%)i"diagra( is s#$*n $n Fig.6 and Fig.4. T#e (i%r$!r$%ess$r s)!!$r" %ir%)i"s in%l)de a %l$%2genera"$r' a +)s-err$r "i(er' an in"err)!"-re/)es" !ri$ri"yen%$der' an in"err)!" a)"$-0e%"$r l$gi%' a rese" l$gi% and andaddress de%$der &$r "#e re(aining $n-+$ard de0i%es. T#e %l$%2genera"$r is a si(!le %rys"al $s%illa"$r +)il" ar$)nd a CMOS>:C? ga"e' sin%e "#ere are n$ s!e%ial re/)ire(en"s regardingi"s a%%)ra%y. T#e n$(inal %l$%2 &re/)en%y is 1 M:;. Addi"i$nal:C ga"es are )sed "$ +)&&er "#e $s%illa"$r $)"!)". T#e +)s-err$r "i(er ($ni"$rs "#e AS signal. In "#e %ase$& a +)s-err$r n$ de0i%e *ill ans*er *i"# a DTAC $r PA "$

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"er(ina"e "#e +)s %y%le and "#e AS %$)ld re(ain l$*inde&ini"ely. :$*e0er' "#e AS is als$ )sed "$ rese" "#e+)s-err$r "i(er. I& "#e AS re(ains l$* &$r ($re "#an 17 %l$%2%y%les' "#e +)s-err$r "i(e$)" %$)n"er >LS66? *ill asser" "#eERR signal %$((anding "#e MC,1 "$ %all "#e +)s-err$r#andling r$)"ine. T#e in"err)!"-re/)es" !ri$ri"y en%$der is si(!ly a LS14*i"# !)ll-)! resis"$rs $n i"s a%"i0e-l$* in!)"s' s$ "#a" ($rede0i%es re/)es"ing "#e sa(e le0el in"err)!" %an +e si(!ly*ired-$r. T#e MC,1 is )sed in "#e a)"$-0e%"$r ($de. T#ela""er is in0$2ed +y de%$ding "#e in"err)!"-a%2n$*ledge&)n%"i$n %$de >all "#ree FC $)"!)"s a" l$gi%al #ig#? andasser"ing "#e PA signal. T#e MC,1 (i%r$!r$%ess$r is rese" *#en +$"# RESET and:ALT lines are !)lled l$* si()l"ane$)sly &$r a s)&&i%ien"lyl$ng !eri$d $& "i(e8 a" leas" 1 %l$%2 %y%les d)ring n$r(al$!era"i$n +)" a" leas" 1 (illise%$nds a&"er !$*er-)!. T#ereas$n &$r "#is l$ng !$*er-)! rese" "i(e is easily e!lainedsin%e "#e MC,1 is a dyna(i% NMOS %ir%)i" in"ernally. T#edelay $& 1 (s is re/)ired &$r "#e in"ernal $n-%#i! s)+s"ra"e

+ias-genera"$r "$ a%#ie0e i"s &)ll $)"!)" 0$l"age $& a+$)" -6.T#e Main Rese" signal >MR?' s)!!lied &r$( "#e !$*er-s)!!ly($d)le' is a!!lied "#r$)g# $!en-%$lle%"$r ga"es "$ +$"# RESETand :ALT. T#e MC,1 RESET !in %an als$ +e an $!en-drain $)"!)"'a%"i0a"ed *#en ee%)"ing "#e RESET ins"r)%"i$n. T#e la""er *illn$" rese" "#e (i%r$!r$%ess$r +)" *ill dri0e "#e RESET !in l$*&$r 174 %l$%2 %y%les. T#is signal is (ade a0aila+le $n "#e%$(!)"er +)s and is )sed "$ rese" all !eri!#eral de0i%es. On "#e $"#er #and' "#e :ALT !in is dri0en l$* *#en ad$)+le +)s-err$r is de"e%"ed a&"er a s$&"*are %ras# $r #ard*are&ail)re. A d$)+le +)s-err$r +l$%2s "#e MC,1 "$ a0$idda(aging "#e (e($ry %$n"en" all$*ing s)+se/)en"

"r$)+les#$$"ing. A&"er a d$)+le +)s-err$r a rese" is re/)ired"$ res"ar" "#e MC,1. T#e address de%$der is )sed "$ sele%" "#e $n-+$ard(e($ries and !eri!#erals de%$ding "#e ($s" signi&i%an" addresslines and "$ ans*er *i"# a DTAC $r a PA signal. T#en$n0$la"ile CMOS RAM re/)ires an addi"i$nal de%$der %#i!>:C16? *#i%# re%ei0es "#e sa(e +a""ery-+a%2ed s)!!ly 0$l"ageas "#e RAM i"sel&. T#e de%$der is in#i+i"ed +y "#e MR signal"$ !r$"e%" "#e RAM %$n"en" d)ring !$*er-)! $r !$*er-d$*n. A single +i" *ide EPROM is )sed "$ s"$re "#e $!era"ingsys"e( s$&"*are. A +i" la"%# >LS694? and a se/)en%e genera"$r>LS1,4? are )sed "$ genera"e a 1, +i" da"a *$rd &$r "#eMC,1. Sin%e "#e "#is se/)en"ial +i" read $!era"i$n issl$*' "#e s$&"*are is %$!ied in"$ "#e $n-+$ard sys"e( RAMi((edia"ely a&"er rese". On%e in "#e RAM' "#e s$&"*are %an +eee%)"ed a" &)ll s!eed *i"# n$ !r$%ess$r *ai" s"a"es. T#e l$*er 1, 2+y"es $& "#e $n-+$ard sys"e( RAM areassigned "$ "#e s"a%2 +y "#e !resen" s$&"*are. In "#e %ase $& as$&"*are %ras# i" is )s)al &$r "#e s"a%2 "$ gr$* in an)n%$n"r$lled *ay. T#ere&$re "#e l$%a"i$ns i((edia"ely +el$*"#e s"a%2 area are n$" assigned "$ any de0i%e s$ "#a" an)n%$n"r$lled s"a%2 gr$*"# ends in a d$)+le +)s-err$r sa&ely+l$%2ing "#e MC,1.

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A 91@@ !arallel IBO !$r" >&as" CMOS 0ersi$n $& "#e!$!)lar 7@@? is )sed "$ in"er&a%e "#e 2ey+$ard and "#ereal-"i(e %l$%2 %#i!. T#e !arallel 2ey+$ard $)"!)" is %$nne%"ed"$ !$r" A' %$n&ig)red as a s"r$+ed in!)". P$r" is a s!are$)"!)". T#e re(aining +i"s $& !$r" C are )sed +$"# as in!)"sand as $)"!)"s "$ in"er&a%e "#e 4 real-"i(e %l$%2 %#i!. T#ela""er #as serial in!)"s and $)"!)"s. Cl$%2s and $"#er signalsare genera"ed +y s$&"*are. T#e 4 C#i! Sele%" >CS? in!)" is dri0en +y "#e MRsignal "$ !r$"e%" "#e %l$%2 %$)n" d)ring !$*er-)! $r !$*er-d$*n&$r "#e sa(e reas$n as "#e n$n0$la"ile RAM. T#e 4 #as an$n-%#i! $!en-drain in"err)!" $)"!)" *#ile "#e 2ey+$ardin"err)!"' genera"ed inside "#e 91@@' re/)ires an addi"i$nal"ransis"$r. C)rren" s$&"*are re/)ires "#e %l$%2 in"err)!" $nINT1 and "#e 2ey+$ard in"err)!" $n INT9' sele%"a+le "#r$)g#3)(!ers $n "#e !rin"ed %ir%)i" +$ard.

4. ide$ $ard

-------------- T#e 0ide$ +$ard in%l)des 17 2+y"es $& s!e%ial' d)al-!$r"0ide$ RAM' 0ide$ DBA %$n0er"er and "i(ing and in"er&a%e%ir%)i"s. T#e %ir%)i" diagra( $& "#e 0ide$ +$ard is s#$*n $nFig.@ and Fig.,. T#e (e($ry )sed in a 0ide$ in"er&a%e is +eing read%$n"in)$)sly "$ )!da"e "#e !i%")re dis!layed $n a CRT se0eral"i(es !er se%$nd. I& a (i%r$!r$%ess$r #as "$ a%%ess "#e sa(e(e($ry' &$r ea(!le "$ )!da"e "#e !i%")re' i" %an ei"#er *ai"&$r "#e #$ri;$n"al $r 0er"i%al re"ra%e !eri$d $r in"err)!" "#edis!lay read $!era"i$n dis")r+ing "#e !i%")re. General !)r!$sedyna(i% $r s"a"i% (e($ries are )s)ally n$" &as" en$)g# "$!r$0ide da"a &$r a #ig# res$l)"i$n 0ide$ signal genera"i$n and

+e a%%essed +y a &as" 1, +i" (i%r$!r$%ess$r a" "#e sa(e "i(e.On "#e $"#er #and' "r)e d)al-!$r" (e($ries *i"# "*$ %$(!le"elyinde!enden" a%%ess !$r"s are +$"# di&&i%)l" "$ (an)&a%")re ande!ensi0e. A &e* years ag$ se(i%$nd)%"$r (an)&a%")rers in0en"ed anal"erna"i0e s$l)"i$n "$ in%rease "#e da"a ra"e &r$( a dyna(i%(e($ry +)il" )sing $nly %$n0en"i$nal DRAM %#i! "e%#n$l$gy.D)ring any rand$( a%%ess read $r *ri"e $!era"i$n' inside adyna(i% RAM a *#$le r$* $& da"a >174 +i"s in a 7@, 2+i" RAM?is "rans&erred &r$( i"s s"$rage %ells "$ as (any re&res#a(!li&iers. T#is da"a %an n$" +e "rans&erred /)i%2ly $nly+e%a)se i" is %$(!le"ely i(!ra%"i%al "$ +)ild an IC #$)sing*i"# s$ (any !ins. :$*e0er' "#is da"a %an +e "rans&erred "$an$"#er %ir%)i" e&&i%ien"ly i& "#e la""er is l$%a"ed $n "#esa(e se(i%$nd)%"$r %#i!. D)al-!$r" dyna(i% (e($ries in%l)de $n-%#i! an addi"i$nals#i&" regis"er. A *#$le r$* $& +i"s %an +e "rans&erred &r$("#e (ain (e($ry array "$ "#e a)iliary s#i&" regis"er in $nesingle $!era"i$n' %alled a da"a-"rans&er %y%le and las"ing n$($re "#an an $rdinary da"a-a%%ess %y%le. A&"er s)%# ada"a-"rans&er %y%le "#e dyna(i% (e($ry %ir%)i"s and "#e s#i&"regis"er are %$(!le"ely inde!enden"8 "#e (i%r$!r$%ess$r %anrand$(ly a%%ess "#e da"a in "#e (ain (e($ry array >*i"# n$

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"i(ing !enal"ies? *#ile $"#er da"a is s#i&"ed $)" $& "#ea)iliary regis"er "$ genera"e "#e 0ide$ signal. Sin%e d)al-!$r" 0ide$ (e($ries are $nly slig#"ly ($ree!ensi0e "#an %$n0en"i$nal dyna(i% RAMs' "#ey are 0erya""ra%"i0e &$r any ne* 0ide$ (e($ry design. A da"a-"rans&er%y%le )s)ally #as "$ +e !er&$r(ed $n%e e0ery "ele0isi$n line8$n%e e0ery ,4 (i%r$se%$nds and i" "a2es less "#an 1< $& "#is"i(e. T#e (e($ry is "#ere&$re a0aila+le "$ "#e (i%r$!r$%ess$r&$r ($re "#an < $& "#e "$"al "i(e *i"# n$ delays $r dis")r+s"$ "#e genera"ed 0ide$. T#e des%ri+ed 0ide$ +$ard )ses &$)r 417,4 %#i!s *#i%# are$rgani;ed as ,42 +y 4 +i"s ea%#. Fr$( "#e (i%r$!r$%ess$r side"#e 0ide$ (e($ry is $rgani;ed as ,42 1, +i" *$rds' &r$( "#e0ide$ side "#ere are 172 !iels arranged in 7@, lines $& @17!iels ea%# and "#e in"ensi"y $& ea%# !iel is des%ri+ed *i"# +i"s $r 7@, !$ssi+le grey le0els. Ea%# 417,4 %#i! als$ #as&$)r 7@, +i" s#i&" regis"ers "#a" are all l$aded in a singleda"a-"rans&er %y%le $%%)rring d)ring "#e #$ri;$n"al re"ra%e!eri$d. D)ring "#e a%"i0e s%anning !eri$d' da"a is re"rie0edal"erna"i0ely &r$( "*$ s#i&" regis"er gr$)!s s$ "#a" "#e

!$si"i$n $& "#e @17 !iels $+"ained (a"%#es "#e (i%r$!r$%ess$r+y"e address enn)(era"i$n si(!li&ying and s!eeding-)! "#e"#e s$&"*are. All "#e "i(ing $& "#e genera"ed 0ide$ signal is deri0ed&r$( an $n-+$ard 17 M:; %rys"al $s%illa"$r' *#i%# dri0es adi0ider %#ain. T#e line !eri$d (a"%#es "#e s"andard T line!eri$d >,4 )s?. One T line %$nsis"s $& 9, !iels8 "*$ "#irds>@17 !iels? re!resen" "#e )se&)l s%an and "#e re(aining "#ird>7@, !iels? is le&" &$r "#e #$ri;$n"al re"ra%e and +la%2 edgesa" +$"# !i%")re sides. T#e n)(+er $& lines in a T &ra(e isslig#"ly larger "#an s"andard8 a &ra(e $& 67 lines *assele%"ed &$r si(!li%i"y. T$ a0$id &li%2er "#e s%anning is n$"in"erla%ed.

A" "#e end $& ea%# )se&)l s%an !eri$d "#e 0ide$ "i(ingl$gi% iss)es a re/)es" &$r a da"a-"rans&er %y%le "$ $+"ain "#eda"a &$r "#e ne" "ele0isi$n line. T#e re/)es" %an n$" +egran"ed i((edia"ely sin%e "#e (i%r$!r$%ess$r (ay +e )sing "#e(e($ry a" "#e sa(e "i(e. All dyna(i% (e($ries are 0erysensi"i0e "$ %$rre%" "i(ing8 any in%$rre%" "i(ing a%%ess %y%ledis")r+s "#e re&res# $!era"i$n and des"r$ys i((edia"ely a" leas"$ne *#$le r$* $& da"aH T#e da"a-"rans&er %y%le re/)es" is "#ere&$re !assed "$ anar+i"ra"i$n l$gi%' +)il" ar$)nd a d$)+le -FF >LS117?. T#ear+i"ra"i$n %ir%)i" de%ides *#$ #as !ri$ri"y "$ a%%ess "#e(e($ry' all$*ing "#e de0i%e %)rren"ly a%%essing "#e (e($ry "$%$(!le"e "#e %y%le in a reg)lar *ay. In "#e *$rs" %ase' "#e(i%r$!r$%ess$r #as "$ *ai" &$r $ne %$(!le"e da"a-"rans&er %y%le$r "#e 0ide$ "i(ing l$gi% #as "$ *ai" &$r $ne (i%r$!r$%ess$r+)s %y%le. T#e da"a-"rans&er %y%le "i(ing is genera"ed +y ase/)en"ial l$gi% *i"# a +i" s#i&"-regis"er >LS1,4? and%$rres!$nding ga"es. Li2e all dyna(i% (e($ries' "#e 417,4re/)ire RAS and CAS %l$%2s and address ()l"i!leing. LS744"ri-s"a"e +)&&ers are )sed &$r +$"# r$* and %$l)(n address()l"i!leing and &$r s*i"%#ing "#e address lines +e"*een "#e(i%r$!r$%ess$r and "#e 0ide$ "i(ing l$gi%. Sin%e "#e

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(i%r$!r$%ess$r (ay *an" "$ a%%ess a single +y"e a" a "i(e'se!ara"e CAS %l$%2s are deri0ed &r$( UDS and LDS. T#e 417,4 0ide$ RAM serial $)"!)"s #a0e "ri-s"a"e%a!a+ili"y and are si(!ly "ied in !arallel &$r ()l"i!leing.A &as" +i" D-FF >S694? is #$*e0er re/)ired "$ 5%lean5 "#eda"a in &r$n" $& "#e 0ide$ DBA %$n0er"er. D)ring +$"##$ri;$n"al and 0er"i%al re"ra%e !eri$ds all "#e da"a linesare #eld l$* >+la%2 le0el? +y a "ri-s"a"e +)&&er >LS744?. Syn% !)lses are added "$ "#e $)"!)" $& "#e DBA %$n0er"er.T#e #$ri;$n"al syn% !)lse is genera"ed +y a d)al ($n$s"a+le andi"s !$si"i$n %an +e ad3)s"ed "$ (a"%# "#e ($ni"$r )sed. T#e0er"i%al syn% !)lse is genera"ed +y a d)al FF' i" is "*$ line!eri$ds l$ng and $%%)rs 67 lines a&"er "#e end $& "#e )se&)l!i%")re s%an. A 966 0ide$ a(! is )sed "$ +$$s" "#e genera"ed 0ide$signal le0el. $"# !$lari"ies are a0aila+le "$ dri0e any"y!e $& s"andard-s%an T ($ni"$r. $"# "#e DBA %$n0er"er and"#e 0ide$ a(!li&ier re/)ire a nega"i0e s)!!ly 0$l"age $& a+$)"-4 "#a" is genera"ed $n-+$ard. All s)!!ly 0$l"ages $& "#eanal$g !ar" $& "#e %ir%)i" are "$ +e *ell &il"ered "$ a0$id

dis")r+s in "#e 0ide$ signal.

@. Me($ry--------- F$r ($s" a!!li%a"i$n !r$gra(s' es!e%ially "#$se #andling!i%")res' "#e %$(!)"er re/)ires ()%# ($re (e($ry "#an "#e,4 2+y"es !r$0ided $n "#e !r$%ess$r +$ard. O)" $& "#e MC,11, M+y"e addressing range "#e %)rren" $!era"ing sys"e( )ses "#e&irs" (ega+y"e &$r 0ari$)s sys"e( &)n%"i$ns8 s"ar"-)! ROM's"a%2' 0ide$ (e($ry and IBO !$r" addresses. T#e re(aining1@ M+y"es are in"ended &$r (e($ry e!ansi$n.

T#e %ir%)i" diagra( $& a 7@, 2+y"e n$n0$la"ile (e($ry+$ard is s#$*n $n Fig.9. T#e %ir%)i" in%l)des eig#" 7@, 2+i"CMOS RAMs 467@,' address and da"a +)&&ers "$ de%rease "#e%a!a%i"i0e l$ading $& "#e %$(!)"er +)s and an address de%$der.T#e s"ar" address $& "#e 7@, 2+y"e +l$%2 %an +e sele%"ed "$s"ar" any*#ere &r$( address 7: "$ 6C: !$si"i$ning an$n-+$ard 3)(!er. T#e 467@, (e($ry %#i!s $nly #a0e an a%"i0e-l$* %#i!-ena+lein!)". T$ !reser0e "#e (e($ry %$n"en" *#en "#e %$(!)"er iss*i"%#ed $&&' "#e %#i!-ena+les #a0e "$ +e 2e!" #ig#. T#isre/)ire(en" %an +e (e" easily )sing a CMOS >:C? address de%$der>:C16? s)!!lied &r$( "#e sa(e rail as "#e (e($ry %#i!s. T#eaddress de%$der #as an a%"i0e-#ig# in!)" "ied "$ MR "$ !r$"e%""#e (e($ry %$n"en". In a "y!i%al sys"e(' 4 s)%# (e($ry +$ards are )sed &$r a"$"al 1 M+y"e n$n0$la"ile (e($ry. T#e la""er is en$)g# &$r ($s"DSP a!!li%a"i$ns and &$r s$(e si(!le i(age !r$%essing. D)e "$+)s l$ading !r$+le(s i" is di&&i%)l" "$ %$nne%" ($re "#an 4(e($ry +$ards *i"#$)" sa%ri&ying "#e $!era"ing s!eed. O& %$)rseas s$$n as #ig#er densi"y (e($ry %#i!s +e%$(e a0aila+le' "#edes%ri+ed (e($ry +$ards *ill +e re!la%ed +y a #ig#er %a!a%i"y(e($ry.

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,. Anal$g IBO------------- An i(!$r"an" !ar" $& any DSP %$(!)"er is i"s in"er&a%e "$"#e anal$g *$rld. As already des%ri+ed in "#e "#e$re"i%al !ar"'I de%ided "$ )se a "ele!#$ne CODEC IC as "#e ABD and DBA%$n0er"er' sin%e i"s !er&$r(an%es (a"%# "#$se $& 0$i%e grade%$(()ni%a"i$ns re%ei0ers and "rans(i""ers' in%l)dingradi$-a(a"e)r re%ei0ers and "rans(i""ers. Sin%e all CODECs #a0e$n-%#i! a serial da"a in"er&a%e' a UART is re/)ired "$in"er&a%e a CODEC "$ a (i%r$!r$%ess$r. Pr$gra((a+le %$)n"ersare )sed "$ genera"e "#e ABD and DBA sa(!ling ra"es. T#e anal$g IBO +$ard als$ in%l)des an inde!enden" RS-767in"er&a%e. T#e %ir%)i" diagra( is s#$*n $n Fig. and Fig.. T#eRS-767 UART >91@1?' "#e !r$gra((a+le %$)n"ers >91@4? and "#eUART "$ in"er&a%e "#e CODEC >an$"#er 91@1? are all s"andard +i" (i%r$!r$%ess$r !eri!#erals. T$ in"er&a%e "#e &as"erMC,1 +)s' a "i(ing l$gi% +)il" ar$)nd a 4 +i" s#i&" regis"er>LS1@? is re/)ired. T#e l$gi% is s"ar"ed *#ene0er any $& "#e

"#ree $n-+$ard !eri!#eral %#i!s are sele%"ed +y "#e addressde%$der >"*$ LS16?' genera"ing a l$nger Read >R? $r ri"e>? !)lse and &inally "er(ina"ing "#e +)s %y%le +y iss)ing aDTAC "$ "#e MC,1. All "#ree !eri!#erals are %$nne%"ed "$"#e l$*er +y"e >D "$ D9? $& "#e 1, +i" da"a +)s "#r$)g# a+idire%"i$nal +)&&er >LS74@? "$ red)%e "#e %a!a%i"i0e +)sl$ading. T#e RS-767 UART is e/)i!!ed *i"# a s"andard RS-767re%ei0er >9@1@4?. A 4@6 CMOS ()l"i!leer is )sed "$ genera"eRS-767 %$(!a"i+le "rans(i" signal le0els $)" $& "#e @ and -@s)!!lies a0aila+le $n-+$ard. T#e RS-767 UART genera"es +$"#re%ei0e >RJ +)&&er &)ll? and "rans(i" >TJ +)&&er e(!"y?in"err)!"s' %$nne%"ed "#r$)g# 3)(!ers "$ INT6 and INT7

res!e%"i0ely. $"# RJ and TJ %l$%2s $& "#e RS-767 UART are%$nne%"ed "$ a %$(($n !r$gra((a+le %$)n"er. T#e TJ +a)d-ra"e"#ere&$re %an n$" +e !r$gra((ed di&&eren" &r$( "#e RJ+a)d-ra"e. T#e CODEC UART #as "*$ se!ara"e !r$gra((a+le %$)n"ers "$genera"e "#e ABD and DBA sa(!ling ra"es inde!enden"ly. S$(eaddi"i$nal l$gi%' "*$ 47 %$)n"ers and a &e* ga"es' arere/)ired "$ in"er&a%e "#e M@1@, CODEC. T#e ABD genera"edin"err)!" >ne* da"a a0aila+le? is %$nne%"ed "$ INT, and "#eDBA in"err)!" >ne* da"a re/)ired? is %$nne%"ed "$ INT@. All "#e "i(ing is deri0ed &r$( an $n-+$ard %rys"al$s%illa"$r a" ,144 2:;. S$(e DSP !r$gra(s' li2e "#e *ea"#ersa"elli"e !i%")re re%ei0ing !r$gra(' re/)ire a 0ery a%%)ra"esa(!ling &re/)en%y. T#e ,144 2:; %l$%2 is )sed +y "#e UARTs'di0ided +y 6 "$ $+"ain 74 2:; re/)ired +y "#e CODEC ands*i"%#ed-%a!a%i"$r &il"er' di0ided +y 7 "$ $+"ain 697 2:; &$r"#e "i(ing l$gi% and di0ided +y 4 "$ $+"ain 1@6, 2:; as "#ein!)" "$ "#e !r$gra((a+le di0iders. T#e di0ider +y 6 is ali""le ($re %$(!le "$ $+"ain a nearly @< d)"y %y%le a"74 2:;. T$ in"er&a%e dire%"ly *i"# anal$g %ir%)i"s8 re%ei0ers $r"rans(i""ers' "#e CODEC anal$g in!)" and $)"!)" are %$nne%"ed%$nne%"ed "$ a s*i"%#ed-%a!a%i"$r &il"er >TP64?. T#e in!)"

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a)di$ signal is a!!lied "$ a +and!ass &il"er *i"# a l$*er%)"$&& &re/)en%y $& 6 :; and an )!!er %)"$&& &re/)en%y $&64 :; +e&$re rea%#ing "#e ABD %$n0er"er. T#e DBA $)"!)"signal is a!!lied "$ a l$*-!ass *i"# a %)"$&& &re/)en%y $&64 :;. Addi"i$nal %$((and lines are als$ !r$0ided8 $ne in!)" and"*$ $)"!)"s. T#eir &)n%"i$n is s$&"*are !r$gra((a+le. T#e in!)"is )s)ally )sed as a s/)el%# in!)" >#ig# (eans 0alid anal$gsignal?. T#e $)"!)"s are )sed as PTT and C EK %$((ands "$a "rans(i""er. T#ese "*$ $)"!)"s are $!en-%$lle%"$r anda%"i0e-l$* as re/)ired +y ($s" "rans(i""ers. T#e 9@4@7 dri0er%an #andle 6 (A and 6 $n ea%# $& "#ese $)"!)"s. T#e CODEC' "#e s*i"%#ed-%a!a%i"$r &il"er and "#e RS-767dri0er re/)ire a nega"i0e 0$l"age $& -@. T#e la""er is$+"ained $n-+$ard *i"# a si(!le "*$-"ransis"$r &ly+a%2 in0er"ersi(ilar "$ "#a" $n "#e 0ide$ +$ard. T#e s)!!ly 0$l"ages $& "#eanal$g %ir%)i"s #a0e "$ +e &)r"#er &il"ered "$ a0$id anyin"er&eren%e &r$( "#e n$isy %$(!)"er +)s @ s)!!ly rail $rin0er"er. T#e CODEC als$ re/)ires "*$ re&eren%e 0$l"ages. T#e!$si"i0e re&eren%e is $+"ained &r$( a red LED !r$0iding a

s"a+le 0$l"age dr$! $& a+$)" 1.. T#e nega"i0e re&eren%e"ra%2s "#e !$si"i0e re&eren%e "$ a0$id dis"$r"i$n )sing an$!-a(! >941?.

9. Fl$!!y Dis2 Dri0e-------------------- Al"#$)g# "#e $!era"ing sys"e( de0el$!ed &$r (y DSP%$(!)"er d$es n$" re/)ire a (ass (e($ry li2e (agne"i% dis2s &$ri"s $!era"i$n' i" is 0ery %$(&$r"a+le "$ #a0e a0aila+le a&l$!!y dri0e. F$r ea(!le' a!!li%a"i$ns !r$gra(s %an +e l$aded%$n0enien"ly &r$( a &l$!!y dis2 &$r "#e &irs" "i(e' *#en

ini"iali;ing "#e sys"e(. Fl$!!y dis2s are als$ )se&)l &$r+a%2)! %$!ies and "$ s"$re large a($)n"s $& da"a &$r l$nger!eri$ds $& "i(e >!i%")res?. )ilding "#e (e%#ani%al !ar" $& a #ig# !er&$r(an%e &l$!!ydri0e is !r$+a+ly $)"-$&-rea%# &$r an a(a"e)r. A0aila+le &l$!!ydri0es %$(e already *i"# s$(e ele%"r$ni%s li2e *ri"e and read#ead a(!li&iers and ($"$r dri0ers. M$s" $& "#e re%en" &l$!!ydri0es %$(e *i"# a 64 !$le %$nne%"$r %arrying TTL le0el signalsin +$"# dire%"i$ns. T#ese signals are s"andardi;ed. T#ere areals$ (any s!e%ial !)r!$se %#i!s a0aila+le' %alled Fl$!!y Dis%C$n"r$llers >FDC?' "$ in"er&a%e "#e s"andard 564 !$le%$nne%"$r5 signals "$ any (i%r$!r$%ess$r $r DMA %$n"r$ller. I sele%"ed "$ )se 6.@5 d$)+le-sided &l$!!y dis%s $n a6 r!( dri0e a" a re%$rding s!eed $& 7@ 2+!s MFM. A "ra%2d$)+le-sided dis2 #as a ra* %a!a%i"y $& 1 M+y"e. Ea%# "ra%2 #asa ra* %a!a%i"y $& ,.7@ 2+y"es and "#e %)rren" s$&"*are &$r(a"si" in"$ @ se%"$rs $& 174 +y"es ea%#' res)l"ing in a &$r(a""ed%a!a%i"y $& 2+y"es !er dis2. Fl$!!y dis2 %$n"r$llers %$(e ei"#er in $ne %#i! $r as ase" $& %#i!s. T#e es"ern Digi"al 799 is a single-%#i! FDC*i"# an anal$g da"a se!ara"i$n PLL. Ne* FDCs #a0e digi"alPLLs "#a" d$ n$" re/)ire ad3)s"(en"s' +)" "#e 799 is %#ea! andeasily a0aila+le. T$ in"er&a%e a s"andard 6.@5 &l$!!y dri0e i"

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$nly re/)ires a &e* $!en-%$lle%"$r' #ig#-%)rren"-sin2 TTL+)&&ers. T#e %ir%)i" s#$*n $n Fig.1 and Fig.11 als$ in%l)des s$(eaddi"i$nal l$gi% "$ (a2e all $& "#e 799 &)n%"i$ns sele%"a+le+y s$&"*are. T#e %ir%)i" "$ in"er&a%e "#e sl$* 799 "$ "#e &as"MC,1 +)s is iden"i%al "$ "#a" )sed $n "#e anal$g IBO +$ard.A si(!le #ig#-s!eed serial in"er&a%e' +ased $n a @6 SerialC$(()ni%a"i$ns C$n"r$ller >SCC?' is l$%a"ed $n "#e sa(e +$ard. T#e "i(ing &$r "#e FDC and +)s in"er&a%e l$gi% is deri0ed&r$( a 1, M:; %rys"al $s%illa"$r. I"s &re/)en%y is di0ided d$*n"$ ei"#er 1 $r 7 M:; "$ dri0e "#e 799 %l$%2 in!)" in "#e *ri"e($de. In "#e read ($de' "#e 799 deri0es i"s %l$%2s &r$( an$n-%#i! PLL *i"# a CO r)nning a" 4 M:;. T$ (ain"ain s$&"*are %$(!a"i+ili"y *i"# i"s !rede%ess$rs'"#e designers $& "#e 799 %#i! %$)ld n$" i(!le(en" all $& i"s&)n%"i$ns as %$n"r$l regis"er +i"s. T#e %$rres!$nding sele%"i$n!ins #a0e "$ +e dri0en +y an addi"i$nal $)"!)" !$r"' in "#is%ase a LS796 la"%#. T*$ $)"!)"s $& "#e LS796 are )sed "$ sele%""#e &l$!!y dri0e dire%"ly' +y!assing "#e 799 %#i!. 6.@5 &l$!!y dri0es d$ n$" #a0e a #ead l$ad s$len$id8 "#e

readB*ri"e #eads are l$aded i((edia"ely a&"er "#e dis2 isinser"ed in"$ "#e dri0e. T$ a0$id )nne%essary *ear $& "#e dis2and #eads' i" is ne%essary "$ s"$! "#e s!indle ($"$r a&"erread $r *ri"e $!era"i$ns are %$(!le"ed. In "#e %ase $& "#e799 FDC' i"s :ead L$aD >:LD? signal #as "$ +e )sed as aM$"$r On >MO? signal &$r a 6.@5 &l$!!y dri0e. C$rres!$ndingly'"#e READK in!)" $& "#e 799 %an n$" +e )sed and "#e READK$)"!)" &r$( "#e dri0e' i& a0aila+le' s#$)ld +e "ied "$ "#e:ead L$ad Ti(ing in!)" $& "#e 799. T#e :LD $)"!)" $& "#e 799#as an in"eres"ing &ea")re8 i& n$" disa+led +y s$&"*are i" *ill+e disa+led a)"$(a"i%ally a&"er 1@ dis2 re0$l)"i$ns >6 se%$nds?&$ll$*ing "#e las" read $r *ri"e $!era"i$n. A s$&"*are %ras# $ra %areless !r$gra((er *ill n$" des"r$y "#e dis2 n$r da(age "#e

#eadsH S$(e $& "#e %$nne%"i$ns +e"*een "#e FDC and "#e 64 !$le%$nne%"$r are +r$)g#" "$ a 3)(!er !l)g "$ ada!" &$r s(alldi&&eren%es in "#e %$nne%"i$ns $& di&&eren" dri0es. T#e "*$799 in"err)!"s' DR and INTR' are als$ %$nne%"ed "#r$)g#3)(!ers "$ INT4 and INT6 res!e%"i0ely. T#e serial %$(()ni%a"i$ns %$n"r$ller %#i! >@6? $+"ainsall i"s "i(ing &r$( a ,144 2:; %rys"al $s%illa"$r' sin%e "#is&re/)en%y %an +e di0ided "$ $+"ain s"andard +a)d ra"es. T#eserial !$r" )ses "#e sa(e signal le0els as "#e &l$!!y dri0ein"er&a%e8 dri0ers are $!en-%$lle%"$r' #ig#-%)rren"-sin2 TTLdri0ers and re%ei0ers are si(!le TTL in!)"s *i"# !)ll-)!resis"$rs. INT, is assigned "$ "#e SCC' again "#r$)g# a3)(!er' "$ #andle "#e #ig# da"a ra"es e!e%"ed.

. P$*er S)!!ly--------------- Al"#$)g# "#e design $& a !$*er s)!!ly is n$" %$nsidered0ery i(!$r"an" +y ($s" design engineers' !$*er s)!!lies are)s)ally a (a3$r s$)r%e $& "r$)+les in !ra%"i%al ele%"r$ni%%ir%)i"s' es!e%ially %$(!)"ersH O0er#ea"ing' ele%"ri%al

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in"er&eren%es and )nrelia+le rese""ing are %$(($n !r$+le(sass$%ia"ed *i"# !$$rly designed %$(!)"er !$*er s)!!lies. A DSP %$(!)"er is in"ended "$ $!era"e "$ge"#er *i"#$"#er anal$g e/)i!(en" in%l)ding sensi"i0e re%ei0ers and!$*er&)l "rans(i""ers. E&&i%ien" s#ielding is a ()s" "$ a0$idin"er&eren%es in +$"# dire%"i$ns. :$*e0er' an e&&i%ien"s#ielding en%l$s)re is n$r(ally 0ery !$$r &r$( "#e "#er(aldesign !$in" $& 0ie* sin%e %$(!)"er %#i!s dissi!a"e ($s" $& "#e#ea" !r$d)%ed +y %$n0e%"i$n %$$ling. #ile i" (ay n$" +e!$ssi+le "$ in&l)en%e "#e a($)n" $& #ea" !r$d)%ed in "#e%$(!)"er %#i!s' $"#er #ea" s$)r%es %an +e a0$ided in a %are&)ldesign. A g$$d e&&i%ien%y' s*i"%#ing !$*er s)!!ly is a ()s"H T#e %ir%)i" diagra( $& "#e re%$((ended !$*er s)!!ly &$r"#e DSP %$(!)"er is s#$*n $n Fig.17. T#e !$*er s)!!ly isin"ended "$ $!era"e &r$( a n$n-reg)la"ed DC s)!!ly $& n$(inally17 DC' nega"i0e gr$)nded' li2e ($s" $"#er radi$-a(a"e)re/)i!(en". T#e e&&i%ien%y $& "#e si(!le series s*i"%#ingreg)la"$r is a+$0e #ys"eresis $& a+$)" .@? and a&"er "#e delay in"r$d)%ed +y"#e 1)FB1.72$#( "i(e %$ns"an". E0eryday !ra%"i%al )se%$n&ir(ed "#a" "#is rese""ingB!r$"e%"i$n s%#e(e is&ail)re-!r$$& regardless $& "#e 2ind $& "ransien"s $n "#e !$*erline' in se0ere %$n"ras" "$ *#a" #a!!ens *i"# %$((er%ial%$(!)"ers' !a%2e"-radi$ TNCs $r $"#er e/)i!(en" )sing(i%r$!r$%ess$rsH Sin%e "#ere are 3)s" &$)r *ires %$nne%"ing "#e !$*ers)!!ly ($d)le "$ "#e %$(!)"er +)s8 @' CMOS' MR and GND' "#e($d)le is n$" e/)i!!ed *i"# an 5E)r$-%ard5 %$nne%"$r "$ a0$id%a!a%i"i0e l$ading $& "#e %$(!)"er +)s.

. An"enna R$"a"$r In"er&a%e---------------------------- A)"$(a"i% sa"elli"e "ra%2ing *i"# a s"eera+le an"ennasys"e( is )s)ally re/)ired "$ge"#er *i"# (any DSP a!!li%a"i$ns.T#e des%ri+ed DSP %$(!)"er is a+le "$ genera"e "#e re/)ired"ra%2ing in&$r(a"i$n as a +a%2gr$)nd "as2 "$ "#e (ain DSP "as2*i"# a (ini()( addi"i$nal l$ading $& "#e CPU. E0en in "#e %ase$& )!da"ing "#e an"enna !$in"ing dire%"i$n e0ery se%$nd $nlya+$)" 7< $& "#e "$"al CPU "i(e is re/)ired &$r "#e "ra%2ing

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!r$gra(. D)e "$ "#e 0arie"y $& di&&eren" an"enna r$"a"$r sys"e(s Ide%ided n$" "$ +)ild any r$"a"$r in"er&a%e inside "#e %$(!)"eri"sel&. T#e r$"a"$r in"er&a%e s#$*n $n Fig.16 a%%e!"s da"a &r$("#e %$(!)"er RS-767 !$r" and in"er&a%es "$ a R-@, r$"a"$r%$n"r$l )ni". I" in%l)des a +i" (i%r$!r$%ess$r @ >CMOS0ersi$n $& "#e CPU? *i"# an EPROM >79C,4? and a RAM >,11,?'an ABD %$n0er"er >ADC4?' Darling"$n relay dri0ers >74? anda si(!li&ied RS-767 !$r". Only a 0ery s(all !ar" $& +$"# "#eEPROM and "#e RAM are a%")ally )sed sin%e "#e s$&"*are is 0erysi(!le. T#e r$"a"$r in"er&a%e re%ei0es "#e desired an"enna a;i()"#and ele0a"i$n &r$( "#e DSP %$(!)"er. T#ese 0al)es are %$(!ared*i"# "#e a%")al 0al)es (eas)red +y "#e !$si"i$n-sensing!$"en"i$(e"ers ins"alled $n "#e r$"a"$rs and "#e in"er&a%e(i%r$%$(!)"er de%ides "$ a%"i0a"e "#e ($"$rs in "#e a!!r$!ria"edire%"i$n. T#e s$&"*are als$ %$rre%"s &$r "#e iner"ia $& "#er$"a"$r and an"enna sys"e(. T#e da(!ing %$e&&i%ien"s are als$)!l$aded &r$( "#e DSP %$(!)"er. T#e in"er&a%e als$ "rans(i"sa %$(!le"e s"a")s re!$r" $n re/)es" &r$( "#e (ain %$(!)"er.

All $& "#e (i%r$%$(!)"er %$(!$nen"s are CMOS 0ersi$ns "$2ee! "#e %)rren" drain l$*. T#e $0erall %)rren" %$ns)(!"i$n $&"#e in"er&a%e is $nly a+$)" 6@ (A. T#e la""er %an +e deri0ed&r$( "#e ()l"i-!$le %$nne%"$r $n "#e R-@, %$n"r$l )ni" "#)ssa0ing "#e e!ense $& an addi"i$nal !$*er s)!!ly. T#e in"er&a%ere/)ires 3)s" @ $+"ained &r$( a "#ree-"er(inal 0$l"agereg)la"$r. T#e ABD %$n0er"er #as i"s $*n 7.@ re&eren%e LM66,.Sin%e "#e %$(!)"er (e($ry %$n"en" is l$s" a&"er !$*er-d$*n' n$s!e%ial rese" %ir%)i" is re/)ired' an RC ne"*$r2 and aS%#(i""-"rigger ga"e are s)&&i%ien". T#e RS-767 serialB!arallel and !arallelBserial %$n0ersi$nsare d$ne in s$&"*are. T#ere&$re' all "#e %l$%2s are deri0ed&r$( a single %rys"al $s%illa"$r a" 1 M:;8 di0ided +y 4 "$

$+"ain 7.@ M:; &$r "#e CPU and di0ided +y 1, "$ $+"ain ,7@ 2:;&$r "#e ABD %$n0er"er. A !arallel IBO !$r" >91@@? %$n"r$ls "#e relay dri0ers'"#e anal$g ()l"i!leer >4,,? &$r "#e ABD %$n0er"er and "#eRS-767 signals. T#e la""er are n$" %$(!le"ely "$ "#e RS-767s!e%i&i%a"i$ns' sin%e "#e $)"!)" l$gi%al l$* is $nly ;er$0$l"s' +)" are a%%e!"ed +y ($s" RS-767 re%ei0ers. i"# s)i"a+les$&"*are "#e in"er&a%e %$)ld +e )sed *i"# any %$(!)"er e/)i!!ed*i"# a RS-767 !$r".

1. F)")re Plans---------------- A %$ns"r)%"i$n ar"i%le is !lanned "$ &$ll$*' dis%)ssingals$ #ard*are %#e%2$)"' s$&"*are ins"alla"i$n and )se $& "#eDSP %$(!)"er. S$(e in&$r(a"i$n' li2e "#e $!era"ing sys"e((an)al' %an n$" +e !)+lis#ed sin%e "#ey *$)ld "a2e &ar "$$ ()%#s!a%e in "#e (aga;ine8 %$!ies *ill +e (ade a0aila+lese!ara"ely. S$&"*are *ill !r$+a+ly +e (ade a0aila+le $n &l$!!ydis2s' in%l)ding s$)r%e &iles' "#eir %$rres!$nding %$(!iled0ersi$ns and 5(an)al5 &iles des%ri+ing #$* "$ )se "#e(. T#ere *ill %er"ainly +e (any )!grades $& +$"# "#e #ard*are

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and es!e%ially "#e s$&"*are. A 0ery s)%%ess&)l )!grade *as "#ere!la%e(en" $& all LS-series TTL in"egra"ed %ir%)i"s *i"# "#ene* :C-series. T#e :C-series in"egra"ed %ir%)i"s' n$* a0aila+lea" "#e sa(e !ri%e as "#e $lder LSs' $&&er a ()%# l$*er %)rren"%$ns)(!"i$n >!$*er dissi!a"i$nH? and a l$*er +)s l$ading. Inaddi"i$n' "#eir %$ns"an"' resis"i0e $)"!)" i(!edan%ee&&i%ien"ly s)!!resses +)s ringing' all$*ing )! "$ 6< #ig#erCPU %l$%2 &re/)en%ies. T#e ne" i((inen" #ard*are )!grade is %er"ainly a #ig#er%a!a%i"y (e($ry +$ard. O"#er !eri!#erals %$)ld +e +)il" as*ell' in%l)ding 5in"elligen"5 $nes %arrying (ay+e an e0en ($re!$*er&)l !r$%ess$r "#an "#e MC,1 $r a dedi%a"ed DSP %#i!.On "#e $"#er #and' &)")re an"enna r$"a"$rs *ill !r$+a+lyin%l)de a RS-767 in"er&a%e and "#e des%ri+ed r$"a"$r in"er&a%e+$ard *ill !r$+a+ly +e%$(e )nne%essary. O& %$)rse' ($s" )!grades %an +e e!e%"ed in "#e s$&"*are.Se0eral alg$ri"#(s' in%l)ding "#e Fas" F$)rier Trans&$r(' #a0en$" e0en +een "ried ye"' al"#$)g# i" is 2n$*n "#ey are !$ssi+le$n "#e des%ri+ed #ard*are.

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