A Wideband Spectrum-Sensing Processor With Adaptive Detection Threshold and Sensing Time

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 58, NO. 11, NOVEMBER 2011 2765

A Wideband Spectrum-Sensing Processor WithAdaptive Detection Threshold and Sensing Time

Tsung-Han Yu, Student Member, IEEE, Oussama Sekkat, Santiago Rodriguez-Parera,Dejan Markovic, Member, IEEE, and Danijela Cabric

Abstract—Spectrum sensing over a wide bandwidth increasesthe probability of finding unutilized spectrum for cognitive radios.The hardware realization of wideband sensing is challengingbecause strong primary users introduce large dynamic range andspectral leakage in adjacent unused bands. This paper proposesa multitap-windowed frequency power detector with adaptivethreshold and sensing time to address the above challenges. Thesuppression of spectral leakage is achieved by multitap-windowedFFT processing, which also enables reduced sensing time. Thesensing time and detection threshold are adapted according tothe channel-specific spectral leakage, which results in a reliablewideband signal detection within constrained sensing time. Oursimulations with a 20 dB interferer-to-noise ratio (INR) indicatea 2x improvement in detection rate compared to conventionalpower detectors. An order-of-magnitude improvement in sensingtime is achieved in the presence of 30-dB INR interferers whilemaintaining a false-alarm rate of 0.1 and a detection rate of 0.9.The proposed algorithms are realized in an FPGA to demonstratereal-time operation with a latency below 10 s. Experimental re-sults from a radio testbed closely match the numerical simulations.An ASIC architecture for a 200-MHz bandwidth is estimated tooccupy 0.98 mm� and dissipate 25 mW from a 1-V supply in astandard 65-nm CMOS technology.

Index Terms—Cognitive radio, energy detection, FPGA testbed,multitap windowing, threshold adaptation, wideband sensing.

I. INTRODUCTION

W ITH THE growing demand for higher data rates andthe rapid increase in the number of wireless devices,

fixed spectrum allocation has shown to be a major limitation tothe evolution of wireless technologies. Cognitive radio (CR) al-lows opportunistic spectrum access [1] by seeking and utilizingtemporally and spatially unused spectrum. This technology ispromising for the coexistence of heterogeneous networks, pro-vided that CR users do not cause interference to the primaryusers of the spectrum. The enabling technology for CR systemsis spectrum sensing, in which the presence of primary users isdetected in the band of interest to avoid harmful interference.

Manuscript received May 10, 2010; revised November 04, 2010, February11, 2011; accepted March 10, 2011. Date of publication June 02, 2011; dateof current version October 28, 2011. This work was supported by the DARPAHEALICs program and by the UCLA Graduate Fellowship. This paper was rec-ommended by Associate Editor G. Sobelman.

T.-H. Yu, D. Markovic, and D. Cabric are with the Department of ElectricalEngineering, University of California, Los Angeles, CA USA 90089 USA

O. Sekkat was with the Department of Electrical Engineering, University ofCalifornia, Los Angeles, CA USA 90089 USA. He is now with Broadcom Cor-poration, Sunnyvale, CA 94086 USA.

S. Rodriguez-Parera was with the Katholieke University Leuven, 3000Leuven, Belgium, and IMEC Belgium, 3001 Heverlee, Belgium.

Digital Object Identifier 10.1109/TCSI.2011.2143010

The key requirement for spectrum sensing is reliable signaldetection in a negative SNR regime within a constrained sensingtime. The high sensitivity requirement prevents a CR systemfrom causing interference to the primary users [2], [3]. Thesensitivity improves by increasing the sensing time, but a longsensing time reduces the effective time for communication on anunused primary channel, thus reducing the CR throughput. Onthe other hand, a short sensing time enhances the throughput butincreases the chance of unintended collisions.

Wideband ( MHz) sensing is a highly desirable featureof CR systems since sensing multiple channels at the same timewould increase the probability of finding unused spectrum.Wideband sensing, however, imposes many design challengesat the physical layer [4]. The wideband front end must havesufficient linearity to avoid mixing interferers into the band ofinterest. The analog-to-digital converter (ADC) requires highresolution to support large-dynamic-range signals and highsampling rate to adequately sample wideband spectrum. In thedigital baseband, the sensing processor needs to provide a reli-able signal detection in a negative SNR regime while operatingin real time. The DSP baseband, therefore, must accommodateadvanced signal processing algorithms within limited powerand area. This paper focuses on the algorithm developmentand design of a power/area-efficient architecture for widebandspectrum sensing baseband DSP processor.

To illustrate the design challenges associated with widebandsensing, Fig. 1 shows a segment of the spectrum where multipleprimary users may appear at the same time. In the worst case,the weak primary user signal with negative SNR, which is ad-jacent to two strong primary users, has to be detected. Undersuch an usage scenario, the following effects occur. First, theprimary user signals are shaped (by digital pulse-shaping andanalog bandpass filters) in frequency according to a predefinedfrequency mask, which in reality is not a perfect brick-wall filter.As a result, the tail of the primary user spectrum might intro-duce significant interfering power in adjacent band providedthat the signal is very strong. Second, the time-domain receivedsamples at the sensing processor are channelized with a non-ideal filter, which also causes spectral leakage. Both effects arerepresented by the gray areas in Fig. 1. We call the combina-tion of these two effects adjacent-band interfering power. Theadjacent-band interfering power is a design issue specific towideband spectrum sensing. Therefore, key challenges relatedto wideband spectrum sensing are the estimation of the powerspectral density (PSD) together with the proper selection of thedecision threshold and sensing time that take into account spec-tral leakage from adjacent bands.

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2766 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 58, NO. 11, NOVEMBER 2011

Fig. 1. Interferer in-band power and spectral leakage.

The existing literature on methods for wideband PSD estima-tion for CR systems is scarce. In [5], wavelet transforms wereused to estimate the PSD over a wide frequency range. Themultiresolution feature of wavelets is beneficial, but a waveletfunction needs to be designed according to the signals to bedetected, which is not feasible in real-time sensing. In [6], [7]and [8], Thomson multitaper and filter-bank spectral estimatorswere proposed to derive the PSD. The computation of eigen-value decomposition required for this method lends hardwarerealization impractical.

Applying a proper decision threshold is critically impor-tant for reliable detection when strong adjacent-band users arepresent. Methods to model detection threshold were given in [9]and [10]. Those models are inadequate as they underestimatethe threshold in the presence of strong adjacent-band primaryusers. In fact, no existing literature considers the effects ofadjacent-band interfering power.

In response to the above challenges, this paper develops al-gorithms for weak signal detection in the presence of strongadjacent-band primary users. We propose a multitap-windowedfrequency-domain power detector, which reduces the spectralleakage, maintains frequency resolution, and mitigates SNR losssimultaneously. Formulations of the sensing time and the de-tection threshold are presented to achieve reliable sensing rateswith minimum sensing time. The proposed algorithms are ex-perimentally validated on an FPGA-based radio testbed. Finally,we project the power and area requirements for a future ASICimplementation.

The organization of this paper is as follows. Section II in-troduces wideband sensing, design specifications, and conven-tional sensing algorithms. Proposed algorithms for widebandsensing with adaptive threshold and sensing time are discussedin Section III, along with theoretical and simulation results.Section IV validates the proposed algorithms in real-time hard-ware and discusses experimental results. Section V concludesthe paper.

II. WIDEBAND SPECTRUM-SENSING DESIGN PROBLEM

In order to define challenges addressed in this work, this sec-tion introduces wideband spectrum sensing, the system speci-fications, and conventional sensing algorithms based on powerdetection.

A. System Model

We consider a wideband signal composed of several nonover-lapping narrowband primary users, where each primary user hasthe same bandwidth and modulation scheme. Additive whiteGaussian noise (AWGN) applies uniformly across the band.As a result, the noise power in all the individual narrowbandchannels is statistically equal. Because the spectrum is channel-ized using the fast Fourier transform (FFT), the model for eachchannel is similar to that in narrowband signal detection [11].The detection problem for each channel can be modeled by abinary hypothesis test, where stands for noise only, and

means that both noise and signal are present in the bandof interest, channel .

Frequency-domain power detection involves PSD estimationof the entire band. For reliable signal detection in the negativeSNR regime, the power detector requires an adequate number ofsamples to obtain accurate PSD estimation. Then, the varianceof the estimated PSD can be reduced by averaging. Finally, theestimated PSD is compared to a detection threshold to decidebetween and . The decision rule is represented by

(1)

where the test statistic indicates the signal energy in oneFFT bin and is the corresponding detection threshold insubchannel . is the FFT output from the bin indexand block index . The bandwidth of the band of interest isrepresented by , where and are theupper- and lower-bound channel indices, respectively, is thebaseband sampling rate, and is the FFT size. is the numberof averages, and the corresponding sensing time is

(2)

Finally, the sensing rates are defined by the probability offalse-alarm and the probability of detection .is the probability that a CR system fails to identify an unoccu-pied spectral segment. is an important measure in cognitiveradio systems since it directly impacts the utilization of unusedspectrum. represents the probability that the CR system suc-cessfully detects the presence of a primary user, and measuresthe rate of avoiding interference.

B. System Specification

The physical-layer design specifications are introduced here.The set of specifications consists of radio bandwidth, frequencyresolution, detection sensitivity, sensing time, and . Theradio bandwidth dictates the minimum sampling frequency ofthe ADC and also limits the maximum number of channels thatcan be sensed at a time. The frequency resolution sets the min-imum signal bandwidth of the detected primary user and the re-quired FFT size. The detection sensitivity determines the min-imum SNR for reliable detection specified by and . The

YU et al.: A WIDEBAND SPECTRUM-SENSING PROCESSOR WITH ADAPTIVE DETECTION THRESHOLD AND SENSING TIME 2767

sensing time can be used to improve the reliability of signal de-tection but at the same time affects the cognitive radio systemthroughput. The detection sensitivity, sensing time, andjointly depend on the specific signal detection algorithm.

Next, we define the hardware design constraints for our DSPbaseband spectrum-sensing processor. State-of-the-art ADCscan operate at 500 MHz with 10-bit resolution [12]. Thus, wetarget a 200-MHz radio bandwidth for a feasible low-powerand high-resolution wideband ADC. A 200-MHz specificationrelaxes the linearity requirement of the analog front end whilestill providing a considerable channel bandwidth. We target a200-kHz frequency resolution, which means a 1024-point FFTis required to channelize the spectrum. This resolution wouldbe sufficient to sense wireless microphones in the TV band orGSM signals.

Since power detection requires minimum a priori knowledgeof the primary user signal, the sensitivity of power detectionis drastically limited by noise uncertainty [13]. Thus, signalscannot be detected at arbitrarily low SNRs by increasing thesensing time. According to [13], the signal SNR should be atleast dB for a 0.5 dB noise uncertainty. We apply a 1 dBmargin to accommodate for noise uncertainty, which brings theminimum SNR to dB. The sensing time below 50 ms is ourdesign choice for a good trade-off between throughput loss dueto sensing and reliability in primary user detection [14]. Thetarget and are 0.9 and 0.1, respectively, based on theIEEE 802.22 draft standard specification for the detection ofDTV signals and wireless microphones. The maximum toler-able interferer-to-noise ratio (INR) is defined by the transmitterfrequency mask. As shown in Fig. 1, the interfering power iscomposed of leakage power and interferer in-band power. In thiswork, we only consider the spectral leakage by constraining INRto the values where interferer in-band power can be neglected.As a result (shown in Fig. 2), the adjacent-band signal power isconstrained by

INR

SNR (3)

Take the wireless micronphone [15] as an example: the attenua-tion of the brick-wall portion is 40 dB, the minimum SNR isdB, and we keep 5 dB for the margin. As a result, in our systemthe maximum INR for the wireless microphone primary user isconstrained by 30 dB.

C. Conventional Sensing Algorithms

A frequency-domain power detector can be realized in sev-eral ways. Directly feeding time-domain samples into an FFTto decouple the channels in the frequency domain is the moststraightforward method. This process can be also viewed as ap-plying a rectangular window before the FFT, which only pro-vides a 13.6 dB suppression of adjacent-band interferer [16]. Fora 30 dB SNR sinusoidal signal that is 1.5 bin (300 kHz if the fre-quency resolution is 200 kHz) away from the band of interest,the detected-band interfering power is still 16.4 dB. It leads to asevere interference if the signal strength of the detected band isonly dB SNR. As a result, the filtering capability has to beimproved to reduce the adjacent-band interfering power.

Fig. 2. Maximum tolerable INR. For a 200 kHz wireless microphone primaryuser, the maximum INR is constrained by 30 dB.

To enhance the filtering, a time-domain window (other thana rectangular window) can be applied to the time-domain sam-ples before feeding them into the FFT. This leads to a degra-dation in the frequency resolution and SNR loss [16]. Alterna-tively, using a larger time-domain window with a larger FFTsize could compensate for such degradation. Both the sensingtime and the computational complexity would be increased dueto the larger FFT size. Channelizing the overlapped time-do-main samples could reduce the sensing time, but this requiresmultiple FFT processors operating in parallel and still needs alarger FFT size. Such an idea is not practical, considering theincreased computational complexity and hardware cost.

Differences in the above methods can be explained by ana-lyzing the test statistic expression (1). The same formula appliesto all the methods, but the FFT output, , has different ex-pression for the different power detection methods, as given by

(4)

where is the normalized window coefficient, and is theoverlapping ratio between two time-domain -sample blocks.According to the central limit theorem, is asymptoticallynormally distributed if is large enough ( is sufficientin practice). Using the mean and variance of andcan be defined as

(5)

(6)

respectively, where is the tail probability of a zero-meanunit-variance Gaussian random variable.

In order to set and to the desired values, we examinethe parameters that affect the sensing rates. The sensing timedictates and through the test statistic . A longersensing time implies utilizing more samples for PSD estima-tion, which results in a smaller estimation error of andthus higher and lower . The detection thresholdstrongly affects the sensing rates. The threshold determines the


power-detector operating point, where is set usually ac-cording to a desired . Underestimating the threshold leadsto a higher but also higher ; overestimation leads to alower and lower . If the sensing time is to be minimizedfor a given detection rate ( and , for ex-ample), an accurate formulation for the detection threshold isrequired.

According to [11], the sensing time and detection thresholdare determined by the target SNR, , and the measurednoise power, . The formulations of the sensing time anddetection threshold are given by

(7)

(8)

Since sensing time is a function of sensing rates and sensitivity,the sensing time is the same across all channels if we do notconsider the interfering power from adjacent bands. Under theassumption that the in-band noise power, , is constantacross all channels, is also identical for all channels. Thisholds unless strong adjacent-band interferers are present. In thepresence of an adjacent-band strong interferer, the PSD estima-tion error contributes to both noise and the in-band interferer.As a result, ignoring the in-band interfering power leads to aninaccurate model for the sensing time and detection threshold.

D. Design Challenges

The development of proposed wideband sensing algorithmscan be motivated by observing Fig. 3, which shows the receiveroperating characteristic curves for the conventional rectangular-windowed FFT method. A -dB SNR signal is detected be-tween two adjacent-band primary users with a 30-dB INR. Thesolid line is the sensing-rate performance for a 0.5-ms sensingtime. The dashed line shows the maximum attainable perfor-mance using this method, for a sensing time set to the maximumvalue of 50 ms. The results are still outside the desired operatingregion bounded by and . This is becausethe filtering capability of the rectangular window is not adequatefor the case of adjacent-band primary users with INR dB.Clearly, the conventional FFT power detector cannot achieve re-liable signal detection within constrained sensing time in thepresence of strong interferers.

Adjusting the sensing time alone is sufficient to improve thedetection rates. Allocating equal sensing time to all channels isalso suboptimal, even if the sensing time could be increased toaccommodate the worst-case channel. Since different channelsmay experience different levels of the interfering power fromthe adjacent-band primary users, equal sensing time would bean overestimate for many channels. An overestimated sensingtime not only degrades the access time to available channels, italso increases the computational complexity and radio energyconsumed in sensing. Therefore, every channel should adapt itsown sensing time to the channel condition in order to maximizethe throughput and minimize energy.

Conventional methods for the estimation of detectionthreshold are inadequate in the presence of strong interferers.

Fig. 3. Receiver operating characteristic of the conventional rectangular-win-dowed FFT power detector for sensing times of 0.5 ms (solid line) and 50 ms(dashed line).

TABLE IWIDEBAND CR SYSTEM SPECIFICATION

The detection threshold based on (8) fails to reach ,as shown in Fig. 3 by the gray circle marks. An underestimateof the threshold results in an increased , as shown by thewhite circle marks. Thus, the formulation of detection thresholdin (8) must be modified to achieve and .

III. PROPOSED WIDEBAND SPECTRUM-SENSING ALGORITHMS

This section proposes algorithms that mitigate the designchallenges associated with wideband spectrum sensing inthe presence of strong adjacent-band interferers. Theoreticalresults are presented and verified by simulations to show thatthe proposed algorithms meet the system specifications definedin Table I.

When strong primary users are present in adjacent bands, theresulting interfering power in the band of interest has to be re-duced in order to reduce the required sensing time. The inter-fering power also has to be estimated to enable the adjustmentin the sensing time and the detection threshold according tochannel conditions. These two techniques combined ensure reli-able detection within the and constraints with minimumsensing time.

Fig. 4 shows the block diagram of the proposed spectrum-sensing processor. It consists of a multitap-windowed frequencypower detector, a sensing-time and detection-threshold adapta-tion blocks. The objectives of the algorithm design are to pro-vide reliable detection rates with minimum sensing time and lowhardware cost. The algorithmic steps are outlined next.

Fig. 5 is a high-level view of the proposed algorithm. Theprocedure starts by turning off the RF antenna to perform noise


Fig. 4. Block diagram of the proposed wideband spectrum sensing processor. The processor consists of a multitap-windowed frequency-domain power detectorfor PSD estimation, sensing-time adaptation for optimal sensing time, and detection-threshold adaptation for desired sensing rate.

Fig. 5. Wideband spectrum sensing procedure.

power calibration. Next, coarse sensing is performed using 64averages (corresponding to 0.3 ms for a sampling frequency of200 MHz). The coarse sensing is needed because not all chan-nels need the same number of averages. The next two stagesperform the estimation of in-band interfering power, based onwhich sensing time is adapted for each channel. The in-band in-terfering power is projected by the corresponding estimated ad-jacent-band interferer powers [17]. The fifth step is to performthe PSD estimation. In this step, different sensing times fromthe previous step are applied to different channels to enhancethe system throughput and reduce the power consumption. Inthe final stage, detection-threshold adaptation is performed. Thedetection threshold for each channel is adapted to the estimatedinterfering power and the corresponding number of averages.The decision about the presence of primary users is made rightafter the threshold is determined. The key algorithmic blocksare described below.

A. PSD Estimation Using Multitap-Windowed FFT Processing

In our proposed multitap-windowed frequency power de-tector (MW-FPD), we apply a multitap window to overcome thespectral leakage problem of the FFT. The traditional approachis to use either a windowed frequency-domain power detector(W-FPD) or a windowed-overlapped frequency-domain powerdetector (WO-FPD). Both methods require 2048-point FFT tochannelize the time-domain samples. The W-FPD necessitatesa long sensing time, which can be mitigated in the WO-FPDby using overlapped time-domain samples and two 2048-pointFFT blocks. The idea in MW-FPD is to overlap and add thesamples in time domain and channelize the resulting samplesusing a single 1024-point FFT. The overlap-and-add approachallows the use of a time-domain window with size that is largerthan the FFT size, as shown in Fig. 6. The longer time-domainwindow simultaneously reduces the interfering power andcompensates the degradation in frequency resolution.

The detection rule of MW-FPD can be still formulated by (1),but is given by

(9)

where is the tap index and is the number of taps of themultitap window. A Gaussian assumption can be also applied tothe test statistic. Therefore, (5) and (6) can be applied to modelthe sensing-rate performance in the MW-FPD method.

B. Detection-Threshold and Sensing-Time Adaptations

The theoretical detection threshold can be derived from (5).In order to dynamically update the detection threshold, thethreshold should be a function of measured powers, namely thenoise power and interfering power (if adjacent-band interferersare present). In [17], we proposed a framework to derive themean and variance of under and . A matrixformulation for (9) is used to derive the mean, variance andcovariance of as in [18]. Thus, the correlationbetween FFT bins, which is due to the time-domain window, istaken into account. Then, the outer summation process of (1)is modeled by a P-dependent sequence [19]. The correlation


Fig. 6. Detection procedure for the windowed frequency-domain power detector (W-FPD), the windowed-overlapped frequency-domain power detector (WO-FPD), and the proposed multitap-windowed frequency domain power detector (MW-FDP).

between FFT blocks, which is due to overlapping samples inthe time domain, is taken into account as well. Combining thematrix formulation, the P-dependent sequence model, and theGaussian assumption for (1), in [17] we model the detectionthreshold by

(10)

where is the fitting factor determined by the modulationscheme of the primary user and the time-domain multitapwindow. , where andare the in-band noise power and interfering power, respectively.The interfering power is estimated using the power measure-ments in the adjacent bands [17].

Using the methodology described above, the sensing time foreach channel is obtained as

SNR

(11)

where .Therefore, by adapting the detection threshold and sensing

time to the adjacent-band interfering power, the proposed wide-band spectrum-sensing processor is able to achieve the con-strained sensing rates with minimum sensing time.

C. Numerical Simulations

We verified the performance of the proposed algorithms bycomparing the derived and , and Monte Carlo simula-tions. The simulations are obtained assuming a signal strength inthe band of interest to be dB SNR. We also assume the worst-case wideband scenario, where two primary users are present inbands adjacent to the band of interest.

Fig. 7 demonstrates the improvement in detection rate bymeans of MW-FPD as compared to conventional methods. To

Fig. 7. Receiver operating characteristic curves for different power detectors.The multitap-windowed frequency-domain power detector achieves the best de-tection rate.

make a fair comparison, we assume a fixed hardware cost for theFFT processor, which is 1024 points for all methods. This is agood approximation of the overall hardware cost since the FFTblock dominates the area. The WO-FPD requires two FFT cores,so we compare the conventional FFT, the W-FPD, and the pro-posed MW-FPD. A prolate-spheroidal window is applied as thetime-domain window for both the W-FPD and the MW-FPD,but the W-FPD has a length of 1024 and the MW-FPD has alength of 2048. In this example, two primary users with 20 dBINR are placed two bins (400 kHz) away from the band of in-terest. The number of averages in all three methods is 100,corresponding to 0.5 ms for a 200-MHz sampling frequency.The receiver operating characteristics in Fig. 7 indicate that onlythe proposed MW-FPD meets the sensing rate constraints within0.5 ms. For a fixed , MW-FPD achieves a 2x increasein compared to the conventional FFT power detector dueto better filtering, and a factor of 1.3 increase in over theW-FPD due to the compensation of SNR loss.


Fig. 8. Required sensing time for conventional FFT power detector, windowed frequency-domain power detector, and multitap-windowed frequency-domainpower detector as a function of (a) interferer-to-signal spacing and (b) interferer-to-noise ratio. The proposed multitap-windowed power detector requires the leastsensing time to reach a given detection rate.

The sensing-time improvement from the proposed MW-FPDdetector is illustrated in Fig. 8. The impact of the frequency dis-tance between the interfering primary users and band-of-interestsignal is shown in Fig. 8(a). The distance is 1 bin (200 kHz) to8 bins (1.6 MHz), and the INR of the primary users is 30 dB.At 1-bin distance, only our proposed power detector meets thesensing time constraint ( ms). Observe that the sensing timeof the MW-FPD remains constant when the distance is largerthan two bins (400 kHz). Therefore, when applying the multitapwindow, the spectral leakage is confined to the nearest bins forSNR dB and INR dB. Additionally, when the pri-mary users are placed 8 bins away from the band of interest, theW-FPD requires more sensing time than the conventional FFTpower detector due to the SNR loss inherent to the windowingprocess.

The impact of the interfering power on sensing time is shownin Fig. 8(b), assuming that two primary users are placed one bin(200 kHz) away from the band of interest. All three power de-tectors adapt the sensing time to the corresponding in-band in-terfering power according to (11) to achieve fixed sensing rates( and ). The proposed MW-FPD achievesmore than a 10x reduction in sensing time compared to the con-ventional FFT power detector at an INR of 30 dB. The W-FPDrequires the longest sensing time due to the frequency resolutionthat is larger than one bin. This highlights the necessity of usinga multitap window to maintain a fine frequency resolution.

Validation of the detection-threshold adaptation algorithm isillustrated in Fig. 9. The two primary users (INR dB) areplaced one bin (200 kHz) away from the band of interest. Sim-ulation results indicate that without threshold adaptation,starts to rapidly increase once the INR exceeds 5 dB. The pro-posed threshold adaptation effectively satisfies the target false-alarm rate constraint for INR dB (20 dBshown on the plot). For INR dB, the proposed adaptationalgorithm achieves a decrease of by at least a factor of 2.Therefore, the algorithms proposed in this section demonstratereliable signal detection in the presence of strong adjacent-bandprimary users.

Fig. 9. Influence of adaptation on � . The adaptation threshold significantlylowers� as compared to the use of conventional threshold. Both methods useMW-FPD for PSD estimation.

IV. PROPOSED VLSI ARCHITECTURE AND

EXPERIMENTAL RESULTS

In order to further validate the proposed algorithms, thissection proposes a VLSI architecture and discusses its hardwarecomplexity. The architecture is implemented on a real-timecognitive radio testbed to experimentally validate simulationresults. Radio measurements in the ISM band show excellentmatching of experimental and simulation results.

A. Proposed VLSI Architecture

A VLSI architecture suitable for the proposed widebandspectrum-sensing processor is presented in this subsection.Fig. 10(a) shows the architecture of the MW-FPD block. Apipelined FFT architecture provides the highest throughputwith acceptable hardware cost. The window coefficients areprogrammed in a block random access memory (BRAM).This BRAM provides us with the flexibility to reconfigure thetime-domain window. The block for PSD estimation and pro-grammable averaging is controlled by the number of averages


Fig. 10. A VLSI architecture for the proposed spectrum sensing algorithms.

. This block is disabled when the processing time exceedsthe required sensing time for the corresponding channel.

Architectures of the sensing-time adaptation (STA) anddetection-threshold adaptation (DTA) blocks are shown inFig. 10(b) and (c), respectively. The precalculated parameters

, SNR, and are programmed in alook-up table. This look-up table can be reprogrammed withother values of design parameters and sensing specifications.The DTA and STA blocks allow for dynamic tracking ofchannel conditions to maintain the and specificationswithin the minimum sensing time. However, this adaptationadds processing-time latency, which degrades the overallsensing efficiency. To mitigate the processing-time latencyoverhead, a radix-2 long divider with 10 pipeline stages and aCORDIC-based square root with 8 pipeline stages are adoptedin STA and DTA, respectively. A 10- s processing time over-head is achieved (for a 200-MHz sampling frequency) for bothSTA and DTA, which corresponds to 2% of the total sensingtime if no adjacent-band interferer is present and 0.01% of thetotal sensing time if adjacent-band primary users with 30 dBINR are present.

B. Fixed-Length Versus Reconfigurable FFT

In practice, CR primary users can have different (distinct)signal bandwidths. Although we have assumed that all primaryusers have the same signal bandwidth in our system model, ourproposed architecture can accommodate multiple frequency res-olutions required by different communication standards. The1024-point FFT processor channelizes the spectrum into severalsubbands with a resolution equal to the minimum signal band-width (200 kHz), and the channel-occupancy decision is madeFFT-bin by FFT-bin. For a channel that occupies multiple FFTbins, the decision results of the corresponding bins are combinedto identify the occupancy of the channel.

Another approach is to utilize a reconfigurable FFT processorthat supports different FFT sizes to provide multiple frequencyresolutions. In high-resolution mode, the FFT processor is re-configured into a large FFT size to reduce the leakage power. In

Fig. 11. Sensing rates improvements with respective to different frequency res-olution for a 6 MHz DTV signal. Larger FFT size with higher frequency reso-lution results in better sensing rates.

low-resolution mode, the FFT processor is reconfigured into asmall FFT size to reduce the active area and power consumption.

A trade-off between sensing performance (sensing rates andsensing time) and power consumption exists between these twoapproaches. For example, assume a 6 MHz DTV signal. In a200 MHz bandwidth sensing, the required size of the FFT pro-cessor for the 6 MHz signal is 32 points. Using the reconfig-urable architecture results in a 2x lower power consumptionthan using a 1024-point fixed-length FFT. This is due to thesmaller FFT size and assuming the computational complexityis proportional to . However, as shown in Fig. 11, the1024-point fixed-length FFT provides higher spectral resolu-tion and less interfering power. This higher resolution leads tobetter sensing rates and less sensing time, provided strong adja-cent-band interferers are present. The reconfigurable FFT pro-cessor can therefore be used to explore the trade-off between thesensing-performance and power-consumption. The fixed-lengthFFT always provides a higher frequency resolution and is lessvulnerable to the environment with strong adjacent-band inter-ferers. In this work, we target a wideband scenario with strong


Fig. 12. Comparison of relative hardware cost, sensing time, and computationcomplexity for W-FPD, WO-FPD, and MW-FDP.

TABLE IIHARDWARE COMPLEXITY ESTIMATES

adjacent-band interferers, so we use the fixed-length FFT thatmeets our specifications.

C. Hardware Complexity

Comparisons of the relative hardware cost (area), sensingtime and, computational complexity for several windowedpower detector implementations are shown in Fig. 12 andTable II. The conventional FFT power detector is not consid-ered since it cannot satisfy the sensing-time requirement whenstrong adjacent-band primary users are present. Also note thatthe W-FPD and WO-FPD require a 2048-point FFT to meetthe system specifications. Assuming that the same window isapplied to the time-domain samples, the three power detectorswould achieve the same sensing rate with the same . TheW-FPD requires the longest sensing time since a larger FFTprocessor is required to achieve the target frequency resolution.The WO-FPD reduces the sensing time by using two FFT pro-cessors, but has the highest hardware cost due to multiple FFTprocessors. The proposed MW-FPD achieves a 50% reductionin sensing time compared to the W-FPD and a 50% reductionin hardware cost compared to the WO-FPD. The computationalcomplexity is calculated as , where

and are the complexity of an adder and a multiplier,respectively. A 50% reduction in the computational complexityis achieved by using the MW-FPD compared to the W-FPDand WO-FPD. Therefore, the MW-FPD has the lowest sensingtime, lowest computational complexity, and lowest hardwarecost.

The hardware cost in terms of FPGA and ASIC resources wasalso estimated using chip synthesis. The FPGA hardware re-source breakdown is summarized in Table III. The proposed ar-chitecture requires 205 kb of BRAM, 17.6 K slices, and 39 em-bedded multipliers. This is equivalent to a chip area of 0.98 mmin a standard 65-nm CMOS process, as estimated from chip syn-thesis. The memory and logic blocks would occupy 0.82 mmand 0.16 mm , respectively. The estimated power consumption

TABLE IIIFPGA HARDWARE RESOURCE BREAKDOWN FOR MW-FPD

TABLE IVCOMPARISON WITH STATE-OF-THE-ART POWER-DETECTOR ASICS

is 25.1 mW at 200 MHz from a 1-V supply. Table IV com-pares the state-of-the-art processors [20], [21] to our design.Our design can achieve a 200x wider detection bandwidth than[20] with a 2x higher power, and a 20x wider detection band-width than [21] with a 3x higher power. When optimized for lowpower using the methodology in [22], our design is estimated tooperate below 8 mW. A low-power ASIC is being developedand will be presented in the future.

D. Implementation on CR Testbed

The proposed algorithms were verified on a cognitive radiotestbed, which consists of a Berkeley Emulation Engine 2(BEE2) [23], [24] and a custom RF front end [25]. The BEE2consists of five high-performance Xilinx Virtex-II FPGAs, andeach FPGA has access to four XAUI multigigabit interfaces thatallow connectivity to external boards. We use those interfacesto connect the BEE2 to the RF front end, which allows us toverify our proposed algorithm in a true real-time radio. Theradio front end operates in the unlicensed 2.4-GHz ISM bandand can be tuned over 80 MHz. It also contains two 12-bitADCs running at 64 MS/s for both the I and Q componentsgiving a 64 MHz of bandwidth in the digital domain. Since theradio bandwidth in our testbed is limited by the ADC, we scalethe target bandwidth from 200 MHz to 64 MHz. The resultingfrequency resolution and sensing time constraint are therefore62.5 kHz and 150 ms, respectively.

E. Experimental Results

FM-modulated signals in the ISM band were used to exper-imentally validate our simulation results on a radio testbed. A50-kHz signal at a carrier frequency of 2.483 GHz was gener-ated in the band of interest. The signal strength is dBm,which corresponds to dB SNR. Another signal generatorprovided the adjacent-band primary user signals, with the samebandwidth of 50 kHz and signal strength from dBm to

dBm (corresponding to INR from 0 to 30 dB). The fre-quency spacing between the two FM signals was 60 kHz, whichcorresponds to 1 FFT bin in the FPGA implementation. We mea-sured the change in and detection threshold , as well asthe change in and the number of averages , as we in-creased the signal strength of the adjacent-band primary users.


Fig. 13. � and number of averages versus INR.

Fig. 14. � and detection threshold versus INR.

The experiments were repeated 1000 times in order to get sta-tistically relevant results for and .

The proposed sensing-time adaptation algorithm is validatedin Fig. 13. The lines with gray square markers represent thedetection probability without sensing-time adaptation whilethe lines with gray circle markers correspond to the case withsensing-time adaptation. The lines with hollow circle markersshow the adapted number of averages, which are related tosensing time as given by (11). Without sensing-time adaptation,

starts decreasing rapidly as the INR exceeds 15 dB. At 20dB INR, decreases by 25% when no adaptation is used.A 3x increase in the sensing time is required to raise tothe desired value of 0.9. The experimental results (solid lines)closely match the simulation results (dashed lines) discussed inSection III-C.

Fig. 14 demonstrates the validity of the proposed detec-tion-threshold adaptation scheme. The lines with gray squaremarkers represents the false-alarm probability without thresholdadaptation while the lines with gray circle markers illustratethe case with detection-threshold adaptation. The lines withhollow circle markers show the adapted detection threshold,which is normalized to the threshold when no adjacent-bandprimary user is present. Without threshold adaptation,shows a rapid increase as INR exceeds 5 dB. At an INR of10 dB, increases by more than a factor of 2 when no

adaptation is used. A 20% increase in the decision threshold issufficient to compensate for this degradation, bringing itback to the desired value of 0.1. This validates that the ishighly sensitive to the in-band interfering power when a signaldetection is performed in a negative SNR regime. Again, theexperimental results (solid lines) closely match the simulationresults (dashed lines) discussed in Section III-C.

V. CONCLUSION

In this work, we presented a wideband spectrum-sensing pro-cessor for weak-signal detection in the presence of strong adja-cent-band primary users. We found that increasing the sensingtime is not always a good way to achieve reliable detectionrates when strong adjacent interferers are present. Instead, adap-tive methods are needed. Our design consists of a multitap-win-dowed frequency-domain power detector, sensing-time, and de-cision-threshold adaptation algorithms.

The proposed design achieved minimum sensing time withinconstrained sensing rates. The adaptive algorithms, which adaptthe sensing time and the detection threshold to the in-band inter-fering power, have demonstrated the power detector to maintain

and for dB SNR and INR from 0 to 30dB. The performance of the proposed algorithms is validated insimulation and real-time hardware radio testbed.

Simulation studies have shown that in the presence of adja-cent-band interferers with INR dB, our system shows atleast a 2x improvement in the compared to conventionalmethods. The proposed power detector is able to perform re-liable signal detection within 50 ms for a -dB SNR signalwhen primary users with INR dB are present in the ad-jacent bands. An order-of-magnitude reduction in sensing timeis achieved as compared to a conventional FFT power detector.The reduction in sensing time leads to a significant reduction inthe number of operations required to reach a of 0.9 and a

of 0.1. The performance of our algorithms has been con-firmed on FPGA-based real-time radio experiments in the ISMband. The obtained experimental results are in excellent agree-ment with the simulation estimates.

A low-power ASIC chip for this wideband spectrum-sensingprocessor is currently being developed.

ACKNOWLEDGMENT

The authors thank the anonymous reviewers for their com-ments and suggestions.

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Tsung-Han Yu (S’10) received the B.S. and M.S. de-grees in electrical engineering from National TaiwanUniversity, Taipei, in 2005 and 2007, respectively. Heis currently working toward the Ph.D. degree in theDepartment of Electrical Engineering, University ofCalifornia, Los Angeles.

His research is focused on digital integrated cir-cuits and architectures for communication signal pro-cessing. Now he is working on development of al-gorithm and circuit architecture for cognitive radiowideband spectrum sensing.

Oussama Sekkat received the B.S. and M.S. degreesfrom the Electrical Engineering Department at theUniversity of California, Los Angeles, in 2007 and2010. respectively.

He is now an IC design engineer at BroadcomCorporation, Sunnyvale, CA. His research workat UCLA focused on the hardware prototyping ofwireless spectrum sensing processors for cognitiveradio applications.

Santiago Rodriguez Parera received both M.S. de-grees from the Computer Science Engineering De-partment and Electrical Engineering Department atthe Universitat Autònoma de Barcelona, Spain. Hewas with the Katholieke Universiteit Leuven, Bel-gium, and IMEC Belgium for his Ph.D. degree.

During 2009, he was a Visiting Scholar at the Cog-nitive Radio Embedded System Laboratory, Univer-sity of California, Los Angeles. His research interestsinclude digital signal processing for wideband andMIMO spectrum sensing for cognitive radio systems.

During 2009, he was a Visiting Scholar at the Cognitive Radio EmbeddedSystem Laboratory, University of California, Los Angeles. His research interestsinclude digital signal processing for wideband and MIMO spectrum sensing forcognitive radio systems.

Dejan Markovic (S’96-M’06) received the Dipl.Ing.degree from the University of Belgrade, Serbia, in1998 and the M.S. and Ph.D. degrees from the Uni-versity of California, Berkeley, in 2000 and 2006, re-spectively, all in electrical engineering.

In 2006, he joined the faculty of the ElectricalEngineering Department at the University of Cali-fornia, Los Angeles, as an Assistant Professor. Hiscurrent research is focused on digital integratedcircuits and architectures for parallel data processingin wireless communications and neuroscience,

including optimization methods and supporting CAD flows.Dr. Markovic was awarded the CalVIEW Fellow Award in 2001 and 2002

for excellence in teaching and mentoring of industry engineers through the UCBerkeley distance learning program. In 2004, he was a corecipient of the BestPaper Award at the IEEE International Symposium on Quality Electronic De-sign. He received the 2007 David J. Sakrison Memorial Prize from the Depart-ment of EECS, UC Berkeley.

Danijela Cabric received the Dipl.Ing. degree fromthe University of Belgrade, Serbia, in 1998, the M.S.degree in electrical engineering from the Universityof California, Los Angeles, in 2001, and the Ph.D.degree in electrical engineering from the Universityof California, Berkeley, in 2007, where she was amember of the Berkeley Wireless Research Center.

In 2008, she joined the faculty of the Electrical En-gineering Department at the University of California,Los Angeles, as an Assistant Professor. Her key con-tributions involve the novel radio architecture, signal

processing, and networking techniques to implement spectrum sensing func-tionality in cognitive radios.

Prof. Cabric was awarded the Samueli Fellowship in 2008 and the OkawaFoundation research grant in 2009.

A Wideband Spectrum-Sensing Processor With Adaptive Detection Threshold and Sensing Time

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