A Semi-Canonical Form for Sequential AIGs
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A SEMI-CANONICAL FORM FOR SEQUENTIAL AIGS Alan Mishchenko, Niklas Een, Robert Brayton UC Berkeley Michael Case, Pankaj Chauhan, Nikhil Sharma Calypto Design Systems
description
A Semi-Canonical Form for Sequential AIGs. Alan Mishchenko, Niklas Een, Robert Brayton UC Berkeley Michael Case, Pankaj Chauhan, Nikhil Sharma Calypto Design Systems. Motivation. Logic networks often contain duplicate sub-circuits Leads to redundant work - PowerPoint PPT Presentation
Transcript of A Semi-Canonical Form for Sequential AIGs
A SEMI-CANONICAL FORM FOR SEQUENTIAL AIGS
Alan Mishchenko, Niklas Een, Robert Brayton
UC Berkeley
Michael Case, Pankaj Chauhan, Nikhil Sharma
Calypto Design Systems
MOTIVATION
Logic networks often contain duplicate sub-circuits
Leads to redundant work Synthesis and verification tools re-analyze the same
sub-circuit Verification tools waste time on duplicate proof
obligations2
F
a
G
b c d
n m Level 2
Level 1
Level 0
MOTIVATION
Key idea: identify duplicate logic regions
Ideal solution: isomorphism
Our approximate solution: semi-canonical mapping Use the circuit structure to classify each sub-
circuit
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EXAMPLE
Fanout count {b}, {m} are unique Complemented outputs {c} is unique Fanin level {F}, {G} are unique
F
a
G
b c d
n m Level 2
Level 1
Level 0
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EXAMPLE
Sometimes nodes cannot be distinguished
After semi-canonicization: {F, F’}, {G, G’}
Isomorphisms: F ≈ F’ , G ≈ G’
F
a
G
b c d
n m Level 2
Level 1
Level 0
5
F’ G’
IMPLEMENTATION
Implemented within ABC as an internal routine Puts the netlist in semi-canonical form Node order reflects both topological order &
signatures
Application 1: “write_aiger –u” Writes the netlist in semi-canonical form
Application 2: “&iso” Discard isomorphic POs
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ALGORITHM OVERVIEW
Compute signatures for each node Signatures indicate which class a node is in Singleton nodes: nodes that have unique signatures Goal: assign unique signatures for as many nodes as
possible
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F
a
G
b c d
n m Level 2
Level 1
Level 0
Initially all signatures are 0
0
0
0 0
0
0 0 0
ALGORITHM OVERVIEW
Edge value: reflects the structure around an edge
edge_value := hash(driver_signature, edge_is_complemented)
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4
1 3
5 6
8
7
2
F
a
G
b c d
n m Level 2
Level 1
Level 0
0
0
0 0
0
0 0 0
ALGORITHM OVERVIEW
Function: PropagateSignaturesForward() Assign the same random signature to all inputs For each node, signature := hash(old_signature,
fanin edge_values)
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4
1 3
5 6
8
7
2
F
a
G
b c d
n m Level 2
Level 1
Level 0
0
0
0
0
0 0 0
0
12 12 12 12
15 1
9
71
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ALGORITHM OVERVIEW
Function: PropagateSignaturesBackward() Recompute edge values Assign the same random signature to all outputs For each node, signature := hash(old_signature,
fanout edge_values)
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F
a
G
b c d
n m Level 2
Level 1
Level 0
12 12 12 12
15
19
71
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ALGORITHM OVERVIEW
Sometimes we cannot distinguish nodes tie breaking
1) Choose the equiv class with the largest level2) Assign unique signatures to the class nodes3) Propagate signatures to other nodes until
convergence4) If there some equiv classes are left, go to Step 1
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F G
H
EQ3
EQ2
EQ1a
EQ1b EQ1a EQ1b EQ1a
EQ0
71
421
515
IMPLEMENTATION
Implemented within ABC as an internal routine Puts the netlist in semi-canonical form Node order reflects both topological order &
signatures
Application 1: “write_aiger –u” Writes the netlist in semi-canonical form
Application 2: “&iso” Discard isomorphic POs
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IMPLEMENTATION
Application 1: “write_aiger –u” Writes the netlist in semi-canonical form Useful for quickly comparing AIGER netlists
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Netlist N write_aiger -u
N.aig
Netlist N’ write_aiger -u
Nprime.aig
diff
IMPLEMENTATION
Application 2: “&iso” Convert each PO to semi-canonical form
(separately) Discard POs that have duplicate semi-canonical
forms i.e. “drop isomorphic proof obligations”
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F
a
G
b c d
n m Level 2
Level 1
Level 0
F’ G’
a' b’ c’ d’
Counterexamples/invariants on F/G can be re-mapped to F’/G’
EXPERIMENTAL RESULTS
Example FFs ANDs POsPOs
after isoiso
(sec)POs after synthesis
POs
after iso
iso
(sec)
SDCU 2442 14418 834 727 3.2 361 353 .09
TPC_P 1619 1270 948 795 16.00 394 393 .28
TCP_Oh 3838 36890 598 553 4.78 545 541 .55
PC_T 2565 20101 274 258 .55 129 129 .01
SDXIA 7822 78858 600 490 32.04 245 245 .63
DU 10864 84397 946 518 198.14 458 432 .80
Initial AIG Size
1) With industrial verification benchmarks2) Remove isomorphic POs3) Apply synthesis, remove proved POs4) Remove isomorphic POs (again)
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CONCLUSION Previous work:
computing functional symmetries and automorphisms simplifying reachability and SAT instances with
symmetries
First work on semi-canonical labeling of nodes in a sequential AIG
Allows for caching intermediate AIGs in EDA tools
Future work may include: Speeding up propagation of node signatures Generalizing the algorithm to work for logic networks
other than the traditional AIGs16
THANK YOU
Public implementation is available in ABC https://bitbucket.org/alanmi/abc
