A 20.8 41.6-GHz Transformer-Based Wideband Power Amplifier ...
Transcript of A 20.8 41.6-GHz Transformer-Based Wideband Power Amplifier ...
Th3G-6
A 20.8–41.6-GHz Transformer-Based
Wideband Power Amplifier with 20.4-dB Peak
Gain Using 0.9-V 28-nm CMOS Process
C. Wang1, Y. Chen1, J. Tsai2, T. Huang1
1Graduate Institute of Communication Engineering,
National Taiwan University, Taipei, Taiwan2Department of Electrical Engineering,
National Taiwan Normal University, Taipei, Taiwan
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Outline
• Motivation
• Reported Works
• Circuit Design
• Experimental Results
• Summary
2
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Outline
• Motivation
• Reported Works
• Circuit Design
• Experimental Results
• Summary
2
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• MMW frequency range for 5G NR: 24.25 – 52.6 GHz (FR2)
4
Motivation
24 29 37 52 GHz
Multiple
T/RXs
Multiple
T/RXs
Wideband T/RX
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• Wideband MMW PA
–Allows flexibility for spectrum utilization
–Simplifies the assembly process for multi-band transmitters
–Lower costs of front-ends components
• PAs consume most of the power in the transmitter system
–High efficiency
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Motivation
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Outline
• Motivation
• Reported Works
• Circuit Design
• Experimental Results
• Summary
2
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• Procress: 45-nm SOI CMOS
• Topology: Mixed-Signal Doherty
• Small-signal gain BW3dB:22.35-34.5 GHz
• Operating frequency: 27 GHz
• Gain: 19.1 dB
• Psat: 23.3 dBm
• PAEMAX: 40.1%
• Core size: 0.52 mm2
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Reported Works I
F. Wang, T. Li and H. Wang, "4.8 A highly linear super-resolution mixed-signal Doherty power
amplifier for high-efficiency mm-wave 5G multi-Gb/s communications," 2019 IEEE International
Solid- State Circuits Conference - (ISSCC), San Francisco, CA, USA, 2019, pp. 88-90
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• Procress: 28-nm CMOS
• Topology: 2 stage Class-AB CS
• Small-signal gain BW3dB:29-57 GHz
• Operating frequency: 30 GHz
• Gain: 20 dB
• Psat: 16.6 dBm
• PAEMAX: 24.2%
• Core size: 0.16 mm2
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Reported Works II
M. Vigilante and P. Reynaert, “A wideband class-AB power amplifier with 29–57-GHz AM–PM compensation
in 0.9-V 28-nm bulk CMOS,” IEEE J. Solid-State Circuits, vol. 53, no. 5, pp. 1288–1301, May 2018
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Outline
• Motivation
• Reported Works
• Circuit Design
• Experimental Results
• Summary
2
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• Smaller transistor cell
– higher gain and PAE
• Deep-class AB bias
– lower quiescent Pdc
– linear operation close to Psat
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PA Architecture
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9-150
-100
-50
0
50
100
150
200
Tra
ns
co
nd
ucta
nce
[m
A/V
]
VGS
[V]
gm1
gm2
gm3
S
M1
M1
CPAD
Vg,DACn,DA
Cn,DA
Vd,DA
M2
M2
Vg,PACn,PA
Cn,PA
Vd,PA
G
G
S
CPAD
G
G
RFin RFout
Driver Stage:
M1 = 5 × ( 1 m × 32f )
Power Stage:
M2 = 12 × ( 1 m × 32f )
Cn,DA = 35 fF
CPAD = 47 fF
Cn,PA = 91 fF
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• Capacitive Neutralization, Cn = 91fF
• MSG/MAG turning point move from 100 GHz to 10 GHz
• Higher gain and stability
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Neutralization Technique
0 20 40 60 80 100 1200
10
20
30
40
50
MS
G /
MA
G [
dB
]
Frequency [GHz]
w.i. Cn
w.o. Cn
Cn Cn
Vin+ Vin
-
Vout-
Vout+
S. Shakib, H. Park, J. Dunworth, V. Aparin and K. Entesari, "A highly efficient and linear power amplifier for 28-GHz 5G phased array radios in 28-nm
CMOS," IEEE Journal of Solid-State Circuits, vol. 51, no. 12, pp. 3020-3036, Dec. 2016.
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• Transformer with two coupled resonant capacitors
• Calibration-free
• Cpad= 47 fF, Cparasitic= 477 fF
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Output Broadband Matching
M1
M7
M8
M9
AP
M3
:
: :
Zopt*
RFoutCPAD
GND (M1 to M7)
GND
(M1 to M8)
VD,PA
VD,PA
io+
io-
GND (M1 to M3)
L1 (M9+AP)
Z-axis
Z-axis
Cpar
RFout
(50Ω )CPADVd,PA
Cparasitic
io+
io-
L1 L2
L2 (M8+M7)
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Outline
• Motivation
• Reported Works
• Circuit Design
• Experimental Results
• Summary
2
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• The core area is 0.1 mm2
— 500μm × 200μm
• Output matching with AP layer
— darker metal
• TSMC 28-nm CMOS process
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Chip Micrograph
500μm
200μm
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• DC condition
– Bias: Vg,DA = 0.38 V, Vg,PA = 0.32 V
– Supply voltage: VDD= 0.9 V
– Pdc: 39.6 mW
• S-parameters
– Peak gain: 20.4 dB @ 23 GHz
– 3-dB bandwidth: 20.8 – 41.6 GHz
(66.7% fractional bandwidth)
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Simulation & Measured S-parameters
0 10 20 30 40 50-40
-30
-20
-10
0
10
20
30
40
S-p
ara
me
ters
[d
B]
Frequency [GHz]
Sim. S11
Meas. S11
Sim. S21
Meas. S21
Sim. S22
Meas. S22
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• PAEMAX stays above 25% from 22 to 41 GHz
• Psat > 15dBm from 23 to 38.5 GHz
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Measured CW Performance
20 22 24 26 28 30 32 34 36 38 40 42 448
10
12
14
16
18
20
22
24
PSAT
PAEMAX
OP1dB
Frequency [GHz]
Po
ut [
dB
m]
0
5
10
15
20
25
30
35
40
PA
EM
AX [%
]
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• Modulated Signal
– 64-QAM OFDM
– Bandwidth: 100MHz
– PAPR: 9.7 dB
• Under EVM of -25 dB– 8.5% PAE and 7.2 dBm Pout
@ 23 GHz
– 8.8% PAE and 6.9 dBm Pout
@ 41 GHz
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Modulation Measurements
EVM = -25.1 dB
BW = 100 MHz
EVM = -25.4 dBc
BW = 100 MHz
23 GHz
41 GHz
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Ref. This work TCASI’19 IMS’19 JSSCC’18 RFIC’18 ISSCC’19 RFIC’18
Tech. 28-nm CMOS 65-nm CMOS 65-nm CMOS 28-nm CMOS 90-nm CMOS45-nm SOI
CMOS
45-nm SOI
CMOS
Topology2 stage
Class-AB CS
1 stage
Class-F CS
2 stage
Class-AB CS
2 stage
Class-AB CS
1 stage
Cascode
Mixed-Signal
Doherty
1 stage
Class-F/F-1
Cascode
Small-signal gain BW3dB
[GHz]20.8-41.6 25-35 33-41 29-57 22.5-32 22.35-34.5 25.9-43.7
Small-signal gain BW3dB
[%]66.7 33 21.6 65 34.9 42.7 51
VDD
[V]0.9 1.1 1.2 0.9 2.4 2 2
Operation Frequency
[GHz]23/25/30/41 30 39 30/40 24/28 27 28/37/39
Gain [dB] 20.4/19.9/17.8/17.6 10 14.4 20*/20.5* 17.4/16.3 19.1 11.4/10.7/10.5
Psat [dBm] 15.1/15.5/16.1/14.7 14.75 20.7 16.6/15.9 25.6/26 23.3 18.9/18.9/18.9
PAEMAX [%] 30.1/35.3/28.8/26.2 44.5* 35 24.2/18.4 32.8/34.1 40.1 43.2/37/36
OP1dB [dBm] 12.4/12.7/9.8/13 13.2 20.2 13.4/11.1 23.6/23.2 22.4 16.9/17/17.4
Pdc [mW] 39.6 NA NA 170.1 1035 NA 48
Core Area [mm2] 0.1 0.12 0.21 0.16 0.4 0.52 0.14
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Comparison
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Outline
• Motivation
• Reported Works
• Circuit Design
• Experimental Results
• Summary
2
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• Broadband PA implementation
–Proper biasing
–Broadband output-matching
• Performance
–20.4 dB peak gain
–20.8 to 41.6 GHz 3-dB small signal bandwidth
–PAEMAX > 25% from 22 GHz to 41 GHz
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Summary
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Thanks for your attention!
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[1] S. N. Ali, P. Agarwal, S. Gopal, S. Mirabbasi and D. Heo, "A 25–35 GHz neutralized continuous Class-F
CMOS power amplifier for 5G mobile communications achieving 26% modulation PAE at 1.5 Gb/s and
46.4% peak PAE," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 2, pp.
834-847, Feb. 2019
[2] S. Shakib, M. Elkholy, J. Dunworth, V. Aparin and K. Entesari, "A Wideband 28-GHz Transmit–Receive
Front-End for 5G Handset Phased Arrays in 40-nm CMOS," in IEEE Transactions on Microwave Theory
and Techniques, vol. 67, no. 7, pp. 2946-2963, July 2019.
[3] M. M. R. Esmael, M. A. Y. Abdalla and I. A. Eshrah, "A 19-43 GHz Linear Power Amplifier in 28nm Bulk
CMOS for 5G Phased Array," 2019 IEEE Topical Conference on RF/Microwave Power Amplifiers for Radio
and Wireless Applications (PAWR), Orlando, FL, USA, 2019, pp. 1-3.
[4] F. Wang, T. Li and H. Wang, "4.8 A highly linear super-resolution mixed-signal Doherty power amplifier
for high-efficiency mm-wave 5G multi-Gb/s communications," 2019 IEEE International Solid- State Circuits
Conference - (ISSCC), San Francisco, CA, USA, 2019, pp. 88-90
[5] M. Vigilante and P. Reynaert, “A wideband class-AB power amplifier with 29–57-GHz AM–PM
compensation in 0.9-V 28-nm bulk CMOS,” IEEE J. Solid-State Circuits, vol. 53, no. 5, pp. 1288–1301,
May 2018
22
References
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[6] Y. Chen, T. Tsai, J. Tsai and T. Huang, "A 38-GHz-Band Power Amplifier with Analog Pre-distortion for
1600-MHz Transmission Bandwidth 64-QAM OFDM Modulated Signal," 2019 IEEE MTT-S International
Microwave Symposium (IMS), Boston, MA, USA, 2019, pp. 312-315.
[7] W.-C. Huang, J.-L. Lin, Y.-H. Lin, and H. Wang, “A K-band power amplifier with 26-dBm output power
and 34% PAE with novel inductance-based neutralization in 90-nm CMOS,” in Proc. IEEE Radio Freq.
Integr. Circuits Symp. (RFIC), Jun. 2018, pp. 228–231.
[8] T.-W. Li and H. Wang, “A continuous-mode 23.5-41 GHz hybrid class-F/F-l power amplifier with 46%
peak PAE for 5G massive MIMO applications,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC),
Jun. 2018, pp. 220–230.
[9] D. Zhao and P. Reynaert, "A 60-GHz Dual-Mode Class AB Power Amplifier in 40-nm CMOS," in IEEE
Journal of Solid-State Circuits, vol. 48, no. 10, pp. 2323-2337, Oct. 2013.
[10] Y. Zhang and P. Reynaert, “A high-efficiency linear power amplifier for 28 GHz mobile communications
in 40 nm CMOS,” in Proc. IEEE Radio Freq. Integr. Circuits Symp. (RFIC), Jun. 2017, pp. 33–36.
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References