1

ITSE4201 – Machine and Assembly Language

8086 Programs

Practical Appendix

2

Index

Sno Program Page No

1 8-Bit addition using Immediate Addressing mode 7

2 8-Bit addition using Direct Addressing mode 8

3 8-Bit addition using Indirect Addressing mode 9

4 8-Bit subtraction using Immediate Addressing mode 10

5 8-Bit subtraction using Direct Addressing mode 11

6 8-Bit subtraction using Indirect Addressing mode 12

7 8-Bit multiplication using Immediate Addressing mode 13

8 8-Bit multiplication using Direct Addressing mode 14

9 8-Bit multiplication using Indirect Addressing mode 15

10 8-Bit division using Immediate Addressing mode 16

11 8-Bit division using Direct Addressing mode 17

12 8-Bit division using Indirect Addressing mode 18

13 16-Bit addition using Immediate Addressing mode 19

14 16-Bit addition using Direct Addressing mode 20

15 16-Bit addition using Indirect Addressing mode 21

16 16-Bit subtraction using Immediate Addressing mode 22

17 16-Bit subtraction using Direct Addressing mode 23

18 16-Bit subtraction using Indirect Addressing mode 24

19 16-Bit multiplication using Immediate Addressing mode 25

20 16-Bit multiplication using Direct Addressing mode 26

21 16-Bit multiplication using Indirect Addressing mode 27

22 16-Bit division using Immediate Addressing mode 28

23 16-Bit division using Direct Addressing mode 29

3

24 16-Bit division using Indirect Addressing mode 30

25 Addition of 8-Bit array elements 31

26 Check if the given value is positive, negative or zero 32

27 Addition of 8-Bit array elements 33

28 Addition of series 1 + 2 + 3 +…… + n (8- bit hexadecimal values) 34

29 Printing / Generating series on memory locations ( 0, 1, 2, 3 … UPTO N TERMS) 35

30 Printing / Generating series on memory locations ( 0, 2, 4, 6 … UPTO N TERMS) 36

31 Finding Largest value from array 37

32 Finding Smallest value from array 38

33 Block Move (Moving a block of data from one location to another) 39

4

Steps to execute an assembly program using EMU8086

Step 1: Select empty work space and type the program Step 2: Compile the program

Step 3: Run the program

5

Step 4: Observe the changes in the registers during program execution

Step 5: Observe the changes in the memory locations during program execution

6

Step 6: Observe the changes in the flag register during program execution

Step 7: Run till program halts and note the values in registers and memory locations

7

1. 8-Bit addition using Immediate Addressing mode

ORG 100H

MOV AL, 05DH

MOV BL, 0A3H

ADD AL, BL

HLT

Input

Input is already hard coded in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL

5D 3A

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

00 3A

Output

Flags

ZF SF AF PF CF

1 1 1 1

8

2. 8-Bit addition using Direct Addressing mode

ORG 100H

MOV AL, V1

MOV BL, V2

ADD AL, BL

MOV V3, AL

HLT

V1 DB 05DH

V2 DB 0A1H

V3 DB 000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL

5D A1

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

FE A1

Output

Flags

ZF SF AF PF CF

1

9

3. 8-Bit addition using Indirect Addressing mode

ORG 100H

LEA SI, V1

LEA BX, V2

LEA DI, V3

MOV AL, [SI]

MOV BL, [BX]

ADD AL, BL

MOV [DI], AL

HLT

V1 DB 05DH

V2 DB 0A2H

V3 DB 000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

5D A1

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

FE A1

ZF SF AF PF CF

1

Output

Memory

None

10

4. 8-Bit subtraction using Immediate Addressing mode

ORG 100H

MOV AL, 0FDH

MOV BL, 0A3H

SUB AL, BL

HLT

Input

Input is already hard coded in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL

FD A3

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

5A 3A

Output

Flags

ZF SF AF PF CF

1

11

5. 8-Bit subtraction using Direct Addressing mode

ORG 100H

MOV AL, V1

MOV BL, V2

SUB AL, BL

MOV V3, AL

HLT

V1 DB 0EDH

V2 DB 0A1H

V3 DB 000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL

ED A1

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

4C A1

Output

Flags

ZF SF AF PF CF

12

6. 8-Bit subtraction using Indirect Addressing mode

ORG 100H

LEA SI, V1

LEA BX, V2

LEA DI, V3

MOV AL, [SI]

MOV BL, [BX]

SUB AL, BL

MOV [DI], AL

HLT

V1 DB 0E4H

V2 DB 0A2H

V3 DB 000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

E4 A2

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

42 A2

ZF SF AF PF CF

1

Output

Memory

None

13

7. 8-Bit multiplication using Immediate Addressing mode

ORG 100H

MOV AL, 011H

MOV BL, 003H

MUL BL

HLT

Input

Inputs are given using Immediate addressing mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

11 03

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

33 03

ZF SF AF PF CF

Output

Memory

None

14

8. 8-Bit multiplication using Direct Addressing mode

ORG 100H

MOV AL, V1

MOV BL, V2

MUL BL

MOV V3, AL

HLT

V1 DB 022H

V2 DB 004H

V3 DB 000H

Input

Inputs are given using vectors V1, V2, V3 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

22 04

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

88 04

ZF SF AF PF CF

Output

Memory

None

15

9. 8-Bit multiplication using Indirect Addressing mode

ORG 100H

LEA SI, V1

LEA BX, V2

LEA DI, V3

MOV AL, [SI]

MOV BL, [BX]

MUL BL

MOV [DI], AL

HLT

V1 DB 033H

V2 DB 003H

V3 DB 000H

Input

Inputs are given using vectors V1, V2, V3 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

33 03

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

99 03

ZF SF AF PF CF

Output

Memory

None

16

10. 8-Bit division using Immediate Addressing mode

ORG 100H

MOV AL, 00EH

MOV BL, 003H

DIV BL

HLT

Input

Inputs are given using immediate data mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

0E 03

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

02 04 03

ZF SF AF PF CF

AH remainder, AL Quotient

Output

Memory

None

17

11. 8-Bit division using Direct Addressing mode

ORG 100H

MOV AL, V1

MOV BL, V2

DIV BL

MOV V3, AX

HLT

V1 DB 019H

V2 DB 004H

V3 DW 0000H

Input

Inputs are given using vectors V1, V2 data mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

19 04

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

01 06 04

ZF SF AF PF CF

AH remainder, AL Quotient

Output

Memory

None

18

12. 8-Bit division using Indirect Addressing mode

ORG 100H

LEA SI, V1

LEA BX, V2

LEA DI, V3

MOV AL, [SI]

MOV BL, [BX]

DIV BL

MOV [DI], AX

HLT

V1 DB 019H

V2 DB 007H

V3 DW 000H

Input

Inputs are given using vectors V1, V2 data mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

19 07

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

04 03 07

ZF SF AF PF CF

AH remainder, AL Quotient

Output

Memory

None

19

13. 16-Bit addition using Immediate Addressing mode

ORG 100H

MOV AX, 0E15DH

MOV BX, 017A3H

ADD AX, BX

HLT

Input

Inputs are given using immediate data mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

E1 15 17 A3

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

F9 00 17 A3

ZF SF AF PF CF

1 1 1

Output

Memory

None

20

14. 16-Bit addition using Direct Addressing mode

ORG 100H

MOV AX, V1

MOV BX, V2

ADD AX, BX

MOV V3, AX

HLT

V1 DW 04A5DH

V2 DW 0A231H

V3 DW 00000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

4A 5D A2 31

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

EC 8E A2 31

ZF SF AF PF CF

1 1

Output

Memory

None

21

15. 16-Bit addition using Indirect Addressing mode

ORG 100H

LEA SI, V1

LEA BX, V2

LEA DI, V3

MOV AX, [SI]

MOV BX, [BX]

ADD AX, BX

MOV [DI], AX

HLT

V1 DW 0EEEEH

V2 DW 01111H

V3 DW 00000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

EE EE 11 11

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

FF FF 11 11

ZF SF AF PF CF

1 1

Output

Memory

None

22

16. 16-Bit subtraction using Immediate Addressing mode

ORG 100H

MOV AX, 0E15DH

MOV BX, 017A3H

SUB AX, BX

HLT

Input

Inputs are given using immediate data mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

E1 5D 17 A3

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

C9 BA 17 A3

ZF SF AF PF CF

1

Output

Memory

None

23

17. 16-Bit subtraction using Direct Addressing mode

ORG 100H

MOV AX, V1

MOV BX, V2

SUB AX, BX

MOV V3, AX

HLT

V1 DW 04A5DH

V2 DW 0A231H

V3 DW 00000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

4A 5D A2 31

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

A8 2C A2 31

ZF SF AF PF CF

1

Output

Memory

None

24

18. 16-Bit subtraction using Indirect Addressing mode

ORG 100H

LEA SI, V1

LEA BX, V2

LEA DI, V3

MOV AX, [SI]

MOV BX, [BX]

SUB AX, BX

MOV [DI], AX

HLT

V1 DW 0EEEEH

V2 DW 01111H

V3 DW 00000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

EE EE 11 11

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

DD DD 11 11

ZF SF AF PF CF

1 1

Output

Memory

None

25

19. 16-Bit multiplication using Immediate Addressing mode

ORG 100H

MOV AX, 0FFFFH

MOV BX, 0FFFFH

MUL BX

HLT

Input

Inputs are given using immediate data mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

FF FF FF FF

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

00 01 FF FF FF FE

ZF SF AF PF CF

1

DX, AX carries the result

Output

Memory

None

26

20. 16-Bit multiplication using Direct Addressing mode

ORG 100H

MOV AX, V1

MOV BX, V2

MUL BX

MOV V3, DX

MOV V4, AX

HLT

V1 DW 0EEEEH

V2 DW 0EEEEH

V3 DW 00000H

V4 DW 00000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

EE EE EE EE

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

65 44 EE EE DE FF

ZF SF AF PF CF

1

DX, AX carries the result

Output

Memory

None

27

21. 16-Bit multiplication using Indirect Addressing mode

ORG 100H

LEA SI, V1

LEA BX, V2

LEA DI, V3

MOV AX, [SI]

MOV BX, [BX]

MUL BX

MOV [DI], DX

INC DI

INC DI

MOV [DI], AX

HLT

V1 DW 0EEFFH

V2 DW 0EEFFH

V3 DW DUP(0)

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

EE FF EE FF

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

22 01 EE FF DF 1F

ZF SF AF PF CF

1

DX, AX carries the result

Output

Memory

None

28

22. 16-Bit division using Immediate Addressing mode

ORG 100H

MOV AX, 0FFFFH

MOV BX, 00009H

DIV BX

HLT

Input

Inputs are given using immediate values mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

FF FF 00 09

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

1C 71 00 09 00 06

ZF SF AF PF CF

DX, AX carries the result

Output

Memory

None

29

23. 16-Bit division using Direct Addressing mode

ORG 100H

MOV AX, V1

MOV BX, V2

DIV BX

MOV V3, AX

MOV V4, DX

HLT

V1 DW 0EEEEH

V2 DW 00009H

V3 DW 00000H

V4 DW 00000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

EE EE 00 09

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

1A 8C 00 09 00 02

ZF SF AF PF CF

DX, AX carries the result

Output

Memory

None

30

24. 16-Bit division using Indirect Addressing mode

ORG 100H

LEA SI, V1

LEA BX, V2

MOV DI, V3

MOV AX, [SI]

MOV BX, [BX]

DIV BX

MOV [DI], DX

INC DI

MOV [DI], AX

HLT

V1 DW 0FEEFH

V2 DW 00008H

V3 DW 05000H

Input

Inputs are given using vectors V1, V2 mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

FE EF 00 08 5000

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

1F DD 00 08 00 07

ZF SF AF PF CF

DX, AX carries the result

Output

Memory

4FFF 5000 5001 5002 5003

07 DD 1F

31

25. Addition of 8-Bit array elements.

ORG 100H

MOV CX, 05H

MOV AX, 00000H

MOV BX, 00000H

MOV DI, 06000H

NEXT:

ADD AL, ARRAY[BX]

JC CARRY

LOOP NEXT

CARRY:

INC AH

LOOP NEXT

MOV [DI], AX

HLT

ARRAY DB 0FFH, 0FFH, 0FFH, 0FFH, 0FFH

Input

Inputs are given using vectors array mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

00 00 00 00 00 05 6000

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

04 FB 00 00 00 00

ZF SF AF PF CF

1

Output

Memory

5FFF 6000 6001 6002 6003 ….

04 FD

32

26. Check if the given value is positive, negative or zero

ORG 100H

MOV AH, 011H ; IF AH IS 11H THEN WE ASSUME POSITIVE

MOV AL, VALUE

CMP AL, 000H

JZ ZERO

ROL AL, 001H

JC NEGETIVE

JMP STOP

ZERO:

MOV AH, 00H ; IF AH IS 00H THEN WE ASSUME ZERO

JMP STOP

NEGETIVE:

MOV AH, 0FFH ; IF AH IS FFH THEN WE ASSUME NEGETIVE

JMP STOP

STOP:

HLT

VALUE DB 84H

Input

Inputs are given using vector “VALUE” mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

11 84

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

FF 09

ZF SF AF PF CF

1 1 1

Output

Memory None

33

27. Addition of 8-Bit array elements.

ORG 100H

MOV CX, 05H

MOV AX, 00H

MOV BX, 04000H

MOV DI, 05500H

NEXT:

ADD AL, [BX]

JC CARRY

INC BX

LOOP NEXT

JMP STOP

CARRY:

INC AH

INC BX

LOOP NEXT

STOP:

MOV [DI], AX

HLT

Input

Inputs are given using to specified memory locations mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

00 00 40 00 00 05 5500

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

03 3D 40 05

ZF SF AF PF CF

1 1

Input /

Output

Memory

Input Memory

4000 4001 4002 4003 4004 ….

AA 91 69 FC 9D

Output Memory

54FF 5500 5501 5502 5503 ….

3D 03

34

28. Addition of series 1 + 2 + 3 +…… + n (8- bit hexadecimal values)

ORG 100H

MOV AX, 0000H

MOV CX, 000FH

MOV BX, 1111H

AGAIN:

ADD AX, CX

LOOP AGAIN

MOV [BX], AX

HLT

Input

Inputs are given using to specified register 5 terms locations mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

00 00 11 11 00 0F

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

00 78 11 11 00 00

ZF SF AF PF CF

1 1

Input /

Output

Memory

Input Memory

none

Output Memory

1110 1111 1112 1113 1114 ….

78

35

29. Printing / Generating series on memory locations ( 0, 1, 2, 3 … N)

ORG 100H

MOV AX, 0000H

MOV CX, 0009H

MOV BX, 1111H ; STARTING LOCATION TO PRINT SERIES

AGAIN:

MOV [BX], AX

INC AX

INC BX

LOOP AGAIN

HLT

Input

Inputs are given using to specified register 9 terms locations mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

00 00 11 11 00 09

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

00 09 11 1A 00 00

ZF SF AF PF CF

Input /

Output

Memory

Input Memory

none

Output Memory

1111 1112 1113 1114 1115 1116 1117 1118 1119

00 01 02 03 04 05 06 07 08

36

30. Printing / Generating series on memory locations ( 0, 2, 4, 6 … UPTO N TERMS)

ORG 100H

MOV AX, 0000H

MOV CX, 0009H

MOV BX, 1111H ; STARTING LOCATION TO PRINT SERIES

AGAIN:

MOV [BX], AX

INC AX

INC AX

INC BX

LOOP AGAIN

HLT

Input

Inputs are given using to specified register 9 terms locations mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

00 00 11 11 00 09

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

00 09 11 1A 00 00

ZF SF AF PF CF

Input /

Output

Memory

Input Memory

none

Output Memory

1111 1112 1113 1114 1115 1116 1117 1118 1119

00 02 04 06 08 0A 0C 0E 10

37

31. Finding Largest value from array

ORG 100H

MOV CX, 00009H

MOV SI, 02000H

MOV DI, 03000H

MOV AL, 00H

LOOP: CMP AL, [SI]

JC SWAP

INC SI

DEC CX

JNZ LOOP

JMP STOP

SWAP: MOV AL, [SI]

INC SI

DEC CX

JNZ LOOP

STOP: MOV [DI], AL

HLT

Input

Inputs are given using to SI register 10 terms locations mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

00 00 09 2000 3000

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

09 00 00

ZF SF AF PF CF

1 1

Input /

Output

Memory

Input Memory

2000 2001 2002 2003 2004 2005 2006 2007 2008

21 02 AE 06 08 AA BC 9E 9D

Output Memory

2FFF 3000 3001

BC

38

32. Finding Smallest value from array

ORG 100H

MOV CX, 0000AH

MOV SI, 02000H

MOV DI, 03000H

MOV AL, 0FFH ; ASSUMING THE SMALLEST IS ‘FFH’

LOOP: CMP AL, [SI]

JNC SWAP ; THIS INSTRUCTION IS THE ONLY DIFFERENCE

INC SI

DEC CX

JNZ LOOP

JMP STOP

SWAP: MOV AL, [SI]

INC SI

DEC CX

JNZ LOOP

STOP: MOV [DI], AL

HLT

Input

Inputs are given using to SI register 10 terms locations mentioned in the program.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

00 00 09 2000 3000

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

09 00 00

ZF SF AF PF CF

1 1

Input /

Output

Memory

Input Memory

2000 2001 2002 2003 2004 2005 2006 2007 2008

21 02 AE 06 08 AA BC 9E 9D

Output Memory

2FFF 3000 3001

02

39

33. Block Move (Moving a block of data from one location to another)

ORG 100H

MOV CX, 00005H

MOV SI, 02000H

MOV DI, 03000H

LOOP:

MOV AL, [SI]

MOV [DI], AL

INC SI

INC DI

DEC CX

JNZ LOOP

HLT

Input

Inputs are given using to SI register 5 VALUES mentioned in the memory.

AX BX CX DX

AH AL BH BL CH CL DH DL SI DI

00 05 2000 3000

Output

Registers

AX BX CX DX

AH AL BH BL CH CL DH DL

EE 00 00

ZF SF AF PF CF

1 1

Input /

Output

Memory

Input Memory

2000 2001 2002 2003 2004

AA BB CC DD EE

Output Memory

3000 3001 3002 3003 3004

AA BB CC DD EE