8085 microprocessor details bapayya

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8085

MICROPROCESSOR

DETAILS

-kbapayya


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INTEL 8085-Features INTEL 8085 is an 8-bit microprocessor. The data word size of the 8085 microprocessor

is 8-bits. Hence has 8-bit data bus. The address size of 8085 microprocessor is 16-

bits. Hence uses 16-bit address bus. It can directly process on 8-bits of data in single

operation, hence it is known to be an 8-bitmicroprocessor.

It can directly address 2

16

= 65,536 bytes i.e.,64 Kbytes (64 K memory locations) using 16-bits of address.

8085 microprocessor is fabricated using NMOStechnology and comes in an 40-pin DIP(dual-in-

line) package.


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INTEL 8085-Features It requires a single power supply of +5V. It has provision of internal frequency generation

when an crystal is connected between thespecified pins.

The generated clock is by divided by a factor of2, hence to operate an 8085 based system atan frequency of 3 MHz, an crystal of 6 MHzfrequency need to be connected to 8085.

The NMOS 8085 is available in two versions

8085A and 8085A-2 with maximum internalclock frequency of 3.03 MHz and 5 MHzrespectively and hence require an crystal of6.06 MHz and 10 MHz to be connected themrespectively.


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INTEL 8085-Features The enhanced version of 8085 is designed with

HMOS transistors. It is available in threeversions 8085AH, 8085AH-2, 8085AH-1 withmaximum internal clock of 3 MHz, 5 MHz and

6 MHz respectively. The clock cycle of 8085 is of order of 320 ns

and that for 8085AH-2 version is 200 ns.

It has 80 basic instructions and 246 opcodes.

8085 is enhanced version of its predecessor the8080A microprocessor; thus its instruction set isupward compatible with that of 8080A, i.e.,8085 instruction set includes all the 8080A

instructions plus some more instructions.


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INTEL 8085-Features

Thus the programs written for the 8080Awill be executed by the 8085microprocessor.

But 8085 and 8080A are not pincompatible, i.e., the 8085microprocessor can not be used in place

of 8080A microprocessor in an 8080Abase4d system.


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INTEL 8085-Architecture

The internal block diagram of 8085microprocessor consists of the followingmain sections:

An arithmetic and logic unit

A timing and control unit

A set of registers


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Accumulator StatusFlags

TemporaryRegister

ArithmeticAnd

Logical Unit(ALU)

Instruction

DecoderAnd

M/C cycleEncoding

InstructionRegister

(IR)

Timing And ControlUnit

------------------

X1

X2

CLK Control Signals

Data/AddressBufferAddress

Buffer

Incrementer/DecrementerAddress latch

Program Counter(PC)

Stack Pointer (SP)

CBEDLH

A8-A15

AddressBus

AD0-AD7

Address/Data

Bus

InterruptControl

SerialI/O control

.

.

.

Interrupt

Signals

SID

SOD


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ALU

The arithmetic and logical unit(ALU), performsthe following arithmetic and logical operations: Addition Subtraction Logical AND Logical OR Logical Exclusive-OR Complement (Logical NOT) Increment (add 1)

Decrement(Subtract 1) Left shift, Right shift, Rotate Left,Rotate right Clear e.t.c.


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Timing And Control Unit

It is section of CPU.

It generates timing and control signals whichare necessary for the execution of instructions

It controls data flow between CPU andperipherals (including memory).

Provides status, control and timing signalswhich are required for the operation of memoryand I/O devices.

Controls all the operations of microprocessorand peripherals


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Registers Registers are used by the microprocessor for

temporary storage and manipulation of data andinstructions.

Data remains in the register till they are sent tothe memory or I/O devices.

INTEL 8085 microprocessor has the followingregisters: One 8-bit accumulator (ACC) i.e., Register-A

Six 8-bit general purpose registers. These areB,C,D,E,H and L.

One 16-bit stack pointer (SP)

One 16-bit program counter (PC)

Instruction register

Temporary register

Incrementer/Decrementer


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Registers

Accumulator: Accumulator is an 8-bit register associatedwith the ALU.

It is used to hold one of the operands of an

arithmetic or logical operation, the otheroperand is held in either one of the generalpurpose registers or in memory.

After the operation is completed theaccumulator holds the final result.


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Registers General Purpose Registers:

six 8-bit general purpose registers are present in8085.

The general purpose registers present in 8085microprocessor are: B,C,D,E,H and L.

To hold 16-bit data a combination of two 8-bit

registers can be used and are known as register pair. The valid register pairs in 8085 are: B-C,D-E and H-L. H-L pair can be used as an memory pointer to access

the 16-bit address of an memory location indirectly. The general purpose registers and accumulator are

programmer accessible. BC, DE and HL registers are known as scratch pad

registers. Basically this register array is like a small chip of RAM

with addressable memory locations. By using propercontrol signals,the CPU can either load a register fromthe internal data bus or the output of these registers


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Registers

Program Counter (PC): It is a 16-bit special purpose register. It is used to hold the memory address of the

next instruction to be executed.

It keeps the track of memory address of theinstructions in a program while they are beingexecuted.

The microprocessor increments the contentsof the program counter during the executionof an instruction so that it points to theaddress of the next instruction in the programat the end of the execution of an instruction.

It is not programmer accessible.


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Registers Stack Pointer (SP):

It is a 16-bit special function register.The stack pointer holds the address of the top

of the stack i.e., the top most element of datastored in stack and controls the addressing ofthe stack of 8085.

The stack is a sequence of memory locationsset aside by a programmer to store/retrievethe contents of internal registers ofmicroprocessor such asaccumulator,flags,program counter andgeneral purpose registers during theexecution of the program.

Any portion of the memory can be used asstack.

Stack works on FIFO(first-in-first-out)rinci le.


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Registers During the execution of a program some times it

becomes necessary to save the contents of the

registers which are needed for some other operationsin the subsequent steps of the program. The contentsof such registers is saved in stack.

After saving the contents in the stack the registerscan be used for some other operations. After

completing the needed operations the contents whichwere saved in the stack are brought back to theregisters. The contents of only those registers whichare needed in the later part of the program.

The order of the storing into stack should be followed

by the retrieving principle of the element stored lastwill be retrieved first and vice versa.

The stack is defined and stack pointer is initialized bythe programmer at the beginning of a program whichneeds stack operation and then updated due to either

stack instructions in the program or by themicro rocessor while executin some of the


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Registers Instruction Register / Decoder :

The instruction register holds the opcode (operationcode or instruction code) of the instruction which isbeing decoded and executed.

The decoder interprets the instruction and producesthe proper signals to carry it out.

It is not programmer accessible.

Temporary Register: It is an 8-bit register associated with the ALU.

It holds data during an arithmetic/logical operation. It is used by the microprocessor.

It is not accessible to programmer.


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Registers

Incrementer / Decrementer:The Incrementer / Decrementer allows the

contents of any of the 16-bit registers to beincremented or decremented, by logic 1.

Program Status Word:The five bits of the flag register which provide

the information about the status of theinstruction execution along with the threeundefined bits is known as PSW (programstatus word).

Thus the program status word is the flagregister of the microprocessor.


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Flag Register The flag register of 8085 microprocessor

7 6 5 4 3 2 10

The INTEL 8085 microprocessor contains five flip-flops toserve the status of the program/instruction execution asstatus flags. The flip-flops are set or reset according tothe conditions which arise during an arithmetic or logicaloperation.

The five status flags of INTEL 8085 are :1. Carry Flag (CY)

2. Parity Flag (P)

3. Auxiliary Carry Flag (AC)

4. Zero Flag (Z)

5. Sign Flag (S)

Z X PXAC CYS X


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Flag Register If a flip-flop for a particular flag is set, it

indicates 1. When it resets it indicates 0. Carry Flag (CY):

After the execution of an arithmetic instruction if acarry is produced, the carry flag CY is set to 1,otherwise it is 0.

The carry flag is set or reset in case of addition aswell as subtraction.

After the addition of 2 8-bit numbers is performed ifthe result is greater than 8-bits, a carry is produced,and the carry flag is set to 1.

In case of subtraction, if the borrow occurs, the carryflag is set to 1.

Thus carry flag holds the carry out of the mostsignificant bit position resulting from the execution of

an arithmetic operation.


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Flag Register Parity Flag (P):

The parity status flag P is set to 1, if the resultof an arithmetic or logical operation containseven number of 1s. It is reset i.e., it is 0, if theresult contains odd number of 1s

Auxiliary Carry Flag (AC):The Auxiliary Carry flag (AC) holds carry out ofthe lower most nibble to the next nibble i.e.,from bit position 3 to the bit position 4 resultingfrom the execution of an arithmetic operation.

Zero Flag (Z):The Zero status flag (Z) is set to 1, if the resultof an arithmetic or logical operation is 0.If theresult is not zero,the flag is reset i.e, set to 0.


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Flag Register Sign Flag (S):

The Sign flag S is set to 1, if the result of anarithmetic or logical operation executed isnegative. If the result is positive it is reset i.e.,set to 0.

The sign flag has its significance only whensigned arithmetic operation is performed.

To represent a signed number the mostsignificant bit is reserved by the programmer to

represent the sign of a number i.e., the MSB isused as a sign bit which represents the sign ofthe number, if the number is negative the signbit is 1 and if the number is positive the sign bit

is 0.


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Flag Register Sign Flag (S):

After the execution of signed arithmeticoperation, the MSB of the result represents itssign.The sign flag acquires the value of the MSBof the result following the execution of thesigned arithmetic operation. Hence, it

represents the sign of the result.For unsigned arithmetic operations, all the 8-bits are used to represent the magnitude of thenumber. After the execution of an arithmeticoperation, all the 8-bits of the result representsits magnitude. Thus the sign flag has nosignificance in unsigned arithmetic operations.

For logical operations also the sign bit has nosignificance, as the sign flag is set or reset

depending on the value of the MSB of theresult it is set or reset on the value of MSB of


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Flag Register

Sign Flag (S):

The sign flag is affected in the similar way foran signed arithmetic operation of 16-bit, 32-bitor more.

In case of 16-bit operation 15-bits are used for

representing the magnitude of the number andthe 16th bit is used for representing the sign ofthe number.

similarly in case of 32-bit number 31-bits are

used for representing the magnitude and 1-bitis used for representing the sign of the number.


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Flag Register

Effect on the flag register for example of CB+ E9

CB = 1 1 0 0 1 0 1 1

E9 = 1 1 1 0 1 0 0 1

1 --------------------

1 0 1 10 1 0 0

There is a carry from bit position 3 to bitposition 4 thus AC = 1(set)

There is a carry from bit position 7 to bit

position 8 thus CY = 1(set)There is a non zero result thus Z = 0

There are even number of 1s thus P = 1

MSB = 1 thus S = 1.


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Functional unit of 8085

The other functional blocks other than the ALU

and other registers is as follows:1. Internal Data Bus

2. Serial I/O Control

3. Interrupt Control

4.Timing and Control

5. Address Buffer and Address / Data Buffer

Internal Data Bus:

The internal data bus is 8-bits inside and carriesinstructions and data between the CPUregisters.


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Functional unit of 8085 Serial I/O Control :

Generally the Data flowing betweenmicroprocessor will be either parallel or serial,but for some devices it is necessary to acceptdata parallely and output data parallely and ifthere is a provision built in in themicroprocessor for this purpose it is veryefficient.

In 8085 there is such provision through SID andSOD pins.

The SID pin is used for accepting serial datainput.

The SOD pin is used for serial output.


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Interrupt Control:

For handling the interrupts of 8085 this block isprovided.

There is provision of both hardware and softwareinterrupts in INTEL 8085 microprocessor. Hardware Interrupts:

There are five hardware interrupt inputs namelyTRAP, RST 7.5, RST 6.5, RST 5.5, INTR.

TRAP has the highest priority, followed by RST 7.5,RST 6.5, RST 5.5.

INTR has the lowest priority.

When these hardware interrupts are used they are tobe enabled by enabling EI flip-flop using softwareinstruction EI (Enable Interrupt) in the main program.

The use of instruction EI enables all the interrupts.


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The instruction DI (disable Interrupts) is used todisable all the interrupts except the non-maskable interrupt TRAP

The system reset also resets the interruptenable flag(flip-flop).

When an interrupt line goes high the processor

completes its current instruction and saves theprogram counter on the stack. It also resets theInterrupt enable flip-flop before taking up ISR sothat further occurrence of any interrupt isavoided during the execution of current ISR, as

all the interrupts except TRAP can be preventedby resetting the EI flip-flop.

Thus the resetting of EI flip-flop can be doneusing three different ways : By software

instruction DI, System reset or By recognition ofan interrupt request.


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Before the program returns back from the ISR

to the main program all the interrupts are to beenabled using the instruction EI before RETinstruction in the ISR. Software Interrupts:

There is provision for Software interrupts alsofor 8085 microprocessor using RST n where n= 1,2.7.

When RST n instruction is inserted in a

program , the program is executed upto thepoint where RST n has been inserted. This isused in debugging of a program.


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Functional unit of 8085 The interrupts of the 8085 microprocessor are

vectored interrupts and the program control istransferred automatically to a particularaddress which is known as vector address ofthe interrupt.

Interrupt Call-location in HEX

TRAP 0024

RST 7.5 003C

RST 6.5 0034

RST 5.5 002C

RST 7.5,RST 6.5, RST5.5 are maskable interrupts. Theseinterrupts are enabled by software using instructions EIand SIM ( Set Interrupt Mask). The execution of theinstruction SIM enables / Disables interrupts accordingto the bit Pattern of the accumulator.


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Accumulator contents for a SIM instruction:

SOD SOE X R 7.5 MSE M 7.5 M 6.5 M 5.5

RST 5.5 MASK

RST 6.5 MASK

RST 7.5 MASK

MASK SET ENABLE

Reset RST 7.5

Undefined

Serial Output Data

SOD Enable


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RST n HEX-Code CALL-Locations

RST 0 C7 0000

RST 1 CF 0008

RST 2 D7 0010

RST 3 DF 0018RST 4 E7 0020

RST 5 EF 0028

RST 6 F7 0030

RST 7 FF 0038


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Timing and Control:

This section is a part of the CPU and generatestiming and control signals for the execution ofinstructions. Basically this section includes anoscillator and controller sequence. The control

signals of this unit controls data flow betweenCPU and peripherals; and controls the entireoperations of the microprocessor and theperipherals connected to it.

Address Buffer and Address / Data Buffer:The contents of stack pointer or programcounter can be loaded into these buffers. Thesebuffers drive the external address bus andaddress-data bus. The internal data bus is alsoconnected to the address / data buffer to send


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Data and Address Bus The INTEL 8085 is an 8-bit microprocessor. Its

data bus is 8-bit wide and hence, 8 bits of datacan be transmitted in parallel from or to themicroprocessor.

The INTEL 8085 requires a 16-bit wide addressbus as the memory address are of 16-bits.

The 8 most significant bits of the address aretransmitted by the address bus, A-bus (pins A8 A15).

The 8 least significant bits of the address are

transmitted by Address / Data bus, AD- bus( pins AD0 AD7).

The Address / Data bus transmits data andaddress at different moments. At a particularmoment it transmits either data or address.

Thus the AD bus operates in time shared


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INTEL

8085

VSS

VCC

X1

X2_______

Reset In

Reset Out__

IO/M

S0

S1__

RD___

WR

ALE

SID

SOD

READY

AD0 AD7

A8 A15

CLK OUT

HOLD

HLDA

TRAP

RST 7.5

RST 6.5

RST 5.5

INTR

____

INTA

Pin Configuration Of 8085


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Pin Configuration Of 8085 The logical pin out of an 8085 microprocessor

consists of an 40-pin DIP package.

The pins of the 8085 microprocessor can becategorized int the following groups: Address bus

Data bus Control and Status signals Power Supply and Frequency signals Externally initiated signals

Serial I/O ports


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Address Bus: (A8 A15)

Output and Tri-stated lines These are the address bus and are used for

the most significant bits of the memoryaddress or 8-bits of I/O address

Multiplexed Address / Data Bus : ( AD0 AD7) Bi-directional and Tri-stated lines These are time multiplexed address / data

bus I.e., they serve dual purpose. They areused for the least significant 8-bits of memory

address or I/O address during the first clockcycle of the machine cycle.

For the remaining period of the machinecycle they are used to carry data to/from thespecified location or device.


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Pin Configuration Of 8085 Control and Status signals:

___This group of signals includes two controlsignals ( RD

___ __

and WR), three status signals ( IO/M , S1 and

S0) to identify the nature of the operation, andone special signal (ALE) to indicate thebeginning of the operation. These signals are asfollows: ALE Address Latch Enable:

Output and Tri-stated line

It is a Address Latch Enable signal. It goeshigh during the first clock cycle of a machinecycle and enables the lower 8 bits of the

address to be latched either into the memoryor external latch.


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Pin Configuration Of 8085 ___

RD : Read

Output and a tri-stated lineIt is a signal to control read operation

When it goes low the microprocessor reads thedata from the selected memory location or an

I/O device.

___

WR : Write

Output and Tri-stated line

It is a signal to control Write operationWhen it goes low the microprocessor writes thedata into the selected memory or I/O device.


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. __

IO/M : I/O or Memory indicatorOutput and Tri-stated line.

It is a status signal which distinguishes whetherthe Address is for Memory or I/O.

When it goes high the address is for an I/Odevice and when it goes low the address on theaddress bus is for a memory location.

S1 and S0 : Bus state/ status indicator

Output lines.

The status output signals from microprocessorand these signals gives the information aboutthe various types of operations that take place.


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. S1 S2 Operations

0 0 HALT0 1 WRITE

1 0 READ

1 1 FETCH


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Pin Configuration Of 8085 Power Supply and Clock Frequency Signals

The power supply and frequency signals are as

follows: VCC : + 5 V Power Supply VSS : Ground Reference X1 and X2 : Crystal or RC Connections

Input lines These are terminals to be connected to an

external crystal oscillator which drives aninternal circuitry of the microprocessor toproduce a suitable clock for the operation of

microprocessor. CLK(Out) : Clock signalOutput lineIt is a Clock Output for user,which can beused for other digital ICs. Its frequency is

same at which processor operates.


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Pin Configuration Of 8085 Externally Initiated Signals including Interrupts:

There are five Interrupt signals associated with8085 microprocessor along with anacknowledge signal for these interrupts.

apart from the interrupt signals there are the

following externally initiated signals associatedwith 8085 microprocessor pin configurationthey are

HOLD

HLDAREADY

RESET OUT

_________

RESET IN

i C fi i Of 808


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Pin Configuration Of 8085 INTERRUPT Signals

TRAP , RST 5.5, RST 6.5, RST 7.5

INTR : (INPUT) It is an interrupt request signal. Among allthe interrupts this has the least priority, when it goeshigh the program counter does not increment itscontents.The microprocessor suspends its normalsequence of instructions after completing the instruction

in hand and then it jumps to the starting address of theISR after saving the contents of required registers intostack.

The INTR line is sampled in the last state of the lastmachine cycle of the instruction being executed.

The microprocessor acknowledges the interrupt signaland issues an (INTA) signal.

The INTR is enabled or disabled by software.

An interrupt is used by I/O devices to transfer data tothe microprocessor with out wasting its time.

i fi i f


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(INTA) : Output

It is an Interrupt Acknowledgement sent by themicroprocessor after INTR is received.

HOLD: Input

It indicates that another device is requesting for

the use of address and data bus.Havingreceived a HOLD request the microprocessorrelinquishes the use of the buses as soon as thecurrent machine cycle is completed.

Internal processing may continue, the processorregains the buses after the removal of HOLDsignal.

When a HOLD is acknowledged,address bus,

data bus, (RD), (WR) and IO/(M) are Tri-stated.


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HLDA : Output

It is a signal for HOLD acknowledgement. Itindicates that the HOLD request has beenreceived.

The HLDA goes low after the HOLD signal goes

low.The CPU takes over the buses after Half clockcycle of removal of HLDA signal.

READY : Input

It is used by the microprocessor to sensewhether a peripheral is ready to transfer data ornot.

A slow peripheral may be connected to themicroprocessor through the Ready line.

If READY is high the peripheral is ready.If it is


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RESET OUT : Output

Indicates that CPU is being reseted, and is usedby the microprocessor to reset the other sub-systems in the microprocessor based system.

(RESET IN) : Input

It resets the program counter to zero. It alsoresets interrupt enable and HLDA flip-flops. Itdoes not affect any other flag or register exceptthe instruction register.

The CPU is held in the reset condition as long asRESET is applied.

Pi C fi ti Of 8085


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Pin Configuration Of 8085 Serial I/O ports

The 8085 microprocessor has two signals forserial communication i.e., SID and SOD SID: Serial Input Data (Input)

It is data line for serial input. The data on this

line is loaded into the 7

th

bit of theaccumulator when RIM instruction isexecuted.

SOD : Serial Output Data (Output)

It is a data line for serial output. The 7

th

bit ofthe accumulator is output on SOD line whenSIM instruction is executed.

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