8051 Assembly Language Programming
Transcript of 8051 Assembly Language Programming
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Arithmetic InstructionsArithmetic Instructions
There are 24 arithmetic instructions which are grouped into the following types:ADD and ADDCSUBBMULDIVINCDECDA
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Flag: It is a 1-bit register that indicates the status of the result from an operation
Flags are either at a flag-state of value 0 or 1
Arithmetic flags indicate the status of the results from mathematical operations ( +, , *, / )
Arithmetic FlagsArithmetic Flags
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There are 4 arithmetic flags in the 8051 Carry (C) Auxiliary Carry (AC) Overflow (OV) Parity (P)
All the above flags are stored in the Program Status Word (PSW)
Arithmetic Flags (Conditional Flags)Arithmetic Flags (Conditional Flags)
CY AC -- RS1
RS0
0V -- P
PSW.7
PSW.6
PSW.5
PSW.4
PSW.3
PSW.2
PSW.1
PSW.0
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Arithmetic Flags (Conditional Flags)Arithmetic Flags (Conditional Flags)
CY PSW.7 Carry flag AC PSW.6 Auxiliary carry flag -- PSW.5 Available to the user
for general purpose RS1 PSW.4 Register Bank
selector bit 1 RS0 PSW.3 Register Bank
selector bit 0 0V PSW.2Overflow flag -- PSW.1 User definable flag P PSW.0 Parity flag
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Arithmetic Flags Arithmetic Flags (Conditional Flags)(Conditional Flags)
The C flag is keeping track in unsigned operations, the OV flag is keeping track in signed operations
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Instructions that Affecting Flags(1/2)Instructions that Affecting Flags(1/2)
Instruction Mnemonic
Flags Affected
ADD C AC OV
ADDC C AC OV
SUBB C AC OV
MUL C = 0 OV
DIV C = 0 OV
DA A C
SETB C C = 1
MOV C, bit C
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Instructions that Affecting Flags (2/2)Instructions that Affecting Flags (2/2)
Instruction Mnemonic Flags Affected
ORL C, bit C
ANL C, bit C
RLC C
RRC C
CLR C C = 0
CPL C C = /C
CJNE C
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ADD A, source ; A = A + sourceADDC A, source ; A = A + source + C
A register must be involved in additions.
The C flag is set to 1 if there is a carry out of bit 7
The AC flag is set to 1 if there is a carry out of bit 3
The ADD and ADDC InstructionsThe ADD and ADDC Instructions
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ADD is used for ordinary addition
ADDC is used to add a carry after the LSB addition in a multi-byte process
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ExampleExample
1)Show how the flag register is affected by the following instructions.
MOV A, #0F5h ; A = F5hADD A, #0Bh ; A = F5 + 0B =
00
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Solution F5h 1111 0101
+0Bh 0000 1011
100h 0000 0000
After addition register A contains 00h and the flags that are affected are CY = 1 since there is a carry out from D7. P = 0 because the number of 1s is zero.AC = 1 since there is a carry from D3 to D4.
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Example Example
2)Assume that RAM locations 40h – 42h have the following values. Write a program to find the sum of the values in these locations. At the end of the program, register A should contain the low byte and R7 contain the high byte.
RAM locations: 40h = (7Dh), 41h = (EBh), 42h = (C5h)
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SolutionSolution
MOV A, 40h ; set A = RAM location 40h MOV R7, #0 ; set R7 = 0 ADD A, 41h ; add A with RAM location 41h JNC NEXT ; if CY = 0 don’t accumulate carry INC R7 ; keep track of carryNEXT: ADD A, 42h ; add A with RAM location 42h JNC NEXT1 ; if CY = 0 don’t accumulate carry INC R7 ; keep track of carryNEXT1: END
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Example Example
3) Write a program segment to add two 16-bit numbers. The numbers are 3CE7h and 3B8Dh. Place the sum in R7 and R6; R6 should store the lower byte.
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Example Example
CLR C ; make C=0 MOV A,#0E7h ; load the low byte now A=E7h ADD A,#8Dh ;add the low byte now A=74h, C=1 MOV R6,A ; save the low byte of the sum in R6 MOV A,#3Ch ; load the high byte ADDC A,#3Bh ; add with the carry
; 3B + 3C + 1 = 78 (all in hex) MOV R7,A ; save the high byte of the sum
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DA A The action is to “decimal adjust” the
register A Used after the addition of two BCD
numbers
The DA InstructionThe DA Instruction
ADDC …..DA A
ADD …..DA A
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The DA The DA InstructionInstruction
MOV A,#47h ; A=47h first BCD operand : MOV B, #25h ; B=25h second BCD operandADD A , B ; hex (binary) addition (A=6Ch)DA A ; adjust for BCD addition (A=72h)
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Example of DA InstructionExample of DA Instruction Hex BCD
47 0100 0111+ 25 + 0010 0101
6C 0110 1100+ 6 + 0110
72 0111 0010Offset decimal 6 !
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SUBB A, source
No borrow: A = A – source
With borrow: A = A – source – carry (i.e. borrow)Note that the 8051 uses the 2’s
complement method to do subtraction
The SUBB InstructionThe SUBB InstructionSUBB A, #dataSUBB A, directSUBB A, @Ri , where i =0 or 1SUBB A, Rn, where n =0,1,,7
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After execution:
The C flag is set to 1 if a borrow is needed into bit 7
The AC flag is set to 1 if a borrow is needed into bit 3
The SUBB The SUBB InstructionInstruction
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MUL ABUses registers A and B as both source and destination registers
Numbers in A and B are multiplied, then put the lower-order byte of the product in A and the high-order byte in B
The MUL InstructionThe MUL Instruction
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The MUL InstructionThe MUL InstructionThe OV flag is set to 1 if the product > FFhNote that the C flag is 0 at all times
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DIV ABSimilarly, it uses registers A and B as both source and destination registers
The number in A is divided by B. The quotient is put in A and the remainder (if any) is put in B
The OV flag is set to 1 if B has the number 00h (divide-by-zero error)
Note that the C flag is 0 at all times
The DIV InstructionThe DIV Instruction
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To increment (INC) or decrement (DEC) the internal memory location specified by the operand.
The INC and DEC InstructionsThe INC and DEC Instructions
INC AINC directINC @Ri where i=0,or 1INC Rn where n=0,,7
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The INC and DEC The INC and DEC InstructionsInstructions
No change with all the arithmetic flags in this operation
e.g. INC 7Fh ; content in 7Fh increased by 1 DEC R1 ; content in R1 decreased by 1
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Logical operations
Rotate and swap operations
Comparison operations
Logic Operation in 8051Logic Operation in 8051
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ANDORXOR (exclusive-OR)NOT (invert/complement)
General Logic FunctionsGeneral Logic Functions
There are instructions available for the 8051 to implement the following logic functions
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ANL destination, source
Destination = destination AND source
Logical InstructionsLogical InstructionsANL direct, AANL direct, #dataANL A, #dataANL A, directANL A,@Ri where i=0,or 1ANL A, Rn where n=0,,7
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Logical Logical InstructionsInstructions
ORL destination, sourceDestination = destination OR source
XRL destination, sourceDestination = destination XOR source
Usually, the destination is register A or a direct address in the internal RAM
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The source operand can be any of the 4 addressing modes (i.e. immediate/register/ direct/indirect)ANL can be used to clear (0) certain bitsORL can be used to set (1) certain bits
Logical InstructionsLogical Instructions
Instruction ANL A,R0 ORL A,R0 XRL A,R0
A before: 10010111 10010111 10010111R0 before: 11110010 11110010 11110010A afterwards: 10010010 11110111 01100101
ExamplesExamples
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CLRAAll bits in register A are clearedCPLAAll bits in register A are complemented (inverted)Note that CLR and CPL instructions operate on register A only
The CLR and CPL InstructionsThe CLR and CPL Instructions
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Contents in register A is rotated one bit position to the left or to the right (operated in A only)The bit shifted out is used as the new bit shifted inMay include the C flag in the operationUseful in inspecting the bits in a byte one by oneAlso useful for multiplication and division in powers of 2
The Rotate InstructionsThe Rotate Instructions
RL ARR A
RLC ARRC A
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RL A Rotates A one bit position to the leftRLC A Rotates A and the carry flag one bit position to the leftRR A Rotates A one bit position to the
rightRRC A Rotates A and the carry flag one bit position to the rightNote that for RLC and RRC, you have to know the C flag first
The Rotate InstructionsThe Rotate Instructions
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01234567
RL A
01234567C
RLC ACarry Flag
01234567
RR A
Before: 10011100 After: 00111001
C01234567
Carry FlagRRC A
Before: 10011100 CY = 0 After: 00111000 CY = 1
Before: 10011100 After: 01001110
Before: 10011100 CY = 1 After: 11001110 CY = 0
The Rotate InstructionsThe Rotate Instructions
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Swapping the lower-nibble (lower 4 bits) and the higher-nibble (upper 4 bits) of register A.
017 6 5 4 3 2
High Nibble Low Nibble
SWAP A
The SWAP InstructionThe SWAP Instruction
Register A = 5Eh (original value) after SWAP Register A = E5h
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CJNE destination, source, relative addressCompare the source and destination operands firstJump to the relative address (subroutine) if they are not equal Carry flag = 1, if destination-byte is less than the source-byte, Otherwise, the carry flag is cleared.
Comparison OperationComparison Operation
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Comparison OperationComparison Operation
CJNE A, #data, relativeCJNE A, direct, relativeCJNE @Ri, #data, relative where i=0 or 1
CJNE Rn, #data, relative where i=0,,7
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; example !! CJNE R7, #60H, NOT_EQ ; now R7 = 60H ……………….. NOT_EQ: JC REG_LOW ; now C = 0, ie. R7 > 60H ……………….. REG_LOW: ; now C = 1. ie. R7 < 60H
Comparison OperationComparison Operation
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Example Example
Write a program segment to monitor P1 continuously for the value of 63h. It should get out of the monitoring only if P1 = 63h.
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Example 6-5Example 6-5
Solution :MOVP1, #0FFh ; make P1 an input portHERE:MOV A, P1 ; get P1CJNEA, #63h, HERE ; keep monitoring unless ;P1=63h
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Addressing mode: a method that… Points out where the operands (i.e. source
and destination) are, and How these operands should be accessed
The opcode in an instruction specifies what addressing mode will be used
Addressing ModesAddressing Modes
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Immediate addressing Register addressing Direct addressing Register indirect addressing Indexed addressing Absolute addressing Long addressing Relative addressing
Addressing Modes Addressing Modes
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Source operand is a constant number/character – “immediate data”#”
e.g. ADD A, #56h ; add 56(16) to the number in register A
e.g. MOV R6, #81 ;load 81(10) into R6 Applications: e.g. initialize a number of registers to zero; overwrite a constant character
Immediate AddressingImmediate Addressing
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Examples of Immediate AddressingExamples of Immediate Addressing
Instruction Operation MOV A, #0AFh Copy the immediate data “AFh” to the A
register ANL 15h, #88h Logical AND (bit by bit) the content of the
address 15h with the immediate data “88h” MOV DPTR, #0ABCDh Copy the immediate data “ABCDh” to the
DPTR register MOV R3, #1Ch Move the immediate data “1Ch” to register R3
MOV R2, #’A’ Move the ASCII character “A (41h)” to register R2
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Add “#” before any immediate data
Only the source operand can be immediate
Add “h” after a base-16 number, “b” after a base-2 number; otherwise assumed base-10
Use ‘ ’ to enclose any character
Precede all base-16 numbers that begin with A-F by a “0”
Notes of Immediate AddressingNotes of Immediate Addressing
MOV A,#ABh
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Source/destination/both of them are registers located in the CPU registers (i.e. R0 – R7; A; DPTR)
e.g. MOV A, R5; copy contents of R5 into A
e.g. MOV R3, A ; copy the contents of A into R3
e.g. ADD A, R2; add the contents of R2 to contents of A
e.g. MOV R7, DPL
MOV R6, DPH
Register AddressingRegister Addressing
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The most efficient addressing mode:
No need to do memory access
Instructions are much shorter
Result: speed (hence efficiency) increased
We can move data between Acc and Rn (n = 0 to 7) but movement of data between Rn registers is not allowed
e.g. MOV R4, R7 (Invalid)
Notes of Register AddressingNotes of Register Addressing
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Source/destination/both of them are specified by an 8-bit address field in the instruction
Use this mode to access the 128 bytes of RAM and the SFR.
Location of operand is fixed cannot be changed when program is running, but content can be changed
Inflexible to address elements in a table of data
Direct AddressingDirect Addressing
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Instruction Operation MOV 80h, A or MOV P0, A
Copy contents of register A to location 80h (Port 0 latch)
MOV A, 80h or MOV A, P0
Copy contents of location 80h (Port 0 pins) to register A
ABC EQU 80h MOV A, ABC
Copy contents from direct address with label ABC to register A, ie. Port 0 to A
MOV R0, 12h Copy contents from RAM location 12h to register R0
MOV 0A8h, 77h or MOV IE, 77h
Copy contents from RAM location 77h to IE register of SFRs
Examples of Direct AddressingExamples of Direct Addressing
Note: No “#” sign in the instruction MOV direct,direct
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Examples of Direct AddressingExamples of Direct Addressing
MOV R2, #5 ; R2 = 05
MOV A, 2 ; copy location 02 (R2) to A
MOV B, 2 ; copy location 02 (R2) to B
MOV 7, 2 ; copy location 02 to 07 (R2 ;to R7) since “MOV R7,
R2” ;is invalid
MOV direct,direct
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Stack and Direct Addressing ModeStack and Direct Addressing Mode
Only direct addressing mode is allowed for pushing onto the stack
PUSH A (Invalid)
PUSH 0E0h (Valid)
PUSH R3 (Invalid)
PUSH 03 (Valid)
POP R4 (Invalid)
POP 04 (Valid)
PUSH directPOP direct
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The address value is limited to one byte, 00 – FFh (128-byte RAM and SFR)
Using MOV to move data from itself to itself can lead to unpredictable results error
MOV data to a port changes the port latch
MOV data from port gets data from port pins
Notes of Direct AddressingNotes of Direct Addressing
MOV A, A
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Use a register to hold the address of the operand; i.e. using a register as a pointer
Only R0 and R1 can be used when data is inside the CPU (address ranges from 00h – 7Fh)
R0 ,R1 and DPTR can be used when addressing external memory locations “@”
Register Indirect AddressingRegister Indirect Addressing
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AfterAfter
Program memory
BeforeBefore
Addresses
ACC
R0ADD A, @R0
200
201
Data memory
1231
32
30
10
31
ACC
R0
31
22
Register Indirect Addressing Register Indirect Addressing (eg. ADD A,@R0)(eg. ADD A,@R0)
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Instruction Operation
MOV @R1, A Copy the data in A to the address pointed to by the contents of R1
MOV A, @R0 Copy the contents of the address pointed to by register R0 to the A register
MOV @R1, #35h Copy the number 35h to the address pointed to by register R1
MOV @R0, 80h or MOV @R0, P0
Copy the contents of the port 0 pins to the address pointed to by register R0.
MOVX A, @R0 Copy the contents of the external data address pointed to by register R0 to the A register
MOVX A, @DPTR Copy the contents of the external data address pointed to by register DPTR to the A register
Examples of Indirect AddressingExamples of Indirect AddressingMOV @Ri,#data where i=0 or 1
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Write a program segment to copy the value 55h into RAM memory locations 40h to 44h using:
(c) Direct addressing mode;(d) Register indirect addressing mode without a
loop; (e) and with a loop.
Example Example
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MOV A, #55h ; load A with value 55h
MOV 40h, A ; copy A to RAM location 40h
MOV 41h, A ; copy A to RAM location 41h
MOV 42h, A ; copy A to RAM location 42h
MOV 43h, A ; copy A to RAM location 43h
MOV 44h, A ; copy A to RAM location 44h
Solution 1Solution 1
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MOV A, #55h ;load A with value 55h
MOV R0, #40h ;load the pointer. R0 = 40h
MOV @R0, A ;copy A to RAM location ;R0 points to
MOV @R0, A ; copy A to RAM location R0 points to
Solution 2 Solution 2
register indirect addressing mode without a loop
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INC R0 ;increment pointer. Now R0 = 41h MOV @R0, A ;copy A to RAM location R0
;points toINC R0 ; increment pointer. Now R0 = 42h MOV @R0, A ;copy A to RAM location R0
;points to INC R0 ;increment pointer. Now R0 = 43h MOV @R0, A ;copy A to RAM location R0 points
;to INC R0 ;increment pointer. Now R0 = 44h
Solution Solution
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MOV A, #55h ; A = 55h
MOV R0, #40h ; load pointer. R0 = ;40h, RAM address
MOV R2, #05 ; load counter, R2 = 5
AGAIN:MOV @R0, A ; copy A to RAM ;location pointed
by R0
INC R0 ; increment pointer R0
DJNZ R2, AGAIN ; loop until counter = ;zero
Solution 3Solution 3
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Using pointer in the program enables handling dynamic data structures an advantageDynamic data: the data value is not fixedIn this mode, we can defer the calculation of the address of data and the determination of the amount of memory to allocate at (program) runtime
Notes of Indirect AddressingNotes of Indirect AddressingRegister or direct addressing (eg. MOV A, 30H) cannot be used ,since they require operand addresses to be known at assemble-time.
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Using a base register (starting point) and an offset (how much to parse through) to form the effective address for a JMP or MOV instructionUsed to parse through an array of items or a look-up tableUsually, the DPTR is the base register and the “A” is the offsetA increases/decreases to parse through the list
Indexed AddressingIndexed AddressingMOVC A, @A+DPTRMOVC A, @A+PCJMP @A+DPTR
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AfterAfter
Program memory
BeforeBefore
ACC
DPTR
MOVC A, @A + DPTR2000
2001
41
00 10
31
ACC
56
56
MOVC A, @A + DPTR
Example: MOVC A,@A+DPTR
Indexed AddressingIndexed Addressing
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Instruction Operation
MOVC A, @A + DPTR Copy the code byte, found at the ROM address formed by adding register A and the DPTR register, to A
MOVC A, @A + PC Copy the code byte, found at the ROM address formed by adding A and the PC, to A
JMP @A + DPTR Jump to the address formed by adding A to the DPTR, this is an unconditional jump and will always be done.
Examples of Indexed AddressingExamples of Indexed Addressing
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Examples of Indexed AddressingExamples of Indexed Addressing
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Example Example
Write a program to get the x value from P1 and send x2 to port P2, continuously.
ORG 0hMOV DPTR, #300h ; load look-up table address
MOV A, #0FFh ; A = FF MOV P1, A ; configure P1 as input portBACK: MOV A, P1 ; get X
MOV A, @A+DPTR ; get X square from tableMOV P2, A ; issue it to port P2
SJMP BACK ; keep doing itORG 300h
TABLE: DB 0, 1, 4, 9, 16, 25, 36, 49, 64, 81END
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Used in jump (“JMP”) instructions
Relative address: an 8-bit value (-128 to +127)
You may treat relative address as an offset
Labels indicate the JMP destinations (i.e. where to stop). Assembler finds out the relative address using the label
Relative AddressingRelative Addressing
SJMP relativeDJNZ direct, relativeDJNZ Rn, relative where n=0,1,,,7
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The relative address is added to the PCThe sum is the address of the next instruction to be executedAs a result, program skips to the desired line right away instead of going through each line one by oneLabels indicate the JMP destinations (i.e. where to stop).
Relative AddressingRelative Addressing
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Program counter + offset
= Effective address
= address of next instruction
+ Offset
Branch OpcodeOffset
Next Opcode
Next Instruction
Program Counter
Relative AddressingRelative Addressing
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Instruction Operation
SJMP NXT Jump to relative address with the label 'NXT'; this is an unconditional jump and is always taken.
DJNZ R1, DWN Decrement register R1 by 1 and jump to the relative address specified by the label 'DWN' if the result of R1 is not zero.
Examples of Relative AddressingExamples of Relative Addressing
0035
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Only used with the instructions ACALL and AJMPSimilar to indexed addressing modeThe largest “jump” that can be made is 2K
Absolute AddressingAbsolute Addressing
Only used with the instructions LCALL and LJMPSimilar to indexed addressing modeThe largest “jump” that can be made is 64K
Long AddressingLong AddressingACALL address11AJMP address11 211 = 2048=2K
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Absolute addressing: 11-bit address in 2-byte instructionLong addressing: 16-bit address in 3-byte instructionRange of the “jump” of long is greater than absoluteYet absolute mode has shorter code (2 bytes), hence faster execution
Absolute vs Long AddressingAbsolute vs Long Addressing
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There are many methods to do a taskSome are more efficient while some are notChoosing the right addressing mode will enable us to finish the task efficientlyLet’s take a simple case as example: “Clear the memory location from 30h to 7Fh.”We can use MOV instruction in direct addressing mode to nullify these memory one by oneBut the program will be too lengthy and space-consuming
Why So Many Modes?Why So Many Modes?
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MOV 30h, #00h ; Clear Array [0]
MOV 31h, #00h ; and Array [1]
. ; Keep on going
.
.
MOV 7Eh, #00h ; Clear Array [78]
MOV 7Fh, #00h ; Clear Array [79]Direct addressing mode uses up 240 bytes
MOV R0, #30h ;Set up pointer to start of array
clear_arr: MOV @R0, #00 ;Clear target byte pointed to by R0
INC R0 ; Advance pointer by 1
CJNE R0, #80H, clear_arr ;Has pointer reached 80 ?
NEXT: . . . . . . . . ; if not over the top THEN again ELSE
; next instruction
Indirect addressing mode uses up 8 bytes ONLY, with a saving of 232 bytes !
Why So Many Modes?Why So Many Modes?
So, we may try using indirect addressing mode like this:
5x16x3 = 240Since 3 bytes for MOV direct, #data
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Yet, the program is still too long.A much better method would be writing a subroutine (= function in C programming) to do nullificationWrite a loop to call the subroutine for (7F-30+1) times to nullify all memoryAs a result, we don’t have to write so many lines of program
A Little Further …..A Little Further …..