G H PATEL COLLEGE OF ENGINEERING AND TECHNOLOGY

DEPARTMENT OF INFORMATION TECHNOLOGY

Subject : 2131004 (Digital Electronics)

Preparad By:AJAY THAKKAR (130110107001) ANKIT KAPATEL (130110107011)HEMANT SUTHAR (130110107058)

REALIZATION OF LOGIC FUNCTION USING LOGIC GATES

1. F(A,B)=AB+A’B’

SIMPLE IMPLEMENTATION USING AOI LOGIC:-

SOLUTION :-

• For solving this logical function first we invert both the inputs A and B so we get (A’ and B’).

• And then connect this inverted inputs to the AND gate.so ,we get (A’B’) .

• Then we connect both the inputs A and B to the AND gate we get (AB).

• And finally we connect this two outputs of this two AND gates to the inputs of OR gate so we get the output as Y=A’B’ + AB.

• We can also implement this expression using directly X-NOR gate.

2.F(A,B,C)=((AB)’+C)’

SIMPLE IMPL. USING UNIVERSAL GATES:

SOLUTION :-

• First we give A and B as a input of the NAND gate .

• Out put of this NAND gate and another input c is connected to the input of the NOR gate.

• Finally we gate the expression as Y= ((AB)’ + C)’.

3.F(A,B,C,D)=A’B(D’+C’D)+B(A+A’CD)

COMPLEX IMPL. USING AOI LOGIC:

SOLUTION :-

• First we invert the input A as (A’). And then this A’ and B are connected as a input

of the AND gate. Then we invert the input D as (D’) . And then connect this D’ and

C as a input of the another AND gate. So we get (D’C). Then connect this and D’ to

the input of the OR gate so we get Y1’=(D’ + D’C).

• Then connect this two expression Y1’ and A’B as a input of the AND gate. So we

get Y2’=A’B(D’ + D’C) .

• Now take A’ and C as a input of the AND gate and output of this AND gate and D

input are connected as a input of the OR gate. So we get Y3’=(A+A’CD). Now this

y3’ and B are taken as a input for the AND gate. So we get Y4’=BY3’.

• And finally connect this Y4’ and Y2’ as a input of OR gate so we get ,

• Y= A’B(D’ + D’C) + B(A+A’CD).

4.F(A,B,C)=A’BC+AC

COMPLEX IMPL. USING ONLY NAND GATES:

SOLUTION :-First simplify the expression in terms of NAND gate:

1) y=((A’BC + AC)’)’ [ because (A’)’ = A ]

2) Y=((A’BC)’ (AC’)’)’

3) Now it can be implemented using NAND gates as shown in above fig.

5.F(A,B)=(A+B’)(A+B)

COMPLEX IMPL. USING ONLY NOR GATES:

SOLUTION :-First for finding the solution using NOR gate we convert this expression

into appropriate form. So,

1) Y=(((A+B’)(A+B))’)’ [ because (A’)’ = A ]

2) Y= ((A+B’)’ + (A+B)’)’

3) Now it can be implemented using NOR gate as shown in above fig.

REDUCTION OF LOGIC FUNCTION:-

• We can also implement the circuit after the minimization process of logic function.

• It is beneficial to us because it can reduce the no. of gates , and complexity of our circuit.

• This function minimization process is called K-map simplification.

6.F(A,B,C,D)=A’B’C’D’+A’B’C’D+A’BC’D+AB’C’D’+AB’C’D+A’B’CD’+AB’CD’

F(A,B,C)=B’C’+B’D’+A’C’D So, we can see that function reduces to simple form. Now ,we implement this derived function using gates which

gives o/p exactly same as real function.

K-MAP SIMPLIFICATION CIRCUIT:-