6/3/20151 Developing a multi-thread product – Introduction (ENCM491 – real time operating...

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03/27/22 1 Developing a multi-thread product – Introduction (ENCM491 – real time operating systems in 1 hr) M. Smith Electrical Engineering, University of Calgary Smithmr @ ucalgary.ca
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Transcript of 6/3/20151 Developing a multi-thread product – Introduction (ENCM491 – real time operating...

04/18/23 1

Developing a multi-thread product – Introduction(ENCM491 – real time operating systems in 1 hr)

M. Smith

Electrical Engineering, University of Calgary

Smithmr @ ucalgary.ca

04/18/23 2 / 45

References

1) Understanding GPS Principles and Applications, 1996, Elliott D. Kaplan

2) Digital Signal Processing – A Practical Approach, 1993, Emmanuel C. Ifeachor, Barrie W. Jervis

3) ADSP-TS101 TigerSHARC and Blackfin Processor Programming References, Analog Devices

4) Articles submitted to Circuit Cellar magazine by M. Smith, March 2004

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Introduction

GPS traditionally done with ASIC/Processor combination

Looking at FPGA/DSP combination for low end GPS receivers

Technological interest in software radio Cheaper, quicker development cycle. Customizations for special applications

From a talk by Darrell Anklovitch for ENEL619.23

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What is GPS?

Global Positioning System

24 satellite (SV) constellation

Orbits are set-up to give global coverage24 hours a day

Need at least 4 satellites in view to calculate a position

Orbiting 20,000 km from the surface of the Earth in 12 hour cycles

(1)

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GPS Positioning Concepts

(1) For now make 2 assumptions:

We know the distance to each satellite We know where each satellite is

Require 3 satellites for a 3-D position in this “ideal” scenario Requires 4 satellites to account for local receiver clock drift.

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GPS Signal Structure Each satellite transmits 2 carrier frequencies

referred to as L1 (1575 MHz) and L2 (1227 MHz) Each carrier frequency is BPSK modulated with a

unique PRN (pseudo random number) code The PRN code on L1 is called CA code (coarse

acquisition), The PRN code on L2 is called P code (precise)

CA code takes 1 ms for full PRN transmission at 1MHz chip (bit) rate. P code takes 1.5 s for full PRN transmission at ~10MHz chip rate

Also modulated on each carrier is 50 Hz data that includes the current position of the satellite

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Determining Time

Use the PRN code to determine time Use time to determine distance to the

satellite distance = speed of light * time

(1)

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Algorithms to Find PRN Phase Time-domain Cross correlation: 1/N ∑ x1 (n) * x2(n)

Coding equivalent to FIR filter, but need to filter N sets of data, each shifted by one data point – looks like a final exam question to me.

Correlation of perfectly matching signals gives a maximum value

Correlation of 2 random data sequences tends to 0 PRN code from different satellites are designed to correlate to

0.

Frequency domain correlation: 1/N F-1[X1(k)X2(k)] where F-1 is the inverse Discrete Fourier Transform and the X’s are the Discrete Fourier Transforms of two sequences

D

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Frequency Domain 1/N F-1[X1(k)X2(k)] 1024 point FFT (2 * NLOG2N) 1024 MULTS (N) 1024 point INV FFT (NLOG2N)

Time Domain 1/N ∑ x1 (n) * x2(n) n = 0

1024 MACs (N) 1024 Phases (N)

Timing

30,000Complex

operations

1,048,576operations

N-1

(N2)

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TigerSHARC -- TS101 and TS201

Low-cost version $45 / chipEvaluation boards $950 eacheducational price

TS101

TS201

Can do “COMPLEX” arithmetic

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Implementing a multi-thread systemworking on batch data – “audio example”Collect N pts @44 kHz array1

Collect N pts @44 kHz array2

Collect N pts @44 kHz array3

Collect N pts @44 kHz array1

Collect N pts @44 kHz array2

Process array1

Process array2

Process array3

Process array4

Transmit N pts @44 kHz array1

Transmit N pts @44 kHz array2

Transmit N pts @44 kHz array3

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Implementing a multi-thread system-- “audio example”Collect N pts @44 kHz array1

Collect N pts @44 kHz array2

Collect N pts @44 kHz array3

Collect N pts @44 kHz array1

Collect N pts @44 kHz array2

Move array1 array4SimulateComplex

Move array2 array5SimulateComplex

Move array3 array6SimulateComplex

Move array1 array4SimulateComplex

Transmit N pts @44 kHz array4

Transmit N pts @44 kHz array5

Transmit N pts @44 kHz array6

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Essentially Take an audio Talk-through program

for loop {Read_a_sample; Perform operation; Write_a_sample;

}

Turn into 5-threads running under interrupts Idle thread Initialization thread – sets up system, when ready – launches

the other threads – then activates the first thread ReadValueThread, ProcessValueThread – with simulated Complex Algorithm WriteValueThread

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Initialization Thread

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Main Thread – example

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Need to investigate and understand system behaviour and limitations

Concept of task priority

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Using real-time audio-threads -- Write

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VDK – Status History

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Adding the Initialization thread

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Making the InitializationThread a “Boot Thread”

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Add the thread programming control

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Avoid the free-running code

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Then add semaphores to control flow

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Essential, if not exact, concept of multi-threading code Do all the initial preparation of the board

Set up stack Set up “C/C++” environment Set up processor timer

Default on Blackfin ADSP-BF533 board – every 0.05 ms (called a TIC) an interrupt occurrs

Start with an IDLE Thread When first TIC occurs – the interrupt handler

will cause the Scheduler ISR to run

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Scheduler ISR Save all the registers (etc) of the IDLE thread to the IDLE thread

context buffer Recover all the registers for the scheduler ISR context buffer

(saved somewhere during the initialization procedure) There had better be a boot thread – otherwise system hangs

VDK tool will not let you build a system without at least one boot thread

Decide which boot thread has the highest priority? Save all the registers from the Scheduler ISR back into the

context buffer Recover all the registers for the boot thread from its context

buffer Return from ISR

We have now performed a “context switch” between the IDLE thread and the BOOT thread.

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Boot thread

The boot thread now executes until the first TIC occurs (next ISR call)

We now switch back into Scheduler Save all the registers (etc) of the FIRST BOOT THREAD

thread to the thread context buffer Recover all the registers for the scheduler ISR context

buffer Other threads need launching?

If there are other Boot threads then launch them depending on their priority and the ROUND ROBIN scheduling behaviour set by the programmer for tasks of equal priority

If a boot thread has requested that other threads need launching then launch those. Unclear when the VDK::CreateThread operation occurs

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The launching of threads

Looks like threads get launched “during a TIC” – meaning that anothercontext switch occurs for each VDK::CreateThread ( ) Does that apply to VDK::PostSemaphores( ) too?

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Back in scheduler Other threads need launching?

If there are other Boot threads then launch them depending on their priority and the ROUND ROBIN scheduling behaviour set by the programmer for tasks of equal priority

If a boot thread has requested that other threads need launching then launch those.

Have threads posted semaphores? Store them in a “posted semaphore table. Threads can also post “messages” but I have not worked

that out yet Are threads pending semaphores?

Depending on which task is running now, and its relative priority to tasks that are pending semaphores then either perform context switching or not

How do you handle conflicts? I think that is my problem with my final version of Lab. 5 part 3

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Original audio-talk through program

ISR routineChannel to Channel Copy

Multi-tasking versionof ISR routine

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Step 1 – Add Talk-through program

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Step 2 – Investigate Thread Behaviour

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Step 3 – Fix Thread Behaviour

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Step 4 – Start migrating code to the various threads -- Fix ISR behaviour

ORIGINAL

NEW VERSION

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Fix Thread Behaviour

Initialization thread Creates other threads and

then waits for ever ReadThread

Moves my_In Value Process Value ProcessThread

Moves Process Value ProcessDone Value Calls a “non-optimizable to nothing” routine

SimulateMoreComplexProcess(cycles_to_waste) WriteThread

Moves ProcessDone Value my_Out Value

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Final ReadThread

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Final ProcessThread

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Final WriteThread

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Thread Behaviour depends on Task priorities

ALL TASKS HAVE EQUAL PRIORITY

WRITE TASK HAS HIGHER PRIORITY THAN PROCESS TASK1) Read Task – sends semaphore to Process Task2) Process Task – sends semaphore to Write Task and “starts to waste cycles”3) Scheduler determines that Write Task can start, send semaphore to Read Task, and finish – and then4) Scheduler lets Process Task finish (? Why not let Read Task restart?)

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Thread Behaviour

Useless as system is “free running” and the signals input and output have no relationship to samples generated by ISR Some samples repeated many times, others are not Number of repeats depends on the time that

ProcessThread takes to execute

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Need to add an ISR semaphore

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Read Thread – starts on ISR semaphore

Blackfin Assembly codelooks like 68K

With LINK, UNLINK, RTS instructions

MACRO

STANDARD APPROACHVDK::PostSemaphore( ) DOES NOT WORK

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Many issues still need handling How much time is available before losing sound

quality? What are the best priorities for the tasks, and does

that priority depend on how much time is spent in ProcessTask?

What is the best setting for the task scheduler TIC time (based on processor internal timer)? Too fast – too much time saving / recovering registers

during task switching Too slow – problems with interrupts being missed or values

being over-writtem

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Scheduling based on TIC time DEFAULT TIC

= 0.05 ms

TIC = 0.005 ms

Don’t forget – TICs are shortened

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Which is the Slower / Faster TIC time?

Question – how does the thread status history reflect sound quality?