5568 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, … · ZHONG AND ZENG: CONTROL OF INVERTERS...

5568 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 10, OCTOBER 2014

Control of Inverters Via a Virtual Capacitor toAchieve Capacitive Output Impedance

Qing-Chang Zhong, Senior Member, IEEE, and Yu Zeng

Abstract—Mainstream inverters have inductive outputimpedance at low frequencies (such inverters are calledL-inverters). In this paper, a control strategy is proposed to makethe output impedance of an inverter capacitive at low frequencies(such inverters are called C-inverters). The proposed controlstrategy involves the feedback of the inductor current through anintegrator, which is actually the impedance of a virtual capacitor.The gain of the integrator or the virtual capacitance is firstselected to guarantee the stability of the current feedback loop andthen optimized to minimize the total harmonic distortion (THD)of the output voltage. Moreover, some guidelines are developedto facilitate the selection of the filter components for C-inverters.Simulation and experimental results are provided to demonstratethe feasibility and excellent performance of C-inverters, withthe filter parameters of the test rig selected according to theguidelines developed. It is shown that, with the same hardware,the lowest voltage THD is obtained when the inverter is designedto be a C-inverter. A by product of this study is that, as long asthe current ripples are kept within the desired range, the filterinductor should be chosen as small as possible in order to reducevoltage harmonics. This helps reduce the size, weight, and volumeof the inductor and improve the power density of the inverter.

Index Terms—Inverters with capacitive output impedance(C-inverters), inverters with inductive output impedance (L-inverters), inverters with resistive output impedance (R-inverters),power quality, total harmonic distortion (THD).

I. INTRODUCTION

ENERGY and sustainability are now on the top agendaof many governments. Smart grids have become one of

the main enablers to address energy and sustainability issues.Renewable energy, distributed generation, hybrid electrical ve-hicles, more-electric aircraft, all-electric ships, smart grids etc.will become more and more popular. DC/AC converters, alsocalled inverters, play a common role in these applications toconvert a dc source into an ac source. Arguably, the integra-tion of renewable and distributed energy sources, energy stor-

Manuscript received February 11, 2013; revised May 5, 2013, September 1,2013, and October 26, 2013; accepted November 21, 2013. Date of current ver-sion May 30, 2014. This work was supported by the EPSRC, U.K. under GrantsEP/J001333/1 and EP/J01558X/1. Some preliminary results were presented atthe 37th Annual Conference of the IEEE Industrial Electronics Society, Mel-bourne, Australia, November 2011. Recommended for publication by AssociateEditor Dr. A. M. Trzynadlowski.

Q.-C. Zhong is with the Deparment of Automatic Control and SystemsEngineering, The University of Sheffield, Sheffield S1 3JD, U.K., and withthe China Electric Power Research Institute (CEPRI), Beijing, China (e-mail:[email protected]).

Y. Zeng is with the Department of Automatic Control and Systems Engineer-ing, The University of Sheffield, Sheffield S1 3JD, U.K.

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2013.2294425

age, and demand-side resources into smart grids is the largest“new frontier” for smart grid advancements [1], [2]. Invertersare also widely used in uninterruptible power supplies, induc-tion heating, high-voltage dc transmission, variable-frequencydrives, electric vehicle drives, air conditioning, vehicle-to-gridetc. and, hence, have become a common key device for manyenergy-related applications. How to control the inverters is crit-ical for these applications.

There are several important control problems associated withinverters. For example, how to make sure that the total harmonicdistortion (THD) of the inverter voltage remains within a cer-tain range when the loads are nonlinear and the grid voltage, ifpresent, is distorted; how to make sure that the output voltageof an inverter is maintained within a certain range; how to shareloads proportionally according to their power ratings when in-verters are operated in parallel; how to make sure that inverterscan be operated in the grid-connected mode and the standalonemode and how to minimize the transient dynamics when theoperation mode is changed [3]; how to connect inverters to thegrid in a grid-friendly manner so that the impact on the gridis minimized [4], [5]; and how to minimize the total microgridoperating cost [6], etc. There have been a lot of research ac-tivities on these problems, from one aspect to another, and asystematic treatment of the control problems related to invertersin renewable energy and smart grid integration can be foundin [1].

The voltage THD can be improved by using deadbeat orhysteresis controllers [7], [8], selective harmonic eliminationpulsewidth modulation strategies [9], and repetitive controllers[10]–[16] [17], [18], injecting harmonic voltages [19], [20], in-troducing a voltage feedback loop [21] etc. Another way isto investigate the role of the output impedance as it is knownthat the output filter also contributes to the output voltage qual-ity [22]–[25]. It is well known that mainstream inverters haveinductive output impedance at low frequencies because of thefilter inductor. Moreover, the output impedance of an invertercan also change with the control strategy adopted [26]–[30].The general understanding is that inverters with resistive out-put impedance are better than inverters with inductive outputimpedance because resistive output impedance makes the com-pensation of harmonics easier. Some questions pop up imme-diately. For example: 1) Is it possible to have inverters withcapacitive output impedance? 2) If so, what are the advantages,if any? 3) If so, how to achieve parallel operation for such invert-ers? The preliminary results presented in [31] have shown thatan inverter can be designed to have capacitive output impedance.This concept has been further developed in [32] to implementactive capacitors that are accurate and stable with respect to the

0885-8993 © 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications standards/publications/rights/index.html for more information.

ZHONG AND ZENG: CONTROL OF INVERTERS VIA A VIRTUAL CAPACITOR TO ACHIEVE CAPACITIVE OUTPUT IMPEDANCE 5569

change of environmental factors, e.g., temperature and humidity.In order to facilitate the presentation, inverters with inductive,resistive, and capacitive output impedance are called L-, R-, andC-inverters, respectively.

In this paper, a simple but effective control strategy is pro-posed to design the output impedance of an inverter to be ca-pacitive, following [1], [31]. Then, the control parameter (i.e.,the output capacitance) is designed to guarantee the stabilityand, furthermore, optimized to minimize the THD of the outputvoltage. Moreover, detailed analyses are carried out to provideguidelines for selecting the filter components for C-inverters.Note that the typically-needed voltage loop to track a voltagereference [26], [27], [33] is not adopted, which reduces the num-ber of control parameters and the complexity of the controller.Experimental results are presented to demonstrate the feasibilityand performance of C-inverters and the guidelines for the com-ponent selection. It is shown that, with the same hardware, thelowest voltage THD is obtained when the inverter is designedto be a C-inverter.

Note that the output impedance of an inverter can be definedat different terminals that have different pairs of voltage andcurrent and hence can be different. In this paper, the outputimpedance of an inverter is defined at the terminal with theoutput voltage and the filter inductor current. In order to avoidconfusion, the output impedance that takes into account theeffect of the filter capacitor and the control strategy is calledthe overall output impedance. At low frequencies, for whichthe major voltage harmonics are concerned, the overall outputimpedance is more or less the same as the output impedancewithout considering the filter capacitor.

The rest of the paper is organized as follows. A controlleris proposed in Section II to force the output impedance of aninverter to be capacitive and the stability is analyzed. The con-trol parameter is optimized to minimize the voltage THD inSection III and guidelines for selecting the filter componentsare provided in Section IV. Experimental and simulation resultsare presented in Section V and VI, followed by conclusions anddiscussions made in Section VII.

II. DESIGN OF C-INVERTERS

A. Implementation

Fig. 1(a) shows an inverter, which consists of a single-phaseH-bridge inverter powered by a dc source, and an LC filter.The control signal u is converted to a PWM signal to drive theH-bridge so that the average of uf over a switching period isthe same as u, i.e., u ≈ uf . Different PWM techniques and theassociated switching effect play an important role in inverterdesign [34]–[36] but from the control point of view, the PWMblock and the H-bridge can be ignored when designing the con-troller; see, e.g., [37]–[40]. In particular, this is true when theswitching frequency is high enough. The inverter can be mod-eled as shown in Fig. 1(b) as the series connection of a voltagereference vr and the output impedance Zo , taking the voltagevo as the output voltage and the current i as the output current.This is equivalent to regarding the filter capacitor as a part ofthe load [37]. The output impedance Zo is inductive when no

(a)

(b)

Fig. 1. Single-phase inverter. (a) Descriptive circuit. (b) Simplified model withterminal voltage vo and terminal current i.

Fig. 2. Controller to make the output impedance of an inverter capacitive.

controller is adopted and can be made resistive after introducingthe proportional feedback of the filter inductor current, which isoften used to dampen oscillations in the system. Here, the con-troller shown in Fig. 2 is proposed to make the output impedanceof an inverter capacitive.

The following two equations hold for the closed-loop systemconsisting of Fig. 1(a) and Fig. 2:

u = vr −1

sCoi, and uf = (R + sL)i + vo (1)

where R is the equivalent series resistance of the inductor. It isnormally small but not exactly 0. Since the average of uf overa switching period is the same as u, there is (approximately)

vr −1

sCoi = (R + sL)i + vo (2)

which leads to

vo = vr − Zo (s) · i (3)

with the output impedance Zo(s) given by

Zo (s) = R + sL +1

sCo. (4)

As a result, the integrator block 1sCo

is added virtually to theoriginal output impedance of the inverter. This is equivalent toconnecting a virtual capacitor Co (inside the inverter) in series


with the filter inductor L. It is worth noting that the original filtercapacitor C is still required. Although the virtual capacitanceintroduced by the feedback changes the output impedance withinthe bandwidth of the controller, the switching noises are oftenfar beyond the reach of this control and an LC filter is still neededto suppress switching noises. The impact of the control strategyis on the change of the inverter dynamics, with some practicalimplications discussed in the rest of this section.

If the capacitor Co is chosen small enough, the effect of theinductor (R + sL) is not significant and the output impedancecan be made nearly purely capacitive around the fundamentalfrequency, i.e., roughly

Zo (s) ≈ 1sCo

. (5)

Hence, the virtual capacitor Co resonates with the filter inductorL at a frequency higher than the fundamental frequency, whichis able to reduce the harmonic voltage dropped on the filterinductor caused by the harmonic components of the load current.This allows C-inverters to achieve better voltage quality than R-and L- inverters without additional hardware cost.

B. Stability of the Current Loop

When the controller is implemented digitally, the effect ofcomputation and PWM conversion can be approximated by aone-step delay e−sTs , where Ts is the sampling period. Hence,the approximate block diagram of the current loop can be derivedas shown in Fig. 3(a). The corresponding open-loop transferfunction is

L(s) =1

sCo

1sL + R

e−sTs (6)

which has a pole at s = 0 but does not have any unstable polesin the right-half-plane of the s-domain. A typical Nyquist plotof such systems is shown in Fig. 3(b). In order to make surethat the system is stable, according to the well-known Nyquisttheorem, the plot should not encircle the critical point (−1, 0).Assume that the plot crosses the real axis for the first time at thefrequency ω0 , then ω0 satisfies

−π

2− atan

ω0L

R− ω0Ts = −π. (7)

In other words, ω0 can be found as the first positive numberfrom 0 that satisfies

R

ω0L= tan(ω0Ts). (8)

At this frequency, the loop gain 1ω0 Co

√ω 2

0 L2 +R2should be less

than 1. In other words, the loop is stable if

1Co

< ω0

√ω2

0L2 + R2 . (9)

It can be easily seen that

0 < ω0 <π

2Ts. (10)

Hence, the current loop is stable if

1Co

<π

2Ts

√(πL

2Ts

)2

+ R2 (11)

(a)

(b)

Fig. 3. The current loop. (a) Approximate block diagram. (b) Typical Nyquistplot.

of which the right-hand side is about ( π2Ts

)2L for small R ≈ 0.In other words, the loop is stable if the capacitance Co or thesampling frequency fs = 1

Tsis chosen large enough so that the

sampling frequency fs is larger than four times the resonantfrequency 1

2π√

LCowith L, which can be easily met without any

problem. Note that R is not exactly zero in reality, which helpsmaintain the stability of the loop.

C. DC Offset in the System

Because of the presence of the integrator 1sCo

, any dc offsetin the current i, e.g., that is caused by the conversion processor faults in the system etc., would lead to a dc offset in theoutput voltage. In order to avoid this problem, some simplemechanisms can be adopted. For example, the integrator 1

sCo

can be reset when the inductor current passes zero if the offsetexceeds a given level. Alternatively, the integrator 1

sCocan be

slightly modified as 1sCo +ε with a negligible positive number

ε ≈ 0. This is equivalent to putting a large resistor 1ε in parallel

with Co , which does not change the performance at non-dcfrequencies.

III. OPTIMIZATION OF THE VOLTAGE QUALITY

Assume that the output current of the inverter is

i =√

2Σ∞h=1Ih sin(hωt + φh) (12)


where ω is the system frequency. Then, the amplitude of theh-th harmonic voltage dropped on the output impedance is√

2Ih |Zo(jhω)|. Moreover, assume that the voltage referencevr is clean and sinusoidal and is described as

vr =√

2E sin(ωt + δ). (13)

Then, the fundamental component of the output voltage is

v1 =√

2E sin(ωt + δ) −√

2I1 |Zo(jω)| sin(ωt + φ1 + θ)

(14)

=√

2V1 sin(ωt + β) (15)

with

V1=√

E2 + I21 |Zo(jω)|2 − 2EI1 |Zo(jω)| cos(φ1 + θ − δ)

(16)

β = arctan(

ω |Zo(jω)| sin(φ1 + θ − δ)I1 |Zo(jω)| cos(φ1 + θ − δ) − E

). (17)

The sum of all harmonic components in the output voltage is

vH =√

2Σ∞h=2Ih |Zo(jhω)| sin(hωt + φh + ∠Zo(jhω)).

(18)It is clear that v1 and vH do not affect each other. v1 is deter-mined by the clean reference voltage, the fundamental currentand the output impedance at the fundamental frequency. vH isdetermined by the harmonic current components and the outputimpedance at the harmonic frequencies.

According to the definition of THD, the THD of the outputvoltage is

THD =

√Σ∞

h=2I2h |Zo(jhω)|2

V1× 100%. (19)

Hence, the THD is mainly affected by the output impedanceat harmonic frequencies. As a result, it is feasible to optimizethe design of the output impedance at harmonic frequencies tominimize the THD of the output voltage.

For the C-inverter designed in the previous section, accordingto (4), there is

|Zo (jhω∗)|2 = R2 +(

hω∗L − 1hω∗Co

)2

(20)

where ω∗ is the rated angular system frequency. In order tominimize the THD of the output voltage, the virtual capacitorCo should be chosen to minimize

Σ∞h=2I

2h |Zo(jhω∗)|2 (21)

because the fundamental component V1 can be assumed to bealmost constant. This is equivalent to

CominΣ∞h=2i

21h

(hω∗L − 1

hω∗Co

)2

(22)

where i1h = Ih

I1is the normalized h-th harmonic current Ih with

respect to the fundamental current I1 . Depending on the distri-bution of the harmonic current components, different strategiescan be obtained.

Assume that the harmonic current is negligible for the har-monics higher than the N -th order (with an odd number N ).Then, Co can be found via solving (22). Define

f(Co) = ΣNh=2i

21h

(hω∗L − 1

hω∗Co

)2

. (23)

Then, Co needs to satisfy

df(Co)dCo

= 2ΣNh=2i

21h

(hω∗L − 1

hω∗Co

)1

hω∗C2o

= 0 (24)

which is equivalent to

ΣNh=2i

21h(L − 1

(hω∗)2Co) = 0. (25)

Hence

ΣNh=2i

21hL =

1(ω∗)2Co

ΣNh=2

i21h

h2 (26)

and the optimal capacitance can be solved as

Co =1

(ω∗)2L

ΣNh=2

i21 h

h2

ΣNh=2i

21h

(27)

which is applicable for any current i with a known harmonicprofile. The corresponding f(Co) is

fmin(Co) = ΣNh=2i

21h

(hω∗L − ω∗L

h

ΣNh=2i

21h

ΣNh=2

i21 h

h2

)2

= (ω∗L)2ΣNh=2i

21h

(h − 1

h

ΣNh=2i

21h

ΣNh=2

i21 h

h2

)2

. (28)

Hence, the THD of vo is in proportion to the inductance L ofthe inverter LC filter. A small L does not only reduce the cost,size, weight, and volume of the inductor but also improves thevoltage quality. However, a small L leads to a high di

dtfor the

switches and large current ripples. See the guidelines of selectingthe components in the next section for details. Moreover, since1

Co∼ L, a small L leads to a small gain for the integrator, which

is good for the stability of the current loop.If the distribution of the harmonic components is not known,

then it can be assumed that the even harmonics are zero, which isnormally the case, and the odd harmonics are equally distributed.As a result, the optimal Co can be chosen, according to (27), as

Co =1

(ω∗)2L

Σh=3, 5, 7,..., N1h2

ΣNh=3, 5, 7,..., N 1

(29)

=1

(ω∗)2L

Σh=3, 5, 7,..., N1h2

(N − 1)/2. (30)

This can be written as

Co =1

(ω∗)2L

1(N − 1)/2

(132 +

152 + · · · + 1

N 2

)(31)


1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7−14−12−10

−8−6−4−2

0246

ω/ω*

The

gain

fact

or

Original inductor

3rd and 5th

3rd only

5th only

Fig. 4. The gain factors to meet different criteria.

where (N − 1)/2 is the number of terms in the summation. Thecorresponding f(Co) is

fmin(Co) = (ω∗L)2Σh=3, 5, 7,..., N

×(

h − 1h

(N − 1)/2Σh=3, 5, 7,..., N

1h2

)2

. (32)

If a single h-th harmonic component is concerned, then theoptimal Co is

Co =1

(hω∗)2L. (33)

This forces the impedance at the h-th harmonic frequency closeto 0 and hence no voltage at this frequency is caused, assum-ing R = 0. According to the stability analysis carried out inthe previous section, the current loop is stable in this case if(hω∗)2L < ( π

2Ts)2L, or in other words, if fs > 4hf ∗, where

f ∗ = ω ∗

2π is the rated system frequency.

A. Special Case I: To Minimize the Third and FifthHarmonic Components

In most cases, it is enough to consider the third and fifthharmonics only. This gives the optimal capacitance

Co =17

225(ω∗)2L. (34)

As a result, the output impedance is

Zo(jω) = R + j

(ωL − 1

ωCo

)(35)

= R + jω∗L

(ω

ω∗ − 22517

ω∗

ω

). (36)

The gain factor ωω ∗ − 225

17ω ∗

ω of the imaginary part with respect tothe normalized frequency ω

ω ∗ is shown in Fig. 4. It changes fromnegative to positive at around ω

ω ∗ = 3.638. At the fundamentalfrequency, i.e., when ω = ω∗, the output impedance is

Zo = R − j20817

ω∗L ≈ −j12.23ω∗L. (37)

It is capacitive as expected because R is normally smaller thanω∗L.

B. Special Case II: To Minimize the ThirdHarmonic Component

In this case, the optimal Co is

Co =1

(3ω∗)2L(38)

and the corresponding impedance is

Zo(jω) = R + j

(ωL − 1

ωCo

)(39)

= R + jω∗L

(ω

ω∗ − 9ω∗

ω

). (40)

The gain factor ωω ∗ − 9ω ∗


ω ∗ is also shown in Fig. 4. It changesfrom negative to positive at ω = 3ω∗. At the fundamental fre-quency, i.e., when ω = ω∗, the output impedance is

Zo = R − j8ω∗L ≈ −j8ω∗L (41)

which is capacitive as well.

C. Special Case III: To Minimize the FifthHarmonic Component

In this case, the optimal Co is

Co =1

(5ω∗)2L(42)

and the corresponding impedance is

Zo(jω) = R + j

(ωL − 1

ωCo

)(43)

= R + jω∗L

(ω

ω∗ − 25ω∗

ω

). (44)

The gain factor ωω ∗ − 25ω ∗


ω ∗ is also shown in Fig. 4. It changesfrom negative to positive at ω = 5ω∗. At the fundamental fre-quency, i.e., when ω = ω∗, the output impedance is

Zo = R − j24ω∗L ≈ −j24ω∗L. (45)

This is capacitive as well.

IV. COMPONENT SELECTION

A. Selection of the Filter Inductor L

As discovered in the previous section, the smaller the filterinductor, the smaller the output impedance and the better thevoltage quality. Thus, it is better to have a small output inductorthan a big one. This leaves the selection of the filter inductorto meet the requirement on the allowed current ripples only.According to [23], it is recommended that the current ripplesshould satisfy

0.15 � ΔI

Iref� 0.4 (46)

with

ΔI =Udc

4Lfs(47)


where ΔI is the inductor current ripple and Iref is the rated peakcurrent at the fundamental frequency. Thus, the inductor shouldbe chosen to satisfy

5Udc

8fsIref� L � 5Udc

3fsIref. (48)

This could be applied to analyze the impact on the dc-busvoltage. For example, assume that L is selected to achieve themaximum current ripple of 0.4Iref . Moreover, assume that thepeak of the h-th harmonic current reaches 50% of Iref . Then,the voltage drop of the h-th harmonic current on the inductoris hω∗ 5Ud c

8fs Ir e f× Ir e f

2 = 5hω ∗

16fsUdc . In other words, the maximum

increase of the required dc- bus voltage is 5hω ∗

16fs× 100%. For

h = 5, fs = 10 kHz and ω∗ = 100π rad/sec, this is 4.9% so itis not demanding at all and there is no need to take any specialaction when determining the dc-bus voltage.

B. Selection of the Filter Capacitor C

The main function of the LC filter is to attenuate the har-monics generated by the PWM conversion and the H-bridgevia reproducing the control signal u, especially the harmonicsaround the switching frequency fs . When there is no load, thetransfer function between uf and vo is

H(s) =1

s2LC + 1. (49)

Indeed, the virtual capacitor Co does not change the role ofthe LC filter in suppressing the switching noises because theactual output voltage uf generated by the inverter is still passedthrough the LC filter. The cut-off frequency fc can be foundfrom

|H(j2πfc)| =1

|1 − (2πfc)2LC| =1√2

(50)

as

fc =1

2π√

LC

√√2 + 1 (51)

which is about 1.5 times of the resonant frequency 12π

√LC

. Sinceit is very close to the resonant frequency, it is reasonable to usethe resonant frequency when selecting the components.

The overall output impedance Z(s) after taking into accountthe filter capacitor C is

Z(s) =Zo(s) 1

sC

Zo(s) + 1sC

=Zo(s)

sCZo(s) + 1. (52)

At low frequencies, there is

Z(s) ≈ Zo(s) = R + sL +1

sCo(53)

and at high frequencies, there is

Z(s) ≈ 1sC

. (54)

This actually verifies that the definition of the output impedanceZo without considering the filter capacitor C does not materi-ally affect the analysis at low frequencies. Defining the output

Fig. 5. Overall output impedance of an L-inverter and a C-inverter after takinginto account the filter capacitor C .

impedance at the terminal with the output voltage and the filterinductor current is simply to facilitate the presentation.

For conventional inverters, which are mainly L-inverters,Z(s) is inductive at low frequencies. Hence, the overall outputimpedance Z(s) changes its type from inductive to capacitive atthe resonant frequency. However, according to (52), the overalloutput impedance Z(s) for the C-inverters designed above is

Z(s) =sL + R + 1

sCo

s2LC + sCR + CCo

+ 1. (55)

It is capacitive at both low frequencies ( 1sCo

) and high frequen-cies ( 1

sC ). In order to better demonstrate this, the Bode plots ofthe overall output impedances of typical L- and C-inverters areshown in Fig. 5. The output impedance of the C-inverter is ca-pacitive over a wide range of both low and high frequencies andis inductive only over a small range of mid-frequencies. There isa series resonance between L and Co , in addition to the parallelresonance between L and C, which is slightly changed becauseof Co . The output impedance of the L-inverter is inductive forlow frequencies up to the resonant frequency of the filter andcapacitive for the frequencies above.

The optimization of the voltage quality discussed in the pre-vious subsection is achieved via tuning the series resonancebetween L and Co . Since the load current io may include a largeamount of harmonic components, especially when the load isnonlinear, the parallel resonance between L, C, and Co shouldbe considered when designing the filter. According to (55), theparallel resonant frequency fr can be obtained as

fr =12π

√C + Co

LCCo=

12π

√LC

√C

Co+ 1. (56)


With the same L and C, the resonance frequency fr of C-inverters is higher than, but very close to, that of the corre-sponding L-inverter or R-inverters, which is 1

2π√

LC, because

Co is often much larger than C. In order to avoid amplifyingsome harmonic current components, the resonance frequencyfr is recommended to be chosen between ten times the line fre-quency ω∗ and half of the switching frequency fs [23]. Hence,fr is often far away from the harmonics to be eliminated bydesigning Co . Indeed, if Co is designed to eliminate the h-thharmonic, then according to (56), there is

fr =1

2π√

LCo

√Co

C+ 1 =

hω∗

2π

√Co

C+ 1. (57)

That is, the resonant frequency is√

Co

C + 1 times the harmonic

frequency hω∗ under control. If√

Co

C + 1 > 3, then fr > 3hω ∗

2π

and it is over nine times the system frequency ω∗ even for h = 3.Hence, it is recommended to select fr to satisfy

3hω∗

2π� fr � 1

2fs (58)

that is to select the parallel resonant frequency between threetimes of the harmonic frequency under control and half of theswitching frequency. Accordingly, it is recommended to selectthe filter capacitor C to satisfy

3hω∗

2π� hω∗

2π

√Co

C+ 1 � 1

2fs

or, equivalently,

Co

( πfs

hω ∗ )2 − 1� C � 1

8Co. (59)

V. SIMULATION RESULTS

Simulations were carried out with a single-phase inverterpowered by a 350-V dc voltage supply. The switching frequencyis 10 kHz and the system frequency is 50 Hz. The rated outputvoltage is 230 V and the rated peak current is chosen as 40 A.Thus, the rated apparent power of the inverter is 6.5 kVA. Theload is a full-bridge rectifier loaded with an LC filter (2.2 mH,150μF) and a resistor RL = 30Ω. An extra load consisting of a200 − Ω resistor and a 22− mH inductor in series is connectedat t = 2 s, and disconnected at t = 9 s to test the transient re-sponse of C-inverters, R-inverters, and L-inverters. The inverterreference voltage was generated by the robust droop controllerproposed in [31], which is shown in Fig. 6 for convenience. Ascan be seen from Fig. 6, at the steady state, there is

Ke(E∗ − Vo) = niPi

where Vo is the RMS value of the output voltage. As a result,the RMS output voltage is

Vo = E∗ − ni

KePi

which shows that the output voltage is regulated and the voltageerror could be maintained small via choosing a large Ke . Hence,there is no need to have an extra voltage loop to regulate the

Fig. 6. The robust droop controller for C-inverters [31] to generate the voltagereference vr .

instantaneous output voltage. The parameters of the robust droopcontroller were chosen as ni = 6.3 × 10−4 , mi = 3.4 × 10−5 ,and Ke = 10, according to [31].

According to (48), the filter inductor should be chosen be-tween 0.55 mH and 1.46 mH. To make the output voltage THDsmall, the inductor is chosen as 0.55 mH. The virtual capacitorCo is chosen to be 1400μF to reduce the third and fifth harmon-ics. According to (59), the filter capacitor C should satisfy

1.84μF � C � 174μF (60)

from which the filter capacitor was selected as C = 20μF .The simulation results of the C-inverter, together with those of

an L-inverter and a R-inverter with Ki = 4, are shown in Fig. 7.The C-inverter achieves lowest output voltage THD among thethree types of inverters. When the extra load of a 200 − Ω resis-tor and a 22−mH inductor in series is connected or disconnected,all the three type of inverter are able to respond fast and reachthe steady state quickly and smoothly. It can be seen that thetransient response of the C-inverter is better than the other two.

VI. EXPERIMENTAL VALIDATION

Experiments were carried out with a single-phase inverterpowered by a 180-V dc voltage supply, which was obtainedfrom a nonregulated diode rectifier. The switching frequencyand the system frequency are the same with the ones used in thesimulation, respectively. The rated output voltage is 110 V andthe rated peak current is 8 A. The load is a full-bridge rectifierloaded with an LC filter (2.2mH, 150μF) and a resistor RL =200Ω. The inverter reference voltage was also generated by therobust droop controller [31] shown in Fig. 6, and the parametersof the robust droop controller were chosen as ni = 3.4 × 10−3 ,mi = 3.9 × 10−4 , and Ke = 10.

According to (48), the filter inductor should be chosen be-tween 1.41 and 3.75 mH. The inductor 2.2 mH on board theinverter falls into this range. Three different cases with the vir-tual capacitor Co chosen to reduce the third harmonic, the fifthharmonic, and both the third and the fifth harmonics, respec-tively, were tested. The corresponding virtual capacitance Co is512μF, 184μF, and 348μF, respectively. According to (59), the


Fig. 7. Simulation results with the extra load consisting of a 200 − Ω resistor and a 22−mH inductor in series connected at t = 2 s and disconnected at t = 9 s:C-inverter with Co = 1400 μF to reduce the third and the fifth harmonics (left column), R-inverter with Ki = 4 (middle column) and L-inverter (right column).(a) Active power. (b) Reactive power. (c) Frequency. (d) Output voltage RMS Vo . (e) Output voltage vo . (f) THD of output Voltage vo . (g) Inductor current i.

filter capacitor C should satisfy

0.46μF � C � 23μF. (61)

The filter capacitor C = 10μF on board the inverter falls intothis range. The corresponding resonant frequency is 1131 Hzfor the case with h = 5 and 1083 Hz for the case with h = 3,which leaves enough room for a normal switching frequency,e.g., 5 kHz.

The experimental results are shown in Fig. 8, together withthose from an R-inverter with Zo = 4Ω and an L-inverter de-signed according to the current feedback controller proposedin [37] with Ki = 4 and Ki = 0, respectively, for compari-son. When the inverter was designed to have capacitive outputimpedance to reduce the effect of the third and the fifth har-monics, the third harmonic was reduced by about 50% fromthe case of the L-inverter and by about 65% from the case ofthe R-inverter, and the fifth harmonic was reduced by about


Fig. 8. Experimental results: output voltage vo and inductor current i (left column), harmonic distribution of vo (right column). (a) C-inverter with Co = 348 μFto reduce the third and thefifth harmonics. (b) C-inverter with Co = 512 μF to reduce the third harmonic. (c) C-inverter with Co = 184 μF to reduce the fifthharmonic. (d) R-inverter with Ki = 4. (e) L-inverter.


30% and 18%, respectively. The THD was reduced by about40% and 50%, respectively. When the inverter was designed tohave capacitive output impedance to minimize the effect of thethird harmonic, the third harmonic was reduced by 63% fromthe case of the L-inverter and by 74% from the case of the R-inverter, respectively. The THD was reduced by about 36% andby 47%, respectively .When the inverter was designed to havecapacitive output impedance to minimize the effect of the fifthharmonic, the fifth harmonic was reduced by 41% from the caseof the L-inverter and by 31% from the case of the R-inverter,respectively. The THD was reduced by about 37% and 48%, re-spectively. Apparently, C-inverters performed much better thanthe R- and L-inverters. Moreover, the THD is the lowest whenCo is designed to optimize the third and fifth harmonics thanto optimize these two separately. This is because the major har-monic components of the load current are the third and the fifthharmonics, as can be seen from Fig. 8(e).

The recorded average RMS values of the output voltage are109.7 V for the R-inverter, 110.2 V for the L-inverter, and109.8 V for the C-inverters, which shows the excellent volt-age regulation capability of the robust droop control strategy.This is true regardless of the virtual capacitance concept.

VII. CONCLUSION AND DISCUSSIONS

It has been shown that it is feasible to force the outputimpedance of an inverter to be capacitive over a wide rangeof both low and high frequencies although it normally has aninductor connected to the inverter bridge. Such inverters arecalled C-inverters. One simple but effective approach is to forman inductor current feedback through an integrator, of which thetime constant is the desired output capacitance. This is a virtualcapacitor, so there is no limit on the current rating and can beapplied to any power level. The capacitance can be selected toguarantee the stability of the current loop and an algorithm isproposed to optimize the value of the output capacitance so thatthe THD of the output voltage is minimized. Detailed guide-lines have been provided to place the relevant frequencies prop-erly so that the filter components can be determined. Extensiveexperimental results have shown that the THD of an invertercan be reduced when it is designed to have capacitive outputimpedance, with comparison to an inverter having resistive orinductive output impedance. Moreover, no visible dc offsets areseen from the experimental results. One by product of this studyis that the filter inductor should be chosen small in order to re-duce voltage harmonics and the criterion is reduced to meet thecurrent ripples allowed on the inductor. A small inductor helpsreduce the size, weight, and volume of the passive componentsneeded.

Since the C-inverter concept is completely new, some issuesshould be further investigated, in particular, for grid-connectedapplications. For example, because of the introduction of a ca-pacitor into the output impedance, a natural question is whetherthis would lead to possible resonance with the rest of the system(such as the line, loads, etc.). This may not be an issue becausein flexible ac transmission systems (FACTS), capacitors havebeen physically connected in series with transmission lines to

improve the line capacity. Another question is whether this willaffect the current quality for grid-connected applications. It hasbeen found that C-inverters offer the lowest output voltage THDamong R-, L-, and C-inverters with the same hardware. Furtherinvestigations should be carried out to explore other advantagesand applications of C-inverters.

ACKNOWLEDGMENT

The authors would like to thank the Reviewers and Editors fortheir detailed comments, which have considerably improved thequality of the paper. Yokogawa Measurement Technologies Ltdis greatly appreciated for the donation of a high-precision wide-bandwidth power meter WT1600 and a digital eight-channeloscilloscope DL7480.

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Qing-Chang Zhong (M’03–SM’04) received thePh.D. degree in control and engineering from Shang-hai Jiao Tong University, Shanghai, China, in 2000,and the Ph.D. degree in control theory and power en-gineering (awarded the Best Doctoral Thesis Prize)from Imperial College London, London, U.K., in2004.

He is currently the Chair Professor in Control andSystems Engineering with the Department of Auto-matic Control and Systems Engineering, The Uni-versity of Sheffield, Sheffield, U.K. He is a Distin-

guished Lecturer of IEEE Power Electronics Society and is invited to representthe U.K. at the European Control Association. From 2012–2013, he spent asix-month sabbatical at the Cymer Center for Control Systems and Dynamics,University of California, San Diego, CA, USA, and an eight-month sabbaticalat the Center for Power Electronics Systems, Virginia Tech, Blacksburg, VA,USA. He (co-)authored three research monographs: Control of Power Invertersin Renewable Energy and Smart Grid Integration (Wiley-IEEE Press, 2013),Robust Control of Time-Delay Systems (Springer-Verlag, 2006), Control of In-tegral Processes with Dead Time (Springer-Verlag, 2010). He also serves as anAssociate Editor for IEEE Transactions on Power Electronics, IEEE Access,and the Conference Editorial Board of the IEEE Control Systems Society. Hisfourth research monograph entitled Completely Autonomous Power Systems(CAPS): Next Generation Smart Grids is scheduled to appear in 2015. He isthe architect of the next-generation smart grid based on the synchronizationmechanism of synchronous machines and a Specialist recognized by the StateGrid Corporation of China, a Fellow of the Institution of Engineering and Tech-nology, the Vice-Chair of IFAC TC 6.3 (Power and Energy Systems) and wasa Senior Research Fellow of the Royal Academy of Engineering/LeverhulmeTrust, U.K. (2009–2010). His research focuses on advanced control theory andits applications in various sectors, which include power electronics, renewableenergy and smart grid integration, electric drives and electric vehicles, robustand H-infinity control, time-delay systems, process control, and mechatronics.

Dr. Zhong, jointly with G. Weiss, invented the synchronverter technology tooperate inverters to mimic synchronous generators, which was awarded HighlyCommended at the 2009 IET Innovation Awards.

Yu Zeng received the B.Eng. degree in automationfrom Central South University, Changsha, China, in2009. She is currently working toward the Ph.D. de-gree from the Department of Automatic Control andSystems Engineering, the University of Sheffield,Sheffield, U.K.

Her research interests include control of powerelectronic systems, microgrids, and distributed gen-eration, in particular, the parallel operation ofinverters.

5568 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, … · ZHONG AND ZENG: CONTROL OF INVERTERS...

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