4

STUDENT HANDBOOK FOR CSE STUDENTS

4TH

SEMESTER

Department of Computer Science and Engineering

Ambala College of Engineering and Applied Research

(ACE)

Vision of the Department

To provide high quality technical education with good moral and ethical values .To become

resource centre in the region which provides cost effective and efficient solutions to industry and

society.

Mission of the Department

1. Mission of the department is to provide quality education to students through computer

science theory and algorithmic principles, in the modeling and design of computer-based

systems.

2. To develop analytical, problem solving, programming and soft skills in students which helps

them to compete in the job market.

3. To be effective in analyzing real life problems and providing IT solutions, which are valuable

for society as well as industry.

4. To develop capabilities in students so that they are engaged in multi-disciplinary research

activities.

Programme Educational Objectives (PEOs)

1. To impart strong theoretical as well as practical knowledge to the students in the field of Computer

science so that they will be able to apply acquired knowledge.

2. To make students aware about latest open source technologies which help them to develop application

specific software with less cost.

3. To provide adequate training and opportunities to work as team on multidisciplinary projects with

effective communication skills which makes students industry ready.

4. To prepare students for research and development activities in their profession with high regard to legal

and ethical responsibilities.

Programme Outcomes (POs)

(i) An ability to apply knowledge of mathematics, science, and engineering.

(ii) An ability to design and conduct experiments, as well as to analyze and interpret data.

(iii) An ability to design a system, component, or process to meet desired needs within

realistic constraints Such as economic, environmental, social, political, ethical, health and

safety, manufacturability, and Sustainability.

(iv)An ability to function on multidisciplinary teams.

(v)An ability to identify, formulates, and solves engineering problems.

(vi)An understanding of professional and ethical responsibility.

(vii)An ability to communicate effectively.

(viii)The broad education necessary to understand the impact of engineering solutions in a

global, economic, environmental, and societal context.

(ix)Recognition of the need for, and an ability to engage in life-long learning.

(x)Knowledge of contemporary issues.

(xi)An ability to use the techniques, skills, and modern engineering tools necessary for

engineering practice.

(xii)Graduates are able to participate and succeed in competitive examination like GRE,

GATE, CAT, GMAT etc.

Bachelor of Technology (Computer Engineering)

Scheme of studies / Examination

(Semester- 4)

Teaching Examination Schedule Duration

Sl. Schedule (Marks)

Course No. Subject

of Exam

No.

L T P Total Theory Sessional Practical Total (Hours)

MATH- 201E

Mathematics III / Basics

1 of Industrial Sociology, 3 1 - 4 100 50 - 150 3 / HUM-201 E

Economics & Management

2 CSE-202 E Computer Architecture and

3 1 -

4 100

50 - 150 3

Organization

3 CSE-204 E Programming Languages 3 1 - 4 100 50 - 150 3

4 IT-252 E Object Oriented

3 1 -

4 100

50 - 150 3

Programming using C++

5 ECE-204 E Digital Electronics 3 1 - 4 100 50 - 150 3

6 ECE-216 E Microprocessors &

3 1 -

4 100

50 - 150 3

Interfacing

7 IT-256 E C++ Programming Lab. - - 3 3 - 50 25 75 3

8 ECE-212 E Digital Electronics Lab - - 3 3 - 50 25 75 3

9 ECE 218 E Microprocessors &

- - 3

3 -

25 25 50 3

Interfacing Lab.

TOTAL 18 6 9 33 600 475 75 1150 -

MATH-201 E MATHEMATICS - III

L T P Theory : 100 Marks

3 1 - Sessional : 50 Marks

Total : 150 Marks

Duration of Exam : 3 Hrs.

UNIT I Fourier Series : Eulers Formulae, Conditions for Fourier expansions, Fourier expansion of functions having points of discontinuity, change of interval, Odd & even functions, Half-range

series.

Fourier Transforms : Fourier integrals, Fourier transforms, Fourier cosine and sine transforms.

Properties of Fourier transforms, Convolution theorem, Persevals identity, Relation between Fourier and Laplace transforms, Fourier transforms of the derivatives of a function, Application

to boundary value problems. UNIT-II

Functions of a Complex Variables : Functions of a complex variable, Exponential function,

Trigonometric, Hyperbolic and Logarithmic functions, limit and continuity of a function,

Differentiability and analyticity. Cauchy-Riemann equations, Necessary and sufficient conditions for a function to be analytic,

Polar form of the Cauchy-Riemann equations, Harmonic functions, Application to flow

problems, Conformal transformation, Standard transformations (Translation, Magnification &

rotation, inversion & reflection, Bilinear).

UNIT-III Probability Distributions : Probability, Bayes theorem, Discrete & Continuous probability distributions, Moment generating function, Probability generating function, Properties and

applications of Binomial, Poisson and normal distributions.

UNIT-IV Linear Programming : Linear programming problems formulation, Solution of Linear

Programming Problem using Graphical method, Simplex Method, Dual-Simplex Method. Text Book

1. Higher Engg. Mathematics : B.S. Grewal 2. Advanced Engg. Mathematics : E. Kreyzig

Reference Book

1. Complex variables and Applications : R.V. Churchil; Mc. Graw Hill 2. Engg. Mathematics Vol. II: S.S. Sastry; Prentice Hall of India. 3. Operation Research : H.A. Taha 4. Probability and statistics for Engineer : Johnson. PHI.

Note : Examiner will set eight question, taking two from each unit. Students will be required to

attempt five questions taking at least one from each unit.

Ambala College of Engineering and Applied Research (ACE)


Course Name: Mathematics

Course Code: MATH-201E

Class / Sem.: 4th

LEC. No. LECTURE PLAN

L1. Eulers Formulae, Conditions for Fourier Series expansions.

L2 Fourier Series of functions having points of discontinuity, change of intervals.

L3 Fourier Series of even & odd functions

L4 Half-Range Series.

L5 Fourier integrals, Fourier Transforms.

L6 Fourier Sine & Cosine Transform.

L7 Properties of Fourier Transforms.

L8 Convolution Theorem, Parsevals Identity.

L9 Fourier Transforms of Derivatives of a function.

L10 Application to boundary value problems.

L11 Functions of a complex variable.

L12 Exponential function.

L13 Trigonometric & Hyperbolic functions.

L14 Logarithmic functions.

L15 Limit and Continuity of a complex function.

L16 Differentiability and Analyticity of complex functions.

L17 Cauchy-Riemann equations & Necess.& Suff. Condns for f(z) to be analytic.

L18 ,,

L19 Polar form of C-R equations, Harmonic functions.

L20 Application to flow problems.

L21 Conformal Transformations.

L22 Standard Transformations(Translation, bilinear)

L23 Standard Transformations(,Magnification& rotation, inversion)

L24 Probability Theory.





Class / Sem.: 4th

L25 Bays Theorem.

L26 Discrete and Continuous probability distribution.

L27 ,,

L28 Probability& Moment generating Function

L29 Properties & Applications to Binomial Distribution.

L30 Properties & Applications to Poisson Distribution.

L31 Properties & Applications to Normal Distribution.

L32 Linear Programming Problems, Formulation.

L33 Solution of LPP using graphical method.

L34 Solution of LPP using Simplex method.

L35 ,,

L36 Solution of LPP using Dual-Simplex method.

L37 ,,

Tutorial Sheet No. 1

Q.No.1 What are the Dirichlets conditions for any function f(x) defined in the interval

).,( Obtain Fourier series of f(x) = 2)(4

1x in (0. 2 ). Hence obtain the

following relations:

(i) 2

1

1 +

22

1+

23

1+

24

1 +.=

6

2

(ii) 2

1

1 -

22

1+

23

1-

24

1 +.=

12

2.

(iii) 2

1

1 +

23

1+

25

1+

27

1 +.=

8

2 .

Q.No.2 Expand f(x) =x sin(x) in the interval ( 2,0 ) as a Fourier series.

Q.No.:3 State and prove the Parsevals theorem on Fourier constants in the interval

(-l,l).

Q.No.:4 Expand f(x) = xsinx in the interval x as a Fourier series.

Q.No.:5 Obtain fourier series of xxf )( in the interval ).,( Hence deduce that

(i) 2

1

1 +

23

1+

25

1+

27

1 +. =

8

2

Q.No.:6 Obtain fourier series expansion of the function

(i) xxf sin)( in ).,(

(ii) xxf cos)( in ).,(

Q.No.:7 Find

(i) half- range Consine series of 2)( xxf in ).,0(

(ii) half- range Sine series of 2

)( xxxf in the interval )1,0( .


Q.No.1. Find the Fourier Sine transform of f(x)=e-IxI .

Hence evaluate

0 21

)sin(

x

dxmxx .

Q.No.2. Find the Fourier Sine transform of (i)x

e ax (ii)

)(

122

axx (iii)

x

1.

Q.No.3. Find fourier cosine transform of (i) 2x

e (ii)

21

1

x .

Q.No.4. Find the fourier transform of f(x)= .,0

,1

ax

axHence evaluate

(i)

ds

s

sxas )cos()sin( (ii)

0

)sin(dx

x

x

Q.No.5. (i) State and prove convolution theorem for Fourier transform.

(ii)State and prove the relation between Fourier and Laplace transforms.

Q.No.6. Using Parsevals identity forn Fourier transform, prove that

(i) 60)9)(4(

1

0 22

dttt

(ii) .10)9)(4(0

22

2

dttt

t

Q.No.7. The temperature u is determined by the equation 2

2

x

uk

t

u

such that

(i)u(x,0)=0 (ii)

x

u at x=0.Determine the temperature using Fourier

Transform.

Q.No.8. Using fourier transform, find solution of wave equation 2

22

2

2

x

ua

t

u

s.t.

(i) u(0,t)=0=u(,t) (ii) u(x,0)= 3sinx+4sin4x

(iii) xforxut 00)0,( .


Q.No.1. Define the following

(i) Limit of f(z) (ii) Continuity of f(z) (iii) Derivation of f(z)

(iii) Analyticity of f(z) (v) Singularity of f(z)

Q.No.2. Show that the function f(z) defined by f(z) = 22

33)1()1(

yx

iyix

,z0 & f(0)=0 is

Continuous & the C.R. equations are satisfied at the origin, yet f'(0) does not exist.

Q.No.3. If f(z) is an analytic function with constant modulus, show that f(z)is constant.

Q.No.4. If f(z) is a regular function of z, prove that

.)(4)(22

2

2

2

2

zfzfyx

Q.No.5 If f(z) is a holomorphic function of z, show that

2

22

)()()( zfzfy

zfx

Q.No.6. Show that the polarform of C.R. equations are

u

rr

vv

rr

u 1,.

1 . Deduce

that .011

2

2

22

2

u

rr

u

rr

u

Q.No.7. Show that the function f(z)= 106

32)(

yx

iyxyx

, z0, f(0)= 0

is not analytic at the origin even though it satisfies C.R. equations at the origin.


Q.No.1 The probability that a man aged 60 will live to be 70 is 0.65. What is the

probability that out of 10 men aged 60 now, atleast 7 would live to be 70.

(Ans: 0.514)

Q.No.2 In a bolt factory machines A, B & C manufacture 25%, 35% and 40% of the

total. Of their output 5%,4% & 2% are defective bolts. A bolt is drawn at

random from the product and is found to be defective. What are the

probability that it was manufactured by machine A,B & C?

Q.No.3 In a bolt factory there are four machines A, B, C & D manufacturing 20%,

15%, 25% & 40% of the total output respectively. Of their output 5%,4%, 3% &

2% in the same order are defective bolts. A bolt is chosen at random from the

factories production and is found to be defective. What is the probability that

the bolt was manufactured by machine A or machine D?

Q.No.4 The contents of three urns are: 1 white, 2 red, 3 green balls; 2 white, 1 red, 1

green balls and 4 white, 5 red, 3 green balls. Two balls are drawn from an

urn chosen at random. These are found to be one white and one green. Find

the probability that the balls so drawn came from the third urn.

Q.No.5 A random variable x has the following probability function;

Value of x : -2 -1 0 1 2 3

P(x) : 0.1 k o.2 2k 0.3 k

Find the value of k and calculate mean and variance.

Q.No.6 Four coins are tossed. What is the expectation of the number of heads.


Q.No.:1 A product of 0.5% is defective & is packed in cartons of 100. What %

contains not more han 3 defectives. (Ans: 99.83%)

Q.No.:2 A die is tossed thrice. A success is getting 1 or 6 on a toss. Find the mean

and variance of the number of successes.

Q.No.:3 If a random variable has poisson distribution such that P(1)= P(2), find

(i) Mean of the distribution (ii) P(4) (Ans: (i) 2 (ii)2/3e-2

)

Q.No.:4 Six dice are thrown together at a same time, the process is repeated 729

times. How many times do you expect at least three dice to have 4 or 6.

(Ans: 233)

Q.No.:5 The no. of telephone calls arriving on an internal switch board of an office is

90 per hour. Find the prob. that at the most 1 to 3 calls in a minute on the

board arrive. (Ans: 0.711)

Q.No.:6 The avg. no. of suicides per week in a city is 1.5. Find the prob. that there will

be 5 or more suicides in one month (4 weeks). (Ans: 0.77)

Q.No.:7 Chance of certain manufactured component of a machine being defective is

0.002. The components are in packet of 10. Find the no. of packets

containing no defective, one defective & two defective items resp. in a

consignment of 5000 packets. (Ans: 4901.98, 01)


Q.No.1 Determine the analytic function whose real part is

(i) log 22 yx (ii) sin2x / (cosh2y- cos2x).

Q.No.2 An electrostatic field in the xy- plane is given by the potential function =

323 yyx . Find the steam function . (Ans: = cxyx 23 3 ).

Q.No.3 (i)If the potential function is log( 22 yx ), find the flux function and the complex

potential function w = +i.

(ii) In a two dimensional fluid flow, the stream function is = tan-1 )

(x

y, find the

velocity potential .

Q.No.4 The diameter of an electric cable is assumed to be a continous virate with

p.d.f f(x) = 6(x)(1-x), 0 x 1. Verify that the above is p.d.f. Also, find the

mean and variance.

Q.No.5 Given that ,0 1

,1 2

x

x

,

1 1( ) , ( ) .

3 4P B P A B Find ( / ), ( ), ( '/ ')P A B P A B P A B .

Q.No.6 The frequency distribution of a measureable characteristic varying between 0 & 2 is

as under:

3

3( )

(2 )

xf x

x

,0 1

,1 2

x

x

Calculate the standard deviation and also the mean deviation about the mean.

Tutorial Sheet No.7

Q.No.:1 Using graphical method solve LP problems:

1553:.

35

21

21

xxtoSub

xxMaxZ

.0,

1025

21

21

xx

xx

Q.No.:2 Using graphical method solve LP problems:

402:.

1020

21

21

xxtoSub

xxMinZ

0,

6034

303

21

21

21

xx

xx

xx

Q.No.:3 A firm produces two products A &B on which the profits earned permit are Rs.3 and

Rs.4

respectively. Each product is processed on two machines 21 & MM . Product A requires

one minute processing time on 1M and 2 minutes on 2M while B requires one minute

on 1M and one minute on 2M Machine 1M is available for not more than 7hrs

& 30 minutes while 2M is available for lot during any working day. Find the number

of products A and B to be manufactured to get maximum profit.

Q.No.:4 Vitamins A & B are available in two different foods P & Q. One unit of P contains 2

unitsof vitamin A and 3 units of vitamin B. One unit of Q contains 5 units of Vitamin A and 4

units of Vitamin B. The minimum daily consumption of vitamin A and B should be

1000 and 1500 units respectively. One unit of P costs Rs. 5 and one unit of Q costs

Rs. 6. What should be the intake of P& Q in order to minimize cost.

Q.No.:5 A firm makes product x and y and has a total production of a capacity of 9 tonnes per

day x & y requiring the same production capacity. The firm has a permanent contract to

supply atleast 2 tonnes of x and atleast 3 tonnes of y per day to another company. Each

tone of x requires 20 machine hrs production time and each tonne of y requires 50

machines hrs production time, the daily maximum possible number of machine hrs is

360. All the firms output can be sold, and the profit made is Rs. 80 per tonne of x and

Rs.120 per tonne of y. It is required to determine schedule for maximum profit and to

calculate the profit.

Q.No.:6 Solve graphically. 1:.

5

21

2

xxtoSub

xMaxZ

.0,

105.05.0

21

21

xx

xx


Q.No.:1 Using Simplex method solve the LPP

102:.

3

21

21

xxtoSub

xxMaxZ

.40

50

2

1

x

x

Q.No.:2 Using Dual Simplex method solve LPP

2532:.

422

zyxtoSub

zyxMinZ

0,,

564

373

zyx

zyx

zyx

Q.No.:3 Find the solution space of the LPP

432:.

33

zyxtoSub

zyxMaxZ

0,,

7532

zyx

zyx

Which of these are the (a) basic, (b) non- degenerate basic feasible, (c) optimal basic

solution.

Q.No.:4 Using Simplex method solve the LPP

832:.

453

21

321

xxtoSub

xxxMaxZ

0,,

15423

1052

321

321

32

xxx

xxx

xx

Q.No.:5 Using Dual Simplex method solve the LPP

33:.

32

yxtoSub

yxMinZ

0,

32

634

yx

yx

yx





Class / Sem.: 4th

Assignment-1

1. Obtain Fourier Sine integral of xexf )( . Hence evaluate

0 22)sin(

d

x.

2. Find half range Cosine series for 2)1()( xxf in the interval (0,1).

3. Find Fourier series expansion for

xx

xxxf

0,1

0,1)( .

Hence evaluate .5

1

3

1

1

1222

4. Find Fourier transform of

1,0

1,1)(

2

x

xxxf .

Hence evaluate .2

cos)sincos(

3

dx

x

x

xxx

5. Find Fourier Cosine transform of 2

)(x

exf .

6 Expand

12

1,

4

3

2

10,

4

1

)(

xx

xx

xf as a Fourier series of Sine terms.

Assignment-2

1. Express coth(x+iy) into the form of A+iB i.e. into real & imaginary

parts.

2. If iBAi iBA , then prove that BneBA )14(22 .

3. If sincos)tan( ii , then prove that )24

tan(log2

1

42

and

n.

4. Find all the roots of the equation cosz=2.

5. If tan(x+iy)=sin(u+iv), then show that v

u

y

x

tanh

tan

)2sinh(

)2sin( .

6. If tan(A+iB)=x+iy, then prove that .01)2coth(222 Byyx

Assignment 3

1. Solve the equation, using Fourier transforms 2

2

x

u

t

u

subject to the

conditions:

(i) u(0,t)= 0 (ii) u(x,0)=

1,0

10,1

x

x (iii) u(x,t) is bounded.

2. If cosh(x)= sec, then prove that (i) )2

(tan)2

(tanh22

x (ii) )

24tan(log

x .

3. The Temperature u in a semi-infinite rod x0 is determined by the

differential equation

2

2

x

uk

t

u

subject to the conditions (i) u(x,0)=0 (ii)

x

u(a constant) at x=0. Determine the

temperature u(x,t) using Fourier transform.

4. The probability that a man aged 60 will live to be 70 is 0.65. What is the probability that out

of 10 men aged 60 now, at least 7 would live to be 70.

5. In a Normal distribution 31% items are under 45 and 8% items are over 64. Find the

Mean value () and standard deviation () of the distribution.

Assignment 4

1. Define a LPP. Solve the following LPP using graphical method,

Max Z= 2.5 x + y s.t. 3x + 5y 15; 5x + 2y 10 where x, y 0.

2. Fit a Poisson distribution to the following data X: 0 1 2 3 4

f: 192 100 24 3 1

3. Using Simplex method, solve the following LPP

3212 xxxMaxZ s.t. .0,,

;22;1

321

32121

xxx

xxxxx

4. Using dual simplex method, solve the following LPP: Min Z = 2x + 3y s.t. 3x + y 3; 4x + 3y 6; x + 2y 3;

where x, y 0.

5. If mean of a binomial distribution is 20 and standard deviation 4. Find n,p and q.

6. If X is a Poisson Variate such that P(X=1)=P(X=2).Find the mean value of the distribution.

Syllabus

CSE- 202 E Computer Architecture & Organization

L T P Sessional: 50 Mark

3 1 - Exam : 100 Mark

Total: 150 Mark

Duration of Exam: 3

Hrs.

Unit-1: General System Architecture: Store program control concept, Flynns classification of

computers (SISD, MISD, MIMD); Multilevel viewpoint of a machine: digital logic, micro

architecture, ISA, operating systems, high level language; structured organization; CPU, caches,

main memory, secondary memory units & I/O; Performance metrics; MIPS, MFLOPS. Instruction Set Architecture: Instruction set based classification of processors (RISC, CISC,

and their comparison); addressing modes: register, immediate, direct, indirect, indexed;

Operations in the instruction set; Arithmetic and Logical, Data Transfer, Machine Control Flow;

Instruction set formats (fixed, variable, hybrid); Language of the machine: 8086 ; simulation

using MASM Unit-2: Basic non pipelined CPU Architecture: CPU Architecture types (accumulator, register,

stack, memory/ register) detailed data path of a typical register based CPU, Fetch-Decode-

Execute cycle (typically 3 to 5 stage); microinstruction sequencing, implementation of control

unit, Enhancing performance with pipelining. Hardwired control design method, Micro

programmed control unit. Unit-3: Memory Hierarchy & I/O Techniques: The need for a memory hierarchy (Locality of

reference principle, Memory hierarchy in practice: Cache, main memory and secondary memory,

Memory parameters: access/ cycle time, cost per bit); Main memory (Semiconductor RAM &

ROM organization, memory expansion, Static & dynamic memory types); Cache memory

(Associative & direct mapped cache organizations. Allocation & replacement polices, segments,

pages & file organization, virtual memory. Unit-4: Introduction to Parallelism: Goals of parallelism (Exploitation of concurrency,

throughput enhancement); Amdahls law; Instruction level parallelism (pipelining, super scaling

basic features); Processor level parallelism (Multiprocessor systems overview). Computer Organization [80x86]: Instruction codes, computer register, computer instructions,

timing and control, instruction cycle, type of instructions, memory reference, register reference.

I/O reference, Basics of Logic Design, accumulator logic, Control memory, address sequencing,

micro-instruction formats, micro-program sequencer, Stack Organization, Instruction Formats,

Types of interrupts; Memory Hierarchy. Programmed I/O, DMA & Interrupts. Text Books:

Computer Organization and Design, 2nd Ed., by David A. Patterson and John L. Hennessy, Morgan 1997, Kauffmann.

Computer Architecture and Organization, 3rd Edi, by John P. Hayes, 1998, TMH. Reference Books:

Operating Systems Internals and Design Principles by William Stallings,4th edition,

2001, Prentice-Hall Upper Saddle River, New Jersey Computer Organization, 5th Edi, by Carl Hamacher, Zvonko Vranesic,2002, Safwat Zaky. Structured Computer Organisation by A.S. Tanenbaum, 4th edition, Prentice-Hall of

India, 1999, Eastern Economic Edition. Computer Organisation & Architecture: Designing for performance by W. Stallings,

4th

edition, 1996, Prentice-Hall International edition. Computer Architecture & Organisation by M. Mano, 1990, Prentice-Hall. Computer Architecture- Nicholas Carter, 2002, T.M.H.

Note: Eight questions will be set in all by the examiners taking at least two

questions from each unit .Students will be required to attempt five

questions in all at least one from each unit.



Course Name: Computer Architecture & Organization

Course Code: CSE- 202 E

Class / Sem.: 4th

Lecture Plan

Lect.

No.

Topic Name References

UNIT-1st

L-1 Introduction to Computer Architecture and Organization, Store

program control concept, Flynns classification of computers

(SISD,MISD, MIMD);

M.M. Mano ,

Computer

System

Architecture

L-2 Multilevel viewpoint of a machine: digital logic, micro

architecture,

M.M. Mano

L-3 ISA, operating systems ,High level language; structured

organization

M.M. Mano

L-4 CPU, caches, main memory, secondary memory units & I/O M.M. Mano

L-5 Performance metrics; MIPS, MFLOPS M.M. Mano

L-6 Instruction Set Architecture: Instruction set based classification of

processors (RISC, CISC, and their comparison)

M.M. Mano

L-7 addressing modes: register, immediate, direct, indirect, indexed M.M. Mano

L-8 Operations in the instruction set;Arithmetic and Logical, Data

Transfer,

M.M. Mano

L-9 Machine Control Flow; Instruction set formats (fixed, variable,

hybrid)

M.M. Mano

L-10 Language of the machine: 8086 ; simulation using MASM M.M. Mano

UNIT -2nd

L-11 Basic non pipelined CPU Architecture: CPU Architecture types

(accumulator, register, stack, memory/register)

M.M. Mano

L-12 detailed data path of a typical register based CPU, Fetch-Decode-

Execute cycle (typically 3 to 5 stage);

M.M. Mano

L-13 microinstruction sequencing, implementation of control unit M.M. Mano

L-14 Enhancing performance with pipelining M.M. Mano

L-15 Hardwired control design method, Micro programmed control

unit

M.M. Mano

UNIT-3rd

L-16 Memory Hierarchy & I/O Techniques: The need for a memory

hierarchy,Locality of reference principle

J.P.Hayes,

L-17 Memory hierarchy in practice: Cache, main memory and

secondary memory

J.P.Hayes

L-18 Memory parameters: access/cycle time, cost per bit); Main

memory

J.P.Hayes

Semiconductor RAM & ROM organization J.P.Hayes

L-19 memory expansion, Static & dynamic memory types); J.P.Hayes

L-20 Cache memory -Associative & direct mapped cache organizations J.P.Hayes

L-21 Allocation & replacement polices, segments J.P.Hayes

L-22 Pages & file organization, virtual memory. J.P.Hayes

UNIT-4th

L-23 Introduction to Parallelism: Goals of parallelism (Exploitation of

concurrency, throughput enhancement);

J.P.Hayes

L-24 Amdahls law; Instruction level parallelism (pipelining, super

scaling basic features)

J.P.Hayes

L-25 Processor level parallelism (Multiprocessor systems overview). M.M. Mano

L-26 Computer Organization [80x86]: Instruction codes, computer

register

M.M. Mano

L-27 computer instructions, timing and control, instruction cycle, M.M. Mano

L-28 type of instructions, memory reference, register reference. I/O

reference

M.M. Mano

L-29 Basics of Logic Design,accumulator logic, Control memory, J.P.Hayes

L-30 address sequencing, micro-instruction formats, micro-program

sequencer,

J.P.Hayes

L-31 Stack Organization, Instruction Formats, M.M. Mano

L-32 Types of interrupts; M.M. Mano

L-33 Memory Hierarchy. Programmed I/O, M.M. Mano

L-34 DMA & Interrupts. M.M. Mano

L-35 mesh networks, Tree networks, ring networks J.P.Hayes

L-36 Pipelining basic concept M.M. Mano





Class / Sem.: 4th

Tutorial Sheet: I

Q1. Consider having a program that runs in 50 s on computer A, which has a 500 MHz clock.

We would like to run the same program on another machine, B, in 20 s. If machine B

requires 2.5 times as many clock cycles as machine A for the same program, what clock rate

must machine B have in MHz?

Q2.Suppose that we have two implementations of the same instruction set architecture. Machine

A has a clock cycle time of 50 ns and a CPI of 4.0 for some program and machine B has a

clock cycle of 65 ns and a CPI of 2.5 for the same program. Which machine is faster and by

how much?

Q3. A compiler designer is trying to decide between two code sequences for a particular

machine. The hardware designers have supplied the following facts:

For a particular high-level language, the compiler writer is considering two sequences that

require the following instruction counts:

What is the CPI for each sequence? Which code sequence is faster? By how much.

Q4. Consider a machine with three instruction classes and CPI measurements as follows:

Suppose that we measured the code for a given program in two different compilers and

obtained the following data:

Assume that the machines clock rate is 500 MHz. Which code sequence will execute faster

according to MIPS? And according to execution time?

Q5. Three enhancements with the following speedups are proposed for a new machine: Speedup

(a) = 30, Speedup (b) =20, and Speedup(c) =15. Assume that for some set of programs, the

fraction of use is 25% for enhancement (a), 30% for enhancement (b), and 45% for

enhancement (c). If only one enhancement can be implemented, which should be chosen to

maximize the speedup? If two enhancements can be implemented, which should be chosen, to

maximize the speedup?

Q6. Evaluate following expression using Zero, One, two and three address instructions.

Z=AB-C+(G-ED)/HF

Q7. A one word instruction is stored in memory at an address designated by the symbol W. The

address field of the instruction (stored at W+1) is designated by symbol Y. The operand used

during the execution of instruction is stored at an address symbolised by Z. an index register

contains the value of X. State how Z is calculated from the other address if the addressing mode

of the instruction is

(a) direct

(b) indirect

(c) relative

(d) indexed

Tutorial Sheet: II

Q1. A computer a memory unit with 256K words of 32 bits each. A binary instruction code is

stored in one word of memory. The instruction has four parts; an indirect bit, an operation code,

a register part to specify one of 64 registers and an address part.

(a) How many bits are there in the operation code, the register code part, and address part?

(b) Draw the instruction word format and indicate the number of bits in each part?

(c) How many bits are there in data and address inputs of memory?

Q2. A computer has 32 bit instructions and 12 bit address. If there are 250 two address

instructions, how many one-address instructions can be formulated?

Q3 An instruction is stored at location 300 with its address field at location 301. The address

field has the value 400. A processor register R1 contains the number 200. Evaluate the effective

address if the addressing mode of the instruction is

(a) direct (b) immediate (c) relative (d) register indirect (e) index with R1 as the index register

Q4. Let the address stored in the program counter be designated by the symbol X1. The

instruction stored in X1 has an address part (operand reference) X2. The operand needed to

execute the instruction is stored in the memory word with address X3.An index register

contains the value X4.What is the relationship between these various quantities if the

addressing mode of the instruction is (a) direct; (b) indirect; (c) PC relative; (d) indexed?

Q5. An address field in an instruction contains decimal value 14. Where is the corresponding

operand located for

a. immediate addressing?

b. direct addressing?

c. indirect addressing?

d. register addressing?

e. register indirect addressing?

Q6. Consider a 16-bit processor in which the following appears in main memory, starting at

location 200:

The first part of the first word indicates that this instruction loads a value into an accumulator.

The Mode field specifies an addressing mode and, if appropriate, indicates a source register;

assume that when used, the source register is R1, which has a value of 400.There is also a base

register that contains the value 100.The value of 500 in location 201 may be part of the address

calculation. Assume that location 399 contains the value 999, location 400 contains the value

1000, and so on. Determine the effective address and the operand to be loaded for the following

address modes:

a. Direct d. PC relative g. Register indirect

b. Immediate e. Displacement h. Auto indexing with increment, using R1

c. Indirect f. Register

Q7.A PC-relative mode branch instruction is 3 bytes long. The address of the instruction, in

decimal, is 256028. Determine the branch target address if the signed displacement in the

instruction is 31.

Q 9. A PC-relative mode branch instruction is stored in memory at address 62010. The branch is

made to location 53010 .The address field in the instruction is 10 bits long. What is the binary

value in the instruction?

Tutorial Sheet: III

Q1. Suppose that a 1G x 32-bit main memory is built using 256M x 4-bit RAM chips and that

this memory is word-addressable.

For this memory organisation evaluate:

a) The number of RAM chips per memory module?

b) The number of memory modules?

c) The number of RAM chips for the full memory?

d) The number of address bits needed for a memory module?

e) The number of address bits needed for the full memory?

Q2. Let us assume that you have profiled your code and the instruction mix is detailed in Table

1. We now want to build an optimizing compiler for the CPU. The compiler discards 50% of the

ALU instructions although it cannot reduce loads, stores, or branches. Assuming a 20-ns clock

cycle time (or a 50-MHz clock), what is the MIPS rating for the optimized code versus the

unoptimized code? Does the MIPS rating agree with the ranking of execution time?

Table 1: The instruction mix and CPIs of individual instructions

Operation Frequency CPI

ALU Operations 43% 1

Loads 21% 2

Stores 12% 2

branches 24% 2

Q3 A Digital Computer has a memory of 64K16 and a cache of 1k words. The cache uses direct

mapping with a block size of four words.

a) How many bits are there in tag, Block and word fields of the address format? b) How many bits are there in each word of cache and how they are divided in to functions?

Also include a valid bit.

Q4.Contents of various registers & memory of a typical Computer system instruction are given

below:

[R1]=0200H, [R2]=0060H , M[0200]= 0070H, Address part= 0500H

[BR]= 0360H, [IR]=0900H, M[0500]= 0040H. [ACC]= 0210H

Find the value of operand in each of following addressing modes.

a. Immediate d. Indirect Mode b. Implied mode e. Register Indirect mode c. Direct mode f. Base addressing Mode.

Q5. Compare zero-, one-, two-, and three-address machines by writing programs to compute for

each of the four machines.

X = (A + B * C)/(D E * F)

The instructions available for use are as follows:

Q6. Many instruction sets contain the instruction NOOP, meaning no operation, which has no

effect on the processor state other than incrementing the program counter. Suggest some uses

of this instruction.

Q7. Suppose a stack is to be used by the processor to manage procedure calls and returns. Can

the program counter be eliminated by using the top of the stack as a program counter?

Q8. Suppose an 8-bit data word stored in memory is 11000010. Using the Hamming algorithm,

determine what check bits would be stored in memory with the data word. Show how you got

your answer.

Q9. How many check bits are needed if the Hamming error correction code is used to detect

single bit errors in a 1024-bit data word?

Tutorial Sheet: IV

Q1. A computer having a memory of 2048 16 words uses following information word format.

Opcode (4)

Mode

Register address

Address Part

If this computer has 32 general purpose registers then find the number of bits in each of

mode, register address and address fields.

Q2. Suppose a cache is 10 times faster than main memory and suppose that the cache can be

used 90% of the times. How much speed up do we gain by using the cache?

Q3. A ROM chip of 10248 bits has four select inputs and operates from a 5-volt power supply.

How many pins are needed for IC Package? Draw a block diagram and label all input and

output terminals in ROM.

Q4. (a) How many 1288 Ram Chips are needed to provide a memory capacity of 2048 bytes?

(b) How many lines of the address bus must be used to access 2048 bytes of memory? How

many these lines will be common to all chips?

How many lines must be decoded for chip and select? Specify the size of the decoders?

Q5. A hard magnetic disk with a single platter rotates once every 16 ms. There are 8 sectors on

each of 1000 tracks. An interleave factor of 1:2 is used. What is the fastest possible time to

copy a track from the top side of the platter to the corresponding track on the bottom side of

the platter? Assume that the sectors must be read in numerical order starting from 0, that the

top and bottom tracks must be mirror images, that any number of sectors can be read from

the top track before writing them to the bottom track, and that simultaneous reading and

writing is not allowed (even on different tracks.).

Q6. Consider a disk drive with the following characteristics:

7200 revolutions per minute rotation speed

7 msec average seek time

256 sectors per track, with 512 bytes per sector

2048 tracks per surface

16 surfaces

1 head per surface, all heads move together as a group reading and writing cannot be done at

the same time

(a) What is the total capacity of the disk drive?

(b) What is the data transfer rate in bytes per second for this drive? That is, once the head is

positioned over the sector to be read, what is the data transfer rate?

(c) What is the average time to transfer a whole sector from one track to another track?

Q7. A number of disks, a CPU, and the main memory are all connected to the same 10 MHz 32-

bit bus. The disk has a transfer rate of 2 Mbytes/sec. The CPU and main memory can both

keep pace with the bus. How many disks can be simultaneously transmitting?

Q8. What is the average access time of a system having three levels of memory, a cache

memory, a semiconductor main memory, and a magnetic disk secondary memory, if the

access times of the memories are 20 ns, 100 ns, and 1 ms, respectively. The cache hit ratio is

90% and the main memory hit ratio is 95%

Q9.Give reasons that the page size in a virtual memory system should be neither very small nor

very large.

Q10. Consider a fixed partitioning scheme with equal-size partitions of 216

bytes and a total main

memory size of 224

bytes. A process table is maintained that includes a pointer to a partition for

each resident process. How many bits are required for the pointer?

Q11. Suppose the page table for the process currently executing on the processor looks like the

following. All numbers are decimal, everything is numbered starting from zero, and all addresses

are memory byte addresses. The page size is 1024 bytes.

What physical address, if any, would each of the following virtual addresses correspond to? (Do

not try to handle any page faults, if any.)

(i) 1052

(ii) 2221

(iii) 5499

Q12.Consider a computer system with both segmentation and paging, when a segment is in

memory, some words are wasted on the last page. In addition, for a segment sizes and a page size

p, there are s/p page table entries. The smaller the page size, the less waste in the last page of the

segment, but the larger the page table. What page size minimizes the total overhead?

Tutorial Sheet: V

Q1. A Computer uses RAM Chips of 10241 capacity.

(a) How many chips are needed and how should their address lines be connected to provide a memory capacity of 1024bytes?

(b) How many chips are needed to provide a memory capacity of 16K bytes? Explain in words the chips are to be connected to address bus?

Q2. Show that the maximum theoretical speedup that may be achieved through a k- stage

pipeline is equal to the numbers of stages (K).

Q3 a two way associate cache memory uses blocks of four words. The cache can accommodate a

total of 2048 words from main memory. The main memory size is 128K32.

a. Formulate all pertinent information required to construct the cache memory. b. What is the size of cache memory?

Q4. A digital computer has a memory unit of 64K16 and a cache memory of 1k words. The

cache uses mapping with a block size of four words.

a. How many bits are there in tag, index, block and word fields of the address format? b. How many bits are there in each of cache, and how are they divided into functions? c. How many blocks can cache accommodate?

Q5. A cache has a 95% hit ratio, an access time of 100ns on a cache hit, and an access time of

800ns on a cache miss. Compute the effective access time.

Q6. A set associative cache consists of 64 slots divided into 4-slot sets. Main memory contains

4K blocks of 128 words each. Show the format of the main memory address.

Q7. When running a particular program with N memory accesses, a computer with a cache and

paged virtual memory generates a total of M cache misses and F page faults. T1 is the time

for a cache hit; T2 is the time for a main memory hit; and T3 is the time to load a page into

main memory from the disk.

(a) What is the cache hit ratio?

(b) What is the main memory hit ratio? That is, what percentage of main memory accesses

does not generate a page fault?

(c) What is the overall effective access time for the system?

Q8. A direct mapped cache consists of 4 blocks of 16 words per block. Main memory contains

32K blocks of 16 words each. The hit time for a cache access is 10 ns, and the miss time is

200 ns, which includes the time to transfer the missed block from the main memory to the

cache. Note: When referring to memory, 1K = 1024. Compute the hit ratio for a program that

loops 10 times from locations 0 64.

Q9. A computer has 16 pages of virtual address space but only 4 page frames. Initially the

memory is empty. A program references the virtual pages in the order:

0 2 4 5 2 4 3 11 2 10.

(a) Which references cause a page fault with the LRU page replacement policy?

(b) Which references cause a page fault with the FIFO page replacement policy?

Q10. A set associative cache consists of 64 slots divided into 4-slot sets. Main memory contains

4K blocks of 128 bytes each. Show the format of the main memory address. (Tag, Slot or

Set, and Byte fields.)

Q11. An operating system uses a Least Recently Used (LRU) page replacement algorithm.

Consider the following page reference ordering (pages are referenced from left to right): 1, 8,

1, 7, 8, 2, 7, 2, 1, 8, 3

Which of the following is the number of page faults that are generated for this particular

LRU case assuming that the process has been allocated four page frames, and that initially,

none of the pages are in the main memory? (Circle one.)

Q12. A virtual memory system has a page size of 512 bytes, eight virtual pages, and four

physical page frames. The page table is as follows

(a) What is the main memory address for virtual address 1024?

(b) What is the virtual address for main memory address 512?

Tutorial Sheet: VI

Q1 an Address space is specified by 24bits and the corresponding memory space by 16bits.

a. How many words are there in address space? b. How many words are there in memory space? c. If a page consists of 2K words, how many pages & blocks are there in the system?

Q2.A virtual memory has a page size of 1k words. There are eight pages and four blocks. The

associate memory page table contains the following entries.

Page Block

0 3

1 1

4 2

6 0

Make a list of all virtual addresses (in decimal/ hex) that will cause page fault if used by CPU.

Q3. A logical address space in a computer system consists of 128 segments. Each segment can

have up to 32 pages of 4K words in each. Physical memory consists of 4K blocks of 4k words in

each. Formulate the logical and physical address formats.

Q4. The access time of a cache memory is 100ns and that of main memory 1000ns. It is

estimated that 80% of the memory requests are for read and the remaining 20% for write. The hit

ratio for read accesses only is 0.9. A write through procedure is used.

a. What is the average access time of the system considering only memory read cycles? b. What is the average access time of the system for both read and write requests/ c. What is hit ratio taking into consideration the write cycles?

Q5. Consider a single-platter disk with the following parameters: rotation speed: 7200 rpm;

number of tracks on one side of platter: 30,000; number of sectors per track: 600; seek time:

one ms for every hundred tracks traversed. Let the disk receive a request to access a random

sector on a random track and assume the disk head starts at track 0.

a. What is the average seek time?

b. What is the average rotational latency?

c. What is the transfer time for a sector?

d. What is the total average time to satisfy a request?

Q6. Consider a magnetic disk drive with 8 surfaces, 512 tracks per surface, and 64 sectors per

track. Sector size is 1 KB. The average seek time is 8 ms, the track-to-track access time is 1.5

ms, and the drive rotates at 3600 rpm. Successive tracks in a cylinder can be read without head

movement.

a. What is the disk capacity?

b. What is the average access time? Assume this file is stored in successive sectors and tracks

of successive cylinders, starting at sector 0, track 0, of cylinder i.

c. Estimate the time required to transfer a 5-MB file.

d. What is the burst transfer rate?

Q7. A distinction is made between physical records and logical records. A logical record is a

collection of related data elements treated as a conceptual unit, independent of how or where

the information is stored. A physical record is a contiguous area of storage space that is

defined by the characteristics of the storage device and operating system. Assume a disk

system in which each physical record contains thirty 120-byte logical records. Calculate how

much disk space (in sectors, tracks, and surfaces) will be required to store 300,000 logical

records if the disk is fixed-sector with 512 bytes/sector, with 96 sectors/track, 110 tracks per

surface, and 8 usable surfaces. Ignore any file header record(s) and track indexes, and assume

that records cannot span two sectors.

Q8. Consider a dynamic RAM that must be given a refresh cycle 64 times per ms. Each refresh

operation requires 150 ns; a memory cycle requires 250 ns. What percentage of the

memorys total operating time must be given to refreshes?

Q9.a. Consider an L1 cache with an access time of 1 ns and a hit ratio of H 0.95. Suppose that

we can change the cache design (size of cache, cache organization) such that we increase H

to 0.97, but increase access time to 1.5 ns. What conditions must be met for this change to

result in improved performance?

b. Explain why this result makes intuitive sense.

Tutorial Sheet: VII

Q1. A nonpipeline system takes 50ns to process a task. The same task can be processed in a six-

segment pipeline with a clock cycle of 10ns. Determine the speedup ratio of the pipeline for 100

tasks. What is the maximum speedup that can be achieved?

Q2. Determine the number of clock cycles that it takes to process six-segment pipeline.

Q3.A weather forecasting computation requires 250 billion floating point operations. The

problem is processed in a supercomputer that can perform 100 megaflops. How long will it take

to do these calculations?

Q4. Consider a computer with four floating point pipeline processors. Suppose that each

processor uses a cycle time of 40 ns. How long will it take to perform 400 floating point

operations? Is there a difference if the same 400 operations are carried out using a single pipeline

processor with a cycle time of 10ns?

Q5. A CPU with a 20-MHz clock is connected to a memory unit whose access time is 40 ns.

Formulate a read and a write timing diagrams using a READ strobe and a WRITE strobe.

Include the address in the timing diagram.

Q6. How many characters per second can be transmitted over a 1200-baud line in each of the

following modes? (Assume a character code of eight bits.)

a). Synchronous serial transmission.

b). Asynchronous serial transmission with two stop bits.

c). Asynchronous serial transmission with two stop bits.

a. What is the speedup achieved for a typical program?

b. What is the MIPS rate for each processor?

Tutorial Sheet: VIII

Q1. Information is inserted into a FIFO buffer at a rate of m bytes per second. The information is

deleted at a rate of n byte per second. The maximum capacity of the buffer is k bytes.

a. How long does it take for an empty buffer to fill up when m > n ? b. How long does it take for a full buffer to empty when m < n ? c. Is the FIFO buffer needed if m=n?

Q2. A DMA controller transfers 16-bit words to memory using cycle stealing. The words are

assembled from a device that transmits characters at a rate of 2400 characters per second. The

CPU is fetching and executing instructions at an average rate of 1 million instructions per

second. By how much will the CPU slowed down because of the DMA transfer?

Q3. A microprocessor scans the status of an output I/O device every 20 ms. This is accomplished

by means of a timer alerting the processor every 20 ms. The interface of the device includes two

ports: one for status and one for data output. How long does it

take to scan and service the device given a clocking rate of 8 MHz? Assume for simplicity that

all pertinent instruction cycles take 12 clock cycles.

Q4. A particular system is controlled by an operator through commands entered from a

keyboard. The average number of commands entered in an 8-hour interval is 60.

a. Suppose the processor scans the keyboard every 100 ms. how many times will the keyboard be

checked in an 8-hour period?

b. By what fraction would the number of processor visits to the keyboard be reduced if interrupt-

driven I/O were used?

Q5. A nonpipelined processor has a clock rate of 2.5 GHz and an average CPI (cycles per

instruction) of 4. An upgrade to the processor introduces a five-stage pipeline. However, due to

internal pipeline delays, such as latch delay, the clock rate of the new processor has to be

reduced to 2 GHz.

Q6. A computer has a cache, main memory, and a disk used for virtual memory. If a referenced

word is in the cache, 20 ns are required to access it. If it is in main memory but not in the

cache, 60 ns are needed to load it into the cache, and then the reference is started again. If the

word is not in main memory, 12 ms are required to fetch the word from disk, followed by 60

ns to copy it to the cache, and then the reference is started again. The cache hit ratio is 0.9

and the main memory hit ratio is 0.6.What is the average time in nanoseconds required to

access a referenced word on this system.





Class / Sem.: 4th

Assignment: I

Q-1. How do you classify instructions in an instruction set? Explain any two instruction in each

category

with suitable examples.

Q-2 Discuss two metrics to measure the performanceof a computer system. What are the pros

and cons

of using these two metrics?

Q-3. We wish to compare the performance of two different machines M1 and M2. The following

measurements

have been made on these machines:

Program Time on M1 Time on M2

1 50 sec 82 sec

2 89 sec 87 sec

3 50 sec 48 sec

Which machine is faster for each program and by how much? For program 1, M1 executed

46 million

Instructions while M2 executed 18 million instructions. What is the instruction execution

rate for each machine

while executing program 1? Can we say something about the instruction execution rate of

the other

two programs as well? Explain your answer.

Q-4. (a) Perform division of the following positive numbers using restoring Division

1000 / 11,register size , n=4 bits.

(b) Explain Advantage of Booth's algorithm for Multiplication.and Hardware

implementation of Booth's Algorithm.

Assignment: II

Q-1. Differentiate Hardwired and micro-programmed control unit.Why we use it explain in your

answer? What are

the various techniques of microinstruction sequencing?

Q-2. How the program counter (PC) is incremented by ine during a fetch cycle ?Is there any role

of ALU during this

cycle?

Q-3. What is RISC Pipelining.discuss Pipelining with Regular Instructionand .Optimization of

Pipelining when

multiple instructions are there.

Q-4. Which performance-enhancing technique is more power-efficient: Doubling the number of

processors or

doubling the clock frequency? Why?

Assignment: III

Q1. In a magnetic disk, the platters containing the data are constantly rotating. On average, it

should

take half a revolution for the desired data on the disk to spin under the read/write head.

Assuming

that the disk is rotating at 5400 revolutions per minute, what is the average time for data to

rotate

under the disk head? Let us also assume that the disk can transmit 10MB of data to cpu per

second.

If we have data lined up in consecutive bytes (as a sector) in terms of 512 byte chunks, how

long will

it take to transmit 10 such chunks/sectors to memory (each chunk is in its own location and

randomly

distributed). How long will it take if the disk rotates at 7200 revolutions per minute?

Q-2.Explain concept of virtual memory and TLB with its advantages.

Q 3 A system requires a 256 MB memory that is byte addressable and has a data bus width of

32-bits.The memory chips on hand are 128 Mbit DRAM chips organized as 4K x (4K x 8)

bits. Answer the following about the memory you would design with the given parameters.

a) How many memory chips are required to construct the required memory? b) How many address lines are required for chips?

Q-4. What is meant by mapping ? In how many way mapping may be implemented? What is

the role of cache

directory in mapping?

Assignment: IV

Q-1. Explain the term Programmed I/O interrupt initiated I/O?and also explain Strobe and

handshaking method?

Q-2. What do you understand by Direct Memory Access? Draw the block diagram of

DMA controller and discuss the working.

Q-3. (a) How the even and odd memory banks are interfaced with 8086?

(b) which types of signal are neccessory to activate the external interrupts of 8086?

Q-4. (a) Why the I?O address id duplicated at the higher address bus during I/O cycle of 8086

(b) What are the facilities offered by the Subroutines and Macro?

SYLLABUS

CSE-204E

Programming Languages

L T P Sessional: 50 Marks

3 1 - Exam: 100 Marks

Total: 150 Marks

Duration of Exam: 3 Hrs.

Unit-1: Introduction: A brief history, Characteristics of a good programming language,

Programming language translators compiler & interpreters , Elementary data types data objects, variable & constants, data types, Specification & implementation of elementary data

types,

Declarations ,type checking & type conversions , Assignment & initialization, Numeric data

types,enumerations, Booleans & characters.

Syntax & Semantics : Introduction, general problem of describing syntax, formal method of

describing syntax, attribute grammar dynamic semantic.

Unit-2: Structured data objects : Structured data objects & data types , specification &

implementation of structured data types, Declaration & type checking of data structure ,vector &

arrays, records Character strings, variable size data structures , Union, pointer & programmer

defined data objects, sets, files.

Subprograms and Programmer Defined Data Types: Evolution of data type concept abstraction,

encapsulation & information hiding , Subprograms ,type definitions, abstract data types, over

loaded subprograms, generic subprograms.

Unit3: Sequence Control: Implicit & explicit sequence control, sequence control within expressions, sequence control within statement, Subprogram sequence control: simple call

return, recursive subprograms, Exception & exception handlers, co routines, sequence control.

Concurrency subprogram level concurrency, synchronization through semaphores, monitors & Data Control: Names & referencing environment, static & dynamic scope, block structure, Local

data & local referencing environment, Shared data: dynamic & static scope. Parameter &

parameter transmission schemes.

Unit-4: Storage Management: Major run time elements requiring storage, programmer and

system controlled storage management & phases , Static storage management , Stack based

storage management, Heap storage management ,variable & fixed size elements.

Programming Languages: Introduction to procedural, non-procedural, structured, logical,

functional and object oriented programming language, Comparison of C & C++ programming

(1) Programming languages Design & implementation by T.W. .Pratt, 1996, Prentice Hall Pub. (2)Progrmming Languages Principles and Paradigms by Allen Tucker & Robert Noonan,2002, TMH,

Reference Books:

Fundamentals of Programming languages by Ellis Horowitz, 1984, Galgotia

publications(Springer Verlag),

Programming languages concepts by C. Ghezzi, 1989, Wiley Publications.,

Programming Languages Principles and Pradigms Allen Tucker , Robert Noonan 2002,

Note: Eight questions will be set in all by the examiners taking at least two questions from each

unit .Students will be required to attempt five questions in all at least one from each unit.



Course Name: PROGRAMMING LANGUAGES

Course Code: CSE-204E

Class / Sem.: B.Tech (4th

sem)

Lecture Plan

Lect. No. Topic Name References

01. Introduction: A brief history [1]

02. Characteristics of a good programming language [1]

03. Programming language translators compiler & interpreters [1]

04. Elementary data types data objects [2]

05. Declarations ,type checking & type conversions [2]

06. Assignment & initialization, Numeric data types, [1]

07. Enumerations, Booleans & characters. [2]

08. Syntax & Semantics : Introduction [3]

09. Formal method of describing syntax [3]

10. Attribute grammar dynamic semantic. [2]

11. Structured data objects & data types [2]

12. Specification &implementation of structured data types [1]

13. Declaration & type checking of data structure [3]

14. vector & arrays, records [3]

15. Character strings, variable size data structures [2]

16. Union, pointer & programmer defined data objects, sets, files. [1]

17. Subprograms and Programmer Defined Data Types [1]

18. Abstraction, encapsulation & information hiding [3]

19. Subprograms ,type definitions [2]

20. Subprograms, generic subprograms. [3]

21 Implicit & explicit sequence control [3]

22. Sequence control within Expressions [3]

23. Exception & exception handlers [2]

24. Subprogram level concurrency [2]

25. Synchronization through semaphores, monitors [3]

26. Names & referencing environment [2]

27. Local referencing environment, [1]

28. Parameter & parameter transmission schemes. [1]

29. Major run time elements requiring storage [1]

30. Programmer and system controlled storage management [3]

31. Static storage management [3]

32. Stack based storage [2]

33. Heap storage management [2]

34. Object oriented programming language [3]

35. Comparison of C & C++ programming [3]

Reference Books:

[1] Fundamentals of Programming languages by Ellis Horowitz, 1984, Galgotia publications(Springer Verlag),

[2] Programming languages concepts by C. Ghezzi, 1989, Wiley Publications.,

[3]Programming Languages Principles and Pradigms Allen Tucker , Robert Noonan 2002,



Course Name:PROGRAMMING LANGUAGES


Class /Sem: B.Tech (2nd

year)/4th

Semester

Tutorial Sheet No-I

1. Explain the concept of firmware. What are the advantages of firmware? 2. List the types of translators discussed in class. Describe briefly the input and output of

each of them.

3. What is the idea of software simulaton? Discuss the advantages and disadvantages. 4. Discuss the concept of virtual machines. 5. What is binding? 6. What types of binding occur at language definition, language implementation? 7. What types of binding occur at program translation and program execution? 8. What is the advantage of bindings performed at translation time? At execution time?

Tutorial Sheet No-2

1. Explain the concept "data object" . 2. Give five attributes of data objects, describe them briefly. What are their binding times? 3. Explain the concept "data type". 4. Which are the three components needed to specify a data type? Describe them briefly. 5. Which are the two issues to be considered in implementation of a data type? 6. How can operations be implemented? 7. What is the purpose of declaration? 8. What is type checking? When is type checking performed? 9. What are the advantages and disadvantages of dynamic type checking? 10. Explain the concepts "coercion" and "explicit type conversion". 11. What are the advantages and disadvantages of coercion? 12. Explain the concepts "L-value" and "R-value" of a variable. Give examples

Tutorial Sheet No-3

1. What is a data structure? 2. Which are the elements of a structured data type specification? 3. What types of operations are considered when specifying a structured data type? 4. Which are the basic methods for storage representations generally used in implementing

structured data types. Describe briefly.

5. Discuss briefly the memory management problems when implementing structured data types.

6. What is an abstract data type? How does it differ from a structured data type?

Tutorial Sheet No-4

1. What is sequence control? 2. Which are the levels of sequence control? Name and define them. 3. What is the basic mechanism of sequence control in expressions?

Describe it and give examples.

4. What is the role of precedence and associativity in sequencing with expressions? 5. Name three linear representations of expression trees. 6. Name three execution-time representations of expressions. 7. List and define the statement-level control structures. 8. List four principles of structured programming design. 9. List three types of structured control statements. 10. Describe the concept prime program.

Tutorial Sheet No-5

1. What are the assumptions in simple subprogram call-return? 2. Describe the simple subprogram call-return. Outline the method.

Describe what happens on call and what happens on return.

3. Discuss the implementation of recursive subprograms. 4. Describe two methods to make a data object available as an operand of an operation. 5. Define the terms "association" and "referencing environment" 6. What is local referencing environment? 7. What is non-local referencing environment?

List and define types of non-local referencing environments.

8. What is the purpose of dynamic scope rules? 9. What is the purpose of static scope rules? 10. How are static scope rules implemented in local referencing environments? 11. Describe two approaches for dynamic scope rules in local referencing environments and

their implementation.

Tutorial Sheet No-6

1. Describe each method of parameter transmission (see A.2). 2. What is the difference between pass by name and pass by reference methods of parameter

transmission?

3. What is the difference between pass by value and pass by reference methods of parameter transmission?

4. What is the difference between pass by value-result and pass by result methods of parameter transmission?

5. Consider the following code in some imaginary language :

/* main program */

....

integer i = 1,j = 2;

subprog(i,j);

print(i,j);

.....

subprog(integer k, integer m);

begin

k = k + 1;

m = m + i;

print (i,j,k,m);

end;

What values would be printed in the three modes of parameter transmission? Fill in the

table below:

print(i,j,k,m) in subprog Print(i,j) in main

program

i J k M i j

Pass by

reference

Pass by

value

Pass by

value -result

Tutorial Sheet No-7

1. List and briefly explain the key criteria in syntax design 2. Briefly describe lexical analysis, syntactic analysis and semantic analysis.

List the basic semantic tasks.

3. List three steps in synthesis of the object program and briefly characterize them. 4. What is bootstrapping? 5. What type of expressions are identifiers and arithmetic expressions in programming

languages?

6. What type of grammars are used to describe the syntax of identifiers and arithmetic expressions?

7. What type of grammars are used to describe the syntax of programming language statements?

Tutorial Sheet No-8

1. What is a scalar data type? Give examples 2. Describe briefly the implementation of floating-point real numbers. 3. Describe briefly the implementation of booleans.

4. What is a composite data type? Give examples. 5. Describe briefly the approaches to specification and implementation of character strings. 6. What implementation problems exist with data objects referred to by pointers?



Course Name: PROGRAMMING LANGUAGES


Class /Sem: B.Tech (CSE)/4th

Sem

Assignment: I

1. How can knowledge of programming language characteristics benefits the whole

computing Community? .

2. The two mathematical models of language description are generation and recognition.

Describe how each can define the syntax of a programming language?

3. Develop an unambiguous grammar that describes the if statement.

4. Explain all of the difference between subtypes and derived types.

5. Define union, free union and discriminated union?

6. How does operand evaluation order interact with functional side effect ?

Assignment-II

1. How does operand evaluation order interact with function side effects?

2. Define Shallow and Deep binding for referencing environment of subprograms that Have

been passed as parameters.

3. Write about Co routines.

4. In what different places can the definition of a C++ member function appears?

5. What is a C++ namespace and what is its purpose?

6. Explain the following with examples

a) Exception Handler

b) Disabling an exception

c) Continuation

d) Built-in Exception.

Assignment--III

1. What are some features of specific programming languages you know whose rationales

are a mystery to you?

2. Write a BNF description of the Boolean expressions of Java, including the three operators

&&, || and ! and the relational expressions?

3. What are the design issues for character string types?

4. What array initialization feature is available in Ada that is not available in other common

imperative languages?

5. Write text program in c++, java and c# to determine the scope of a variable declared in a

for statement. Specifically the code must determine whether such variable is visible after

the body of the for statement.

6. What are the different models of parameter passing methods? How are they

implemented? Give example for each.

7. What causes a C++ template function to be instantiated?

Assignment-IV

1. What are all of the differences between the enumeration types of C++ and those of java?

How does a decimal value waste memory space?

2. Determine whether the narrowing explicit type conversions in two languages you know

provide errors messages when a converted value loses its usefulness?

3. What are the modes, the conceptual models of transfer, the advantages and disadvantages

of pass by value, pass by result, pass by value - result and pass by -

reference parameter- passing methods?

4. What are the language design issues for abstract data types?

5. What are the disadvantages of designing an abstract data type to be a pointer? [7+8]

6. What are different method for describing syntax of a languages

7. Define functional form and referential transparency? What data types were parts of the

original LISP?

8. Difference between C and C++

IT-252 E Object Oriented Programming Using C++

L T P Sessional: 50 Marks

3 1 - Exam: 100 Marks

Total: 150 Marks

Duration of Exam: 3

Hrs. Unit1: Introduction to C++, C++ Standard Library, Basics of a Typical C++ Environment, Pre-processors Directives, Illustrative Simple C++ Programs. Header Files and Namespaces, library

files. Concept of objects, basic of object modeling, object classes, associations, behaviors,

description, Object Oriented Analysis & Object Modeling techniques, Object Oriented Concepts : Introduction to Objects and Object Oriented Programming,

Encapsulation (Information Hiding), Access Modifiers: Controlling access to a class, method, or

variable (public, protected, private, package), Other Modifiers, Polymorphism: Overloading,,

Inheritance, Overriding Methods, Abstract Classes, Reusability, Classs Behaviors. Classes and Data Abstraction: Introduction, Structure Definitions, Accessing Members of

Structures, Class Scope and Accessing Class Members, Separating Interface from

Implementation, Controlling Access Function And Utility Functions, Initializing Class Objects:

Constructors, Using Default Arguments With Constructors, Using Destructors, Classes :

Const(Constant) Object And Const Member Functions, Object as Member of Classes, Friend

Function and Friend Classes, Using This Pointer, Dynamic Memory Allocation with New and

Delete, Static Class Members, Container Classes And Integrators, Proxy Classes, Function

overloading.

Unit-2: Operator Overloading: Introduction, Fundamentals of Operator Overloading,

Restrictions On Operators Overloading, Operator Functions as Class Members vs. as Friend

Functions, Overloading, Overloading Unary Operators, Overloading Binary Operators. Inheritance: Introduction, Inheritance: Base Classes And Derived Classes, Protected Members,

Casting Base- Class Pointers to Derived- Class Pointers, Using Member Functions, Overriding

Base Class Members in a Derived Class, Public, Protected and Private Inheritance, Using Constructors and Destructors in derived Classes, Implicit Derived Class Object To Base- Class Object Conversion, Composition Vs. Inheritance. Unit3: Virtual Functions and Polymorphism: Introduction to Virtual Functions, Abstract Base Classes And Concrete Classes, Polymorphism, New Classes And Dynamic Binding, Virtual

Destructors, Polymorphism, Dynamic Binding. Files and I/O Streams: Files and Streams, Creating a Sequential Access File, Reading Data

From A Sequential Access File, Updating Sequential Access Files, Random Access Files,

Creating A Random Access File, Writing Data Randomly To a Random Access File, Reading

Data Sequentially from a Random Access File. Stream Input/Output Classes and Objects, Stream

Output, Stream Input, Unformatted I/O (with read and write), Stream Manipulators, Stream

Format States, Stream Error States. Unit- 4: Templates & Exception Handling: Function Templates, Overloading Template

Functions, Class Template, Class Templates and Non-Type Parameters, Templates and

Inheritance, Templates and Friends, Templates and Static Members. Introduction, Basics of C++ Exception Handling: Try Throw, Catch, Throwing an Exception,

Catching an Exception, Re-throwing an Exception, Exception specifications, Processing

Unexpected Exceptions, Stack Unwinding, Constructors, Destructors and Exception Handling,

Exceptions and Inheritance.

Text Books:

C++ How to Program by H M Deitel and P J Deitel, 1998, Prentice Hall

Object Oriented Programming in Turbo C++ by Robert Lafore ,1994, The WAITE

Group

Press.

Programming with C++ By D Ravichandran, 2003, T.M.H



Course Name: Object oriented programming using C++

Course Code: IT-252E

Class /Sem: B.Tech (CSE)/4th

Sem

Lesson Plan

1. Introduction to C++, C++ Standard Library, Basics of a Typical C++ Environment 2. Preprocessors Directives, Illustrative Simple C++ Programs. 3. Header Files and Namespaces, library files. 4. Concept of objects, basic of object modeling 5. Object classes, associations, behaviors, description 6. Object Oriented Analysis & Object Modeling techniques 7. Introduction to Objects and Object Oriented Programming 8. Encapsulation (Information Hiding), Access Modifiers, Controlling access to a

class, methods 9. Variable (public, protected, private, package), other Modifiers 10. Polymorphism: Overloading 11. Inheritance, Overriding Methods 12. Abstract Classes, Reusability, Classs Behaviors. 13. Introduction, Structure Definitions, Accessing Members of Structures 14. Class Scope and Accessing Class Members 15. Separating Interface from Implementation 16. Controlling Access Function And Utility Functions 17. Initializing Class Objects: Constructors 18. Using Default Arguments With Constructors, Using Destructors 19. Classes : Const(Constant) Object And Const Member Functions 20. Object as Member of Classes, Friend Function and Friend Classes 21. Using This Pointer, Dynamic Memory Allocation with New and Delete, Static

Class Members 22. Container Classes And Integrators, Proxy Classes, Function overloading. 23. Introduction, Fundamentals of Operator Overloading, Restrictions On Operators

Overloading

24. Operator Functions as Class Members vs. as Friend Functions 25. Overloading, Overloading Unary Operators, Overloading Binary Operators. 26. Introduction, Inheritance: Base Classes And Derived Classes, Protected Members 27. Casting Base- Class Pointers to Derived- Class Pointers, Using Member Functions 28. Overriding Base Class Members in a Derived Class, Public, Protected and Private

Inheritance, 29. Using Constructors and Destructors in derived Classes, Implicit Derived Class

Object To Base- Class

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