Consideration of CSI drive for SRM compared with

VSI drive Takanori Nagai, Gaku Ando and KanAkatsu

Shibaura institute of technology

3-7-5 Toyosu, Koto-ku, Tokyo, Japan

akatsu@sic.shibaura-it.ac.jp

Abstract—This paper presents a consideration of the Current

Source Inverter (CSI) drive for Switched Reluctance Motor

(SRM) compared with the Voltage Source Inverter (VSI) drive.

General SRM drive method is the current hysteresis control by

using the VSI. However, a disadvantage of this drive is the

current falling time is slow at the switching off period. On the

other hand, the CSI drive for SRM has some advantages, fast

di/dt is realized, constant current during on-state is realized and

so on. However, the CSI drive has a fatal disadvantage which is

large di/dt in the phase shift period resulting huge voltage spike

by the back EMF. Then, in order to protect the switching devices

from the voltage spike, the voltage clamp type current source

inverter for the SRM drive has been proposed. The proposed

drive method can suppress the voltage spikes. In this paper, the

brief characteristics of the proposed CSI circuit are shown by

some simulations. Moreover, in order to verify the proposed

circuit phenomenon, a small size circuit is made and some

experiments are performed by driving a small SRM.

Keywords: Switched Reluctance Motor; Current Source

Inverter; Voltage Clamp circuit

I. INTRODUCTION

Nowadays about 57% of electrical consumption is consumed by the electrical motor in Japan. Moreover, the electrical consumption is almost consumed by low efficiency Induction machines (IMs). On the other hand, although the Permanent Magnet Synchronous Machines (PMSMs) are high efficiency, the cost of PMSMs is expensive because the price of permanent magnet which is made of the rare metals; neodymium (Nd), dysprosium (Dy) and etc, becomes drastically expensive in recent years. Meanwhile silicon power semiconductor devices have been dramatically developed. These devices have high voltage pressure capacity and high current density. Therefore, not only motor structure but also inverter technique can improve the efficiency of motor drive system and reduce the electrical consumption. This study focuses on Switched Reluctance Motor (SRM) on behalf of low efficiency IMs since SRM has some advantages that easy construction, solid structure and low cost without permanent magnet. Adding that, it has also advantages of possible high speed rotation, ensuring high temperature condition because heat demagnetization is not caused due to magnet-less construction. However, SRM has some disadvantages that torque ripple, vibration and noises.

Considering the drive method of SRM, the current hysteresis control by using voltage source inverter (VSI) is generally used. There are a lot of proposed techniques to

reduce the torque ripple. For example, the exciting current for SRM was controlled as optimized wave form without making a structural change of SRM [1][2]. If the SRM has a large number of rotor and stator salient poles and salient pole width is wide, it is known that the torque ripple can be reduced with exciting two phase simultaneously [3]-[8]. However, these control methods cannot turn on and turn off quickly, because the EMF and the time constant negatively affect to the current rising or falling. The delay of current rising and falling time causes torque ripple and cupper loss. Then we focus on fast di/dt characteristic of Current Source Inverter (CSI).

CSI can get a specific benefit when SRM is driven by CSI. Adapting CSI to the SRM drive has some advantages that it is possible to reduce the number of switching, the square current wave form can increase the effective current (RMS) and it is also possible to instantaneously shift the current conductive phase without the excessive current. However, the square current wave form generates huge induced voltage at the switching device because SRM has a large inductance. For example, when the load is induction motor (IM), with the terminal capacitors and PWM techniques, the surge voltage is absorbed by the terminal capacitors [10]. The terminal capacitors need three when the load is three phase. However, the volume of the all system becomes huge in case the number of phase is increased. So, a technique of circuit protection which using commutation capacitor and commutation circuit is proposed [11][12]. In addition, Quasi-current source inverter which uses a DC/DC converter to generate current source and a bypass diode to protect against surge voltage between the rectifier circuit and the inverter is also proposed [13]. However, the targets of these circuits are induction motor and permanent magnet motor, the circuits have not applied to SRM drive.

To use CSI to SRM, we proposed a CSI which combines a voltage clamp circuit [9]. This proposed circuit is consisted of diode bridge circuit and clamp capacitor circuit to absorb the surge voltage. This paper presents an improved this CSI circuit to apply the SRM driving. This CSI can flow the square current wave form without the voltage spike and it is easy to expand the multiphase SRM driving. In this paper, the brief characteristics of the proposed CSI circuit are shown by the circuit simulation and some SRM drive experimental results are also shown.

1087

2012 IEEE 7th International Power Electronics and Motion Control Conference - ECCE Asia June 2-5, 2012, Harbin, China

978-1-4577-2088-8/11/$26.00 ©2012 IEEE

II. DRIVING METHOD OF SRM

A. Construction of SRM

A cross-section diagram of SRM which has 4 poles and 6

slots is shown in Fig. 1. Transition diagram of inductance

with respect to each rotor position is shown in Fig. 2. From

Fig. 2, the inductance value is linearly varied with respect to

each rotor position. However actually, this value is varied

non-linearly. For this reason, it is difficult to control the current with conventional linear feedback control.

B. Voltage source inverter (VSI)

Conventional SRM drive method is the current hysteresis control by using the voltage source inverter. The circuit diagram, control block diagram and load current waveform of this drive method are shown in Figs. 3, 4 and 5 respectively.

As shown in Fig. 3, although the circuit structure is easy, it is difficult to drive multi-phase SRM because the current control circuit is required in each phase which makes the system large. The current rising and falling time (see Fig. 5) are slow, it leads to the excess cupper loss. Adding that, the current ripple in the period of the constant current is generated, it leads to the inverter switching loss and the iron loss.

C. Current source inverter (CSI)

Compared with the VSI as shown above, the CSI is not popular because it requires adding diode to

prevent the reverse current flow. However, the use of

CSI has some advantages,

Constant current can be added without current control.

High di/dt in the phase shift period enables to reduce the cupper loss and also enable to drive at high speed.

Switching loss can be reduced.

A basic circuit diagram of CSI, a control block diagram and load current waveform of this drive system are shown in

Fig. 3 SRM drive with VSI circuit diagram

Fig. 4 SRM drive with VSI control block diagram

Fig. 5 Load current waveform of the VSI

Fig. 6 Load current waveform of the VSI

Fig. 1 Cross-section diagram of SRM

Fig. 2 Variation of SRM inductance value

1088

Figs. 6, 7 and 8 respectively. Since it is difficult to make a constant current source, the chopper circuit with the current control is used (see Fig. 7).

Comparing the current waveforms in Fig. 5 and in Fig. 8, it is observed that the current rising and falling time of the CSI are shorter than that of the VSI. However, there are two fatal disadvantages that SRM has large inductance and di/dt is also large in the phase shift period. The EMF is generated by the fast di/dt and the large inductances, this voltage may

destroy switching devices. In order to protect them from that voltage, a voltage clamp type current source inverter for SRM drive is proposed, the detail is described in the next chapter.

III. PROPOSED CURRENT SOURCE INVERTER

A proposed current source inverter circuit and a control block diagram are shown in Fig. 9 and 10 respectively.

A. Structure of the proposed CSI circuit

The proposed circuit consists of three parts as follows.

1) Current source generation circuit (CSG): CSG part

uses DC-DC chopper with the current control to make the

constant DC current source.

2) Voltage clamp circuit (VCC): VCC part controls the

clamp capacitor voltage by using the single phase CSI in

order to reduce the spike voltage. By using this CSI circuit,

it is possible to reduce the voltage spike from the load side

inverter (LIC) even when the load current in LIC is

suddenly changed in the phase sift period. In order to

control the capacitor voltage, switch S and R are controlled

by the simple digital logic as shown in Fig. 11. Switch S and

R statements are decided by the capacitor voltage (VC) and

the bus current of LIC (IDC). The logic of switch S and R is

shown in Fig. 11.

Fig. 9 Clamp type current source inverter circuit (3-phase drive )

Fig. 10 Clamp type current source inverter control block diagram

Fig. 6 SRM drive with CSI circuit diagram

Fig. 7 SRM drive with CSI control block diagram

Fig. 8 Load current waveform of the CSI

1089

3) Load inverter circuit (LIC): LIC part is a SRM drive

circuit. Asymmetrical H bridge inverters which are

generally used for the SRM drive are used. The switches are

driven by the open control which depends on the motor

position, the current control is not required in LIC part.

Then, it is possible to reduce the swiching loss compared

with the current hysteresis control by using the VSI in LIC.

B. Circuit statement of the proposed CSI circuit

There are two switching mode in this proposed inverter. The first of the mode is a static state mode. In this mode, the SRM is conducted the static state current as shown in Fig. 12. The other is the transient state which means the load current shifts from the U-phase to the W-phase, for example, as shown in Figs. 13, 14 and 15.

In the steady state, the current of LIC is equal to the bus current of CSG which is controlled by the chopper circuit. The orange line shows the current flow when the switch Ss is turned on. The blue line shows it when the Ss is turned off.

The transient state is divided into two modes. One is the regeneration mode as shown in Fig. 13. The other is the release mode as shown in Fig. 14. The regeneration mode means the regeneration current from U-phase (the blue dash line) goes to the clamp capacitor in VCC (the orange dash line) until regeneration current decreases zero. In this mode, the capacitor voltage is charged and it excesses command voltage. Next, the release mode begins, the switch R keeps

turning on in order to reduce the capacitor voltage (the orange dash line) until the voltage is behind the command voltage. After that, the switch S turns on in order to flow the bus current to W-phase (Fig. 15). At this time, the transient state is end and the steady state in W-phase starts. A time chart of the steady state and the transient state is shown in Fig. 16. Fig. 16 shows a time chart of U-phase and W-phase in LIC, the switch S and R statements in VCC, the load current waveform of U-phase and W-phase, the load bus current waveform (IDC), the capacitor current waveform in VCC (IC) and the capacitor voltage waveform in VCC (VC) respectively.

Fig. 13 Current flow in the transient state (regeneration mode)

Fig. 14 Current flow in the transient state (release mode)

Fig. 15 Current flow in the steady state (w-phase)

Fig. 12 Current flow in the steady state (u-phase)

VC

S

R

-

+

-

+

0

Vcref

Idc

VC

S

R

S

R

-

+

-

+

-

+

-

+

0

Vcref

Idc

Fig. 11 Switch R and S logic

1090

IV. SIMULATION RESULTS

The proposed circuit is checked of operation as a CSI and

voltage clamp circuit with MATLAB/Simulink simulation.

In addition, proposed CSI is compared with VSI which uses

the hysteresis control with simulation. The simulation

condition is shown in Table I. In this simulation, the SRM is

1kW, 8 poles and 12 slots. In addition, the SRM model is

made from JMAG-RT model, so this SRM simulation

model is non-linear model. Figs. 18 and 19 show the simulation results of the current

waveforms by the current hysteresis control by using the

VSI and the proposed CSI, respectively.

From Figs. 18 and 19, although unexpected current peak

is obtained in CSI drive because of the inductance variation

with the position of the SRM, the current falling time by the

proposed CSI drive is shorter than that of VSI drive, the

cupper loss is expected to be reduced. However, although

ideal the current falling time is zero second, because CSI is

used, actually, the current falling time is not zero second,

about 400 μsec from Fig. 18. The reason of this time is that,

the free-wheeling current is continued in free-wheeling diodes of asymmetry H bridge inverter. This free-wheeling

mode is shown in Fig. 22. When the switch of asymmetry H

bridge inverter turned off, the current goes to a closed

circuit as shown in Fig. 22. Because of this closed circuit,

current falling time becomes slow. In this mode, the

simulation condition of a firing angle is between 0 degree

and 55 degree of electrical angle. However when the firing

angle is between 0 degree and 60 degree, this means each

phase current is overlapped, the current falling time becomes much slow as shown in Fig. 19. This is also

because of the free-wheeling mode between two phases.

Even when the much slow falling time as shown in Fig. 19,

actually the falling time is under 1 msec, the time is faster

than it by the VSI.

Capacitor voltage and its reference value are shown in Fig.

20. The reference value is 100V and the capacitor voltage is

controlled as 100V. However, the capacitor voltage exceeds

the reference value, it becomes instantly around 120V.

The voltage at drain-to-source of MOSFET in asymmetry

H bridge inverter is shown in Fig. 21. The maximum

voltage of MOSFET is the same with the clamp voltage. So, clamp action is successfully achieved. However, although

the current falling is faster than VSI, the ideal fast current

falling time is not achieved. A countermeasure is under

consideration.

Fig. 17 Load current wave form (VSI)

Fig. 18 Load current wave form (Proposed CSI)(0°~55°)

Table I Simulation conditions

Parameter Proposed CSI VSI Unit

DC Voltage Source 100 V

Command Current 10 A

Rotation speed 500 rpm

Command Voltage 100 V

Capacitor 100 F

Fig.16 Time chart of the steady state and the transient state

1091

V. EXPERIMENTAL RESULTS

In order to verify the proposed circuit phenomenon, some experiments by using 450W 4 poles - 6 slots 4phases SRM

are performed.

A. Results of 4 poles – 6 slots 4 phase SRM drive

Fig. 23 shows the experimental setup of SRM drive

circuit. Fig. 24 shows an experimental circuit diagram of 4

phases SRM by using the proposed CSI. The specification of SRM and the experimental conditions are shown in Table

II.

Some experiment results are shown in Figs. 25- 29. Fig.

25 shows the electrical angle and Fig. 26 shows the rotation

speed. Fig. 27 shows the load current waveforms. Fig. 28

shows the expanded load current wave form. Fig. 29 shows

DC bus current. Fig. 30 shows the switch voltages of the

load inverter circuit. Finally, Fig. 31 shows capacitor

voltage.

From Fig. 27, almost square current wave form is

possible to add to the load. However, the current ripple was

caused at the transient state because SRM changes the inductance. However, the fast current rising and falling

times are realized. Enlarged output current wave form is

shown in Fig. 28. This wave form shows only A phase. Only

A phase is shown in this figure. From Fig. 28, this similar

waveform with the simulation result as shown in Fig. 18 is

obtained. This means that one phase current through another

phase resulting slow current falling time. A current wave

form of current source is shown in Fig. 29. With an ideal

current source, the output current wave form of SRM is

clearly flat wave form. From Fig. 30, it is observed that the

switches voltage of the load inverter circuit is controlled as

the command voltage, this means the voltage spike is reduced. However, the voltage ripples are found in the

transient state. This is because of small parasitic inductance

and/or capacitance and reverse recovery current of diodes.

Capacitor voltage is shown in Fig. 31. The capacitor voltage

is controlled as the reference value which is 30V.

Table II Experimental conditions of SRM drive

Parameter Proposed CSI Unit

Command Current 5 A

DC bus inductance 28 mH

Capacitor 100 F

Command Voltage 40 V

Rotation speed 750 rpm

Maximum Inductance 1630 F

Minimum Inductance 330 F

Resistance 126 m

Poles - Slots 6 - 8 -

Rated voltage 24 VDC

Rated output 450 W

Fig19 Load current wave form (Proposed CSI)(0°~60°)

Fig. 20 capacitor voltage and its reference value

Fig. 21 drain-source voltage (asymmetrical H bridge inverter)

Fig. 22 free-wheel current flow

1092

Fig. 26 Rotation Speed

Fig. 27 Load current wave forms

Fig. 28 Load current wave form (expended)

Fig. 29 DC bus current

AB

CA

B

C

A. SRM

B. Load Inverter circuit

C. Voltage clamp circuit

Fig. 23 Current flow in the steady state (u-phase)

Fig.24 Experimental circuit of 4phase SRM by using the proposed

CSI

Fig. 25 Electrical Angle

1093

VI. CONCLUTION

This paper proposed the SRM driving method with the current source inverter, the induced voltage with fast di/dt

was suppressed by the proposed clamp type current source

inverter. From the study it was confirmed that the proposed

circuit could suppress the voltage by both simulation and

experimental results of SRM driving. However, although

the falling time was faster than it of the voltage source

inverter, the ideal fast di/dt was not realized and there was

an overshoot of the current because the variable inductance

induced the voltage resulting free-wheeling mode. The

countermeasure is still under consideration. However the

fast di/dt will be realized in the nearly future.

VII. REFERENCE

[1] Hiroki Ishikawa, Yoshinobu Kamada, Haruo Naitoh, “Instantaneous

Current Profile Control for Flat Torque Switched Reluctance Motors,” IEEJ Trans. on IA, vol. 125 (2005), No. 12, pp. 1113-1121,

in Japanese.

[2] Khwaja M.Rahman, Suresh Gopalakrishnan, Babak Fahimi, Anandan Velayutham, M.Ehsani “Optimized Torque Control of Switched

Reluctance Motor at All Operational Regimes Using Neural Network,” IEEE Trans. on Industry Applications, vol. 37, No. 3, pp.

904-913. 2001.

[3] Nicholas J. Nagel, Robert D. Lorenz “Rotatig Vector Methods for Smooth Torque Control of Switched Reluctance Motor Drive” IEEE

Trans on Industry Applications, Vol . 36, No. 2, pp. 540-548, 2000.

[4] Iqbal Husian, M.Ehsani “Torque Ripple Minimization in Switched

Reluctance Motor Drives by PWM Current Control,” IEEE Trans on Power Electronics, Vol. 11, No. 1, pp. 83-88, 1996.

[5] Mohammad S. Islam, Iqbal Husain “Torque ripple minimization with indirect position and speed sensing for switched reluctance motors”

IEEE conference IECON, Vol. 3, pp. 1127-1132, 1999

[6] Philip C. Kjaer, Jermy J. Gribble, Timothy J.E. Miller “High-Grade Control of Switched Reluctance Machines” IEEE Trans. on Industry

Applications, Vol. 33, No. 6, pp. 1585-1593, 1997

[7] Hiroki Ishikawa, Daohong Wang, Haruo Naitoh ”A New Swiched Reluctance Motor Drive Circuit for Torque Ripple Reduction”

Conference on PCC Osaka, Vol. 2, pp. 683-688, 2002

[8] Sayeed Mir, Malik Elbuluk, Iqbal Husain “Torque Ripple Minimization in Switched Reluctance Motors Using Adaptive Fuzzy

Control”, IEEE Trans. on Industrial Applications, Vol. 35, No. 2, pp. 461-468, 1999

[9] Gaku Ando, Kan Akatsu “A new SRM drive method by using current

source inverter” International conference on Power Electronics and ECCE Asia, pp. 116-123, 2011.

[10] Mitsuyuki Hombu, Shigeta Ueda, Akiteru Ueda, Yasuo Matsuda “A

new Current Source GTO Inverter with Sinsoidal Output Votage and current”, IEEE Trans. on Industry Applications, Vol. IA-21, No. 5, pp.

1192-1198, 1985

[11] Yong-Ho Chung, Gyu-Hyeong Cho “New Current Source Inverters

with dc-Side Commutation and Load-Side Energy Recovery Circuit” IEEE Trans. on Industry Applications, Vol. 27, No. 1, pp. 52-62,

1991

[12] Gyo H. Cho, Song B. Park “Novel Six-Step and Twelve-Step Current-Source Inverters with DC Side Commutation and Energy

Rebound”, IEEE Trans. on Industry Applications, Vol. IA-17, No. 5, pp. 524-532, 1981

[13] Isao Takahashi, Takehisa Koganezawa, Guijia Su, Kazunobu Ohyama

“A Super High Speed PM Motor Drive.”IEEE, Trans. on Industry Applications, Vol. 30, No. 3, pp. 683-690, 1994

Fig. 30 Switch voltage

Fig. 31 Clamp capacitor voltage

1094