400G CWDM8 Data Center Opt ics

Scott Schube, Intel CorporationCWDM8 MSA Project Chair

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400G CWDM8 MSA• Multiple optics, component, and system companies have formed an MSA

group to define 2 km and 10 km reach 400G optical interface specifications

• Common MSA specs ensure interoperability between multiple vendors

• Goal is to help accelerate development and adoption of 400G duplex-fiber optics to enable deployment of the next generation of 12.8T OCP switches and routers

400G CWDM8 Optical PMD Block Diagram

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Tx1Tx2Tx3Tx4Tx5Tx6Tx7Tx8

Rx8Rx7Rx6Rx5Rx4Rx3Rx2Rx1

8x50G PAM4to

8x50G NRZCDR

Optical transmitter 1

Optical transmitter 8

8:1

MU

X

l1…8

Optical receiver 8

Optical receiver 1

1:8

DE

MU

X

l1…8

Switch ASIC400GAUI-8

Interface

400G duplex singlemode

optical interface

FOUNDING MEMBERS

QSFP-DD/OSFP/OBO module

400G CWDM8 Optical PMD Block Diagram

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Tx1Tx2Tx3Tx4Tx5Tx6Tx7Tx8

Rx8Rx7Rx6Rx5Rx4Rx3Rx2Rx1

8x50G PAM4to

8x50G NRZCDR

Optical transmitter 1

Optical transmitter 8

8:1

MU

X

l1…8

Optical receiver 8

Optical receiver 1

1:8

DE

MU

X

l1…8

Switch ASIC400GAUI-8

Interface

400G duplex singlemode

optical interface

FOUNDING MEMBERS

QSFP-DD/OSFP/OBO module

Electrical interface defined by IEEE

Optical interface defined by CWDM8 MSA Group

Module form factor and management interface defined

by module MSA

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400G CWDM8 Benefits• IEEE compliant 8 x 50G PAM4 electrical interface for compatibility

with 12.8T switches and routers

• 8λ x 50G NRZ CWDM optical interface for fully uncooled operation and best link performance on duplex singlemode fiber

• Proven technology, already demonstrated

• High link margin = high yield, low cost, maximum scalability, fastest time to volume

• Will comfortably fit in QSFP-DD and OSFP power envelope

• Transmission demonstrated at both 2 km and 10 km

• Industry’s only datacenter–targeted 10 km optical interface

• Technical approach lays groundwork for future 800G interfaces

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Frequency, GHz

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PAM4 vs. NRZ• PAM4 is well-suited to channels with

low bandwidth and high SNR• E.g. electrical DAC & backplane links

• CDAUI-8: 20dB loss at 28G

• Significant SNR penalty from multi-level signaling (4.8 dBo or higher)

• NRZ is well-suited to channels with higher bandwidth and lower SNR• Example optical channel: 3dBo loss at >

30G

Optical and electrical channel losses

20 dB

NRZ PAM4

1

1/3

6 dB

CDAUI-8 electrical interface >

(chip to module)

< Optical channel

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400G Duplex Optical Interface Comparison:Optical Penalties and Losses

Link Penalty8x50G PAM4 WDM (FR8)

8x50G NRZ CWDM (CWDM8)

4x100G PAM4CWDM (FR4)

Higher BW modulator 1.5 dB 1.5 dB

Mux loss 2 dB 2 dB 2 dB

TDP/TDECQ 3.1 dB 2.8 dB 3.4 dB

PAM4 modulation 4.8 dB 4.8 dB

Channel loss (+MPI) 4.4 dB 4 dB 4.4 dB

Demux loss 3 dB 3 dB 3 dB

Rx noise BW penalty 1.5 dB 1.5 dB

PAM4 implementation1 1.5 dB 1.5 dB

Total penalties 18.8 dB 14.8 dB 22.1 dB

50G NRZ (CWDM8) Tx eye(test bed optics)

100G PAM4 (FR4) Tx eye(test bed optics)

1Estimated additional penalties for PAM4 (linearity/compression penalty, decreased timing margin, increased sensitivity to crosstalk/noise/ISI)

– cf. Xilinx DesignCon 2017 paper (>11dBe penalty for 50G [25Gbd] PAM4 not including jitter and other sensitivity to impairments)

Also see Finisar 2014-15 link budget analysis presentations in IEEE

Good link margin / lower link penalties = high yield, low cost, maximum scalability, fastest time to volume

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400G Duplex Optical Interface Comparison:Optical Penalties and Losses

Link Penalty8x50G PAM4 WDM (FR8)

8x50G NRZ CWDM (CWDM8)

4x100G PAM4CWDM (FR4)

Higher BW modulator 1.5 dB 1.5 dB

Mux loss 2 dB 2 dB 2 dB

TDP/TDECQ 3.1 dB 2.8 dB 3.4 dB

PAM4 modulation 4.8 dB 4.8 dB

Channel loss (+MPI) 4.4 dB 4 dB 4.4 dB

Demux loss 3 dB 3 dB 3 dB

Rx noise BW penalty 1.5 dB 1.5 dB

PAM4 implementation1 1.5 dB 1.5 dB

Total penalties 18.8 dB 14.8 dB 22.1 dB

50G NRZ (CWDM8) Tx eye(test bed optics)

100G PAM4 (FR4) Tx eye(test bed optics)

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Optical Interface Transitions

1G 10G 40G 100G400G duplex singlemode specs

CWDM8 FR4 FR8

Baud rate 1G 10G 10G 25G 50G 50G 25G

Link budget(Tx output – Rx sensitivity)

8 dB 7.4 dB 7.5 dB 6 dB 5 dB >11 dB* 9.6 dB

New modulation format?

No No No No No Yes Yes

Time to volume 3 yrs. 6 yrs. 4 yrs. 6 yrs. TBD TBD TBD

High-volume singlemode optics

• Past lane speed transitions have all maintained or relaxed the effective channel budget, and have still proven very challenging and time-consuming to deploy and ramp (latest example: 100G)

• CWDM8 keeps with this proven optical link introduction approach

• Alternate approaches nearly triple the effective optical channel budget while simultaneously introducing a new data rate and new modulation format

Tx/Rx numbers from IEEE or MSA interface specs

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Beyond 400G

• CWDM8 technology approach for 400G lays groundwork for future 2x400G or 800G interfaces for 25.6T switches• Allows time for maturity of 100G/lane PAM4 and optical component

improvements

4 → 8 lanes25G → 50G/lane

50G → 100G/lane(add PAM4)

100G4x25G

400G8x50G

800G8x100G

3.2T switches 12.8T switches 25.6T switches

Products and Technology from the CWDM8 Ecosystem

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Credo Raptor 400Z CDR Family for CWDM8 MSA

Raptor 400Z Family Members:• Egress device (Tx)

• 8x56Gbps PAM4 to 8x56Gbps NRZ

• Ingress device (Rx)• 8x56Gbps NRZ to 8x56Gbps PAM4

Standards Support:• IEEE 400G-AUI-8

• OIF CEI-56G-VSR-PAM4

• OIF CEI-56G-VSR/MR-NRZ

Availability:• Evaluation boards: Now

• Samples: Now

Production: 2H2018

Egress Ingress

56GBaud NRZ

AOI 1310 nm DML for CWDM8• Initial test data shows 53 Gbps NRZ DML

is capable of 10 km transmission at 1310 nm wavelength

• Expected DML technology can work with CWDM8 application at 500 m reach

53Gbps NRZ eye at 25C, Iop = 55mA, ER = 4.5dB

Intel 400G CWDM8 QSFP-DD Optical Module400G Transmitter: Optical Output 400G Receiver: Host Side Electrical Output

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Join Us• The CWDM8 400G 2 km and 10 km optical interface specifications

are available publicly at cwdm8-msa.org

• The CWDM8 MSA Group is taking on new member companies

• Interested in joining, or have any questions? Contact me at

scott.schube@intel.com