371-1

Here is the link the to the Note sheet I created and will be using. Feel free to look at it, use it, download it, edit it, etc. (MCH)https://docs.google.com/a/g.clemson.edu/file/d/0B_m_gE3Qpi3-Y1BadjFxRHh2VVE/edit?usp=sharing

b* If you have equations to any of the problems that do not have them listed, please add the formulas.

(Someone can delete this if it isnt helpful) There is a pdf on the ECE Support Group page of facebook that is pretty helpful. It is on the files tab, then Link to ECE Dropbox, then ECE 371, and finally Final Study Guide Copy. Ive only looked at the first 5 or so pages, but it has a bunch of questions answered and parts of his slides where the answers are and such.

I emailed Dr. Reid, and he said that you can put anything you want on your notesheet. Anything goes. Incase someone didnt know. (CL)

HW Test 1: Intro

1. An embedded system is an electronic system controlled by one or more computers/microprocessors that are internal to the system. That is, the system is not thought of as a computer, but something else.

2. An example of a system that needs to be a real-time system and what the functionality of it is in real time: Air traffic control system, the current location.Another Example(similar idea)A personal GPS system would have to be real-time to update the location of the person or object with the installed system.

3. A microcontroller is a computer on a chip

4. Who makes the processor discussed in this class? There are two answers: freescale or motorola.

5. A real-time system must insure that a task is completed within a certain time span.

6. Name five things discussed in class which must be considered when designing an embedded system:Real-Time Execution Physical Size and EnvironmentPower ConsumptionUser InterfaceMulti-rate OperationCostMemory NeedsHardware versus Software

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HW Test 1: HC12

1. The HC12 has two 8-bit accumulators, A and B, which can be ganged together.2. The HC12 has two 8-bit accumulators which can be ganged together.

3. The HC12 has at most 128kB of flash on board.

4. What is the size of the registers in (in bits) of the HC12 processor? i.e. "The HC12 is a ___-bit machine." Answer: 16

5. The HC12 has a maximum 8 -MHz bus clock.

6. The HC12 has a 16-bit stack pointer.

7. The program counter in the HC12 is 16 bits.

8. The HC9S12 was an improvement on the HC12 and has a maximum 25-MHz Clock.

9. The HC9S12 has at most 512-kB of flash on board.

10. The HC12 has two [a]-bit registers, X and Y. 16

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HW Test 1: HC12 Pinout

1. How many SPI ports does the 9S12 have? 3

2. If we wanted to connect a signal line to bit 7 of Port S on the 9S12, we would solder a line to pin number 96. (96 is PS7/SS0)

3. If we wanted to connect a wire to the VDDA line, we would solder a wire to pin number 83. (83 is VDDA)

4. If we wanted to connect a signal line to bit 4 of Port B on the 9S12, we would solder a line to pin number 28. (28 is ADDR4/DATA4/PB4)

5. If we wanted to connect a signal line to bit 1 of Port T on the 9S12, we would solder a line to pin number 10. (10 is IOC1/PT1)

6. If we wanted to connect a signal line to bit 0 of Port S on the 9S12, we would solder a line to pin number 89. (89 is PS0/RXD0)7. On the 9S12, the external address lines are tied to ports A, B, and K. (Alphabetical order).

8. If we wanted to connect a wire to the A to D line 12, we would solder a wire to pin number 76. (76 is PAD12/AN12)

9. If we wanted to connect a signal line to bit 5 of Port M on the 9S12, we would solder a line to pin number 100. (100 is PM5/TXCAN2/TXCAN0/TXCAN4/SCK0)

10. If we wanted to connect a signal line to the Background Debugger pin on the 9S12, we would solder a line to pin number 23. (BKGD is background debugger) (23 is MODC/TAGHI/BKGD) (TAGHI has above it)

11. If we wanted to connect a wire to the A to D line 15, we would solder a wire to pin number 82. (82 is PAD15/AN15/ETRIG1)

12. On the 9S12, what port are the Enhanced Capture Timer channels tied to? Answer: Port T

13. If we wanted to connect a signal line to VSS1 on the 9S12, we would solder a line to pin number 14. (14 is VSS1)

14. If we wanted to connect a signal line to bit 1 of the external data bus on the 9S12, we would solder a line to pin number 25. (25 is ADDR1/DATA1/PB1)

15. If we wanted to connect a signal line to bit 4 of the external data bus on the 9S12, we would solder a line to pin number 28. (28 is ADDR4/DATA4/PB4) (See 4, different problem but same answer)

16. If we wanted to connect a wire to the XFC signal on the 9S12, we would solder a wire to pin number 44. (44 is XFC)

17. If we wanted to connect a signal line to bit 4 of Port P on the 9S12, we would solder a line to pin number 112. (112 is PP4/KWP4/PWM4/MISO2)

18. If we wanted to connect a signal line to bit 1 of Port B on the 9S12, we would solder a line to pin number 25. (25 is ADDR1/DATA1/PB1) (See 14, different problem but same answer)

19. If we wanted to connect a wire to the VDD2 line on the 9S12, we would solder a wire to pin number 65. (65 is VDD2)

20. If we wanted to connect a wire from A to D line 6, we would solder a wire to pin #79. (79 is PAD06/AN06)

21. On the 9S12, what port are the SCI channels tied to? S or port S

22. If we wanted to connect a signal line to bit 7 of Port J on the 9S12, we would solder a line to pin number 98. (98 is PJ7/KWJ7/TXCAN4/SCL)

23. On the 9S12 shown, there are [a] KB of internal EEPROM available. Answer: 4

24. If we wanted to connect a wire to the A to D line 14, we would solder a wire to pin number 80. (80 is PAD14/AN14)

25. On the 9S12, the CAN ports are tied to ports [a] and [b]. (List alphabetically)Answer: a: J, b: M

26. On the 9S12 shown, you could address at most [a] KB of external RAM (without using the expanded address bits of port K). Answer = 64

27. If we wanted to connect a signal line to the expanded address line 14 on the 9S12, we would solder a line to pin number [a]. Answer = 8

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HW Test 1: EnergyCalc-AmpsSince we are given the amps/hr we convert that to amps/day then to amps/month -B.D.Answer seems to round to 3 decimal places.

1. Consider an embedded system which uses a batter with a 25.4-mApm-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the batter to last 8 months without being replaced? Assume a month is 30 days.4.410 microAmps =(0.0254/(240*24))*10^6, so convert hours to days, and then days to months to get the amps per month, then divide by number of months.

2. Consider an embedded system which uses a battery with a 83-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 6 months without being replaced? (Assume a month is 30 days.) 19.213 microAmps

3. Consider an embedded system which uses a battery with a 29.4-Amp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 34 years without being replaced? 98.7 microAmps hours->days=1/24, days->years=1/365, /number of year

4. Consider an embedded system which uses a battery with a 37.6-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 19 years without being replaced? 0.226

5. Consider an embedded system which uses a battery with a 10.4-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 39 years without being replaced? 0.30 microAmps

6. Consider an embedded system which uses a battery with a 23.1-Amp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 39 years without being replaced? 67.6 microAmps

7. Consider an embedded system which uses a battery with a 40.3-Amp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 23 years without being replaced? 200 microAmps

8. Consider an embedded system which uses a battery with a 8.2-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 41 years without being replaced? 0.023 microAmps

9. Consider an embedded system which uses a battery with a 43.3-Amp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 12 years without being replaced? 412 microAmps

10. Consider an embedded system which uses a battery with a 54.2-Amp-Hour capacity. What is the maximum average current draw (in mA) that your embedded processor can have if you want the battery to last 4 months without being replaced? (Assume a month is 30 days.) 18.819 mA

11. Consider an embedded system which uses a battery with a 80.9-Amp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 36 years without being replaced? 256.53 uA

12. Consider an embedded system which uses a battery with a 95.8-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 44 years without being replaced? .2485 uA


14. Consider an embedded system which uses a battery with a 83-Amp-Hour capacity. What is the maximum average current draw (in mA) that your embedded processor can have if you want the battery to last 6 months without being replaced? (Assume a month is 30 days.) 19.213 mA



17. Consider an embedded system which uses a battery with a 47.7-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 5 years without being replaced? 1.089 uA

18. Consider an embedded system which uses a battery with a 36.2-Amp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 3 years without being replaced? 1377.47 uA

19. Consider an embedded system which uses a battery with a 21.6-Amp-Hour capacity. What is the maximum average current draw (in mA) that your embedded processor can have if you want the battery to last 34 months without being replaced? (Assume a month is 30 days.) .882 mA

20. Consider an embedded system which uses a battery with a 65.4-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 43 months without being replaced? (Assume a month is 30 days.) 2.112 uA

21. Consider an embedded system which uses a battery with a 52.4-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 6 months without being replaced? (Assume a month is 30 days.) 12.129uA


23. Consider an embedded system which uses a battery with a 5.9-Amp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 37 years without being replaced? 18+-1%24. Consider an embedded system which uses a battery with a 53.5-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 50 months without being replaced? (Assume a month is 30 days.) 1.486uA25. Consider an embedded system which uses a battery with a 50.3-mAmp-Hour capacity. What is the maximum average current draw (in micro Amps) that your embedded processor can have if you want the battery to last 31 months without being replaced? (Assume a month is 30 days.) 2.254uA

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HW Test 1: EnergyCalcSo the formula is this: ((%run time as a decimal)*(Current draw))+((%Wait as decimal)*(Wait current draw))+((%Pseudo stop(RTI & COP enabled) as a decimal)*(P.S. (R&C enabled) current draw))= Current per hour. Make sure to convert all units to Amps, it saves time later. From the current per hour it then depends on what we are trying to find. If given batteries, take the battery divided by the current per hour we found to solve for the time the batteries last, for finding the size of a battery from the current per hour find how much current would be generated over the time period ((current/hour)*(24hours/1day)*(365days/1year)*(#of years) -B.D.

Posted Sams version of the formula down below.

(% of run in decimal * current Max in Amperes)+(% of wait in decimal * current max in Amperes) + for stop or pseudo stop((1-(% of run in decimal + % of wait in decimal)*(TYP current of whatever that is left for instance like stop or pseudo stop) = Current. Then multiply by the time and it should be current-years. Do the necessary dimensional analysis for the required answer.

Remember to check the units on the side of the chart! Note that usually the Stop and Pseudo-Stop currents are in MicroAmps and Run and Wait are in MilliAmps.

Actual answer is accurate to nearest whole number with 1% tolerance, but answering in decimal form is probably safer if the actual answer would be less than 100.

1. Consider using an HC9S12 in single-chip mode in an embedded system.Using the table below, and assuming the processor is in "Run" mode 4% of the time and "Stop" mode the rest of the time, what size battery (in Amp-Hours) would you need to use the processor for 13 years without changing the battery in typical operation? (Assume 27 deg. C operation.) 299 Amp-hours

2. Consider using an HC9S12 in single-chip mode in an embedded system.Using the table below, and assuming the processor is in "Run" mode 1.8% of the time, "Wait" mode 2.8 % of the time, and "Pseudo Stop" mode (with the RTI and COP disabled) the rest of the time, what size battery (in Amp-Hours) would you need to use the processor for 6 years without changing the battery in typical operation? (Assume 27 deg. C operation.) 140 Amp-hours((0.018*65e-3)+(0.028*40e-3)+((1-(0.018+0.028))*(400e-6)))*6years *365 days*24 hours = 140.419296

3. Consider using an HC9S12 in single-chip mode in an embedded system. Using the table below, and assuming the processor is in "Run" mode 4% of the time, "Wait" mode 4% of the time, and "Pseudo Stop" mode (with the RTI and COP disabled) the rest of the time, how many years could your system run typically on 2 batteries of 95.8 Amp-Hours each. (Assume 140 deg. C operation.) 4.124 yrs

4. Consider using an HC9S12 in single-chip mode in an embedded system.Using the table below, and assuming the processor is in "Run" mode 2.6% of the time, "Wait" mode 2.7 % of the time, and "Pseudo Stop" mode (with the RTI and COP enabled) the rest of the time, how many years could your system run typically on 2 batteries of 53.7 Amp-Hours each. (Assume 105 deg. C operation.) 3.429

5. Consider using an HC9S12 in single-chip mode in an embedded system.Using the table below, and assuming the processor is in "Run" mode 3.9% of the time, "Wait" mode 4.6 % of the time, and "Stop" mode the rest of the time, what size battery (in Amp-Hours) would you need to use the processor for 9 years without changing the battery in typical operation? (Assume 140 deg. C operation.) 388

6. Consider using an HC9S12 in single-chip mode in an embedded system.Using the table below, and assuming the processor is in "Run" mode 1.3% of the time, "Wait" mode 2.9 % of the time, and "Stop" mode the rest of the time, what size battery (in Amp-Hours) would you need to use the processor for 20 years without changing the battery in typical operation? (Assume 140 deg. C operation.) 451.981

7. Consider using an HC9S12 in single-chip mode in an embedded system.Using the table below, and assuming the processor is in "Run" mode 4.9% of the time, "Wait" mode 4.1 % of the time, and "Pseudo Stop" mode (with the RTI and COP disabled) the rest of the time, what size battery (in Amp-Hours) would you need to use the processor for 4 years without changing the battery in typical operation? (Assume 105 deg. C operation.) 189.79

8. Consider using a HC9S12 in single-chip mode in an embedded system. Using the table below, and assuming the processor is in "Run" mode 3% of the time, "Wait" mode 1.8 % of the time, and "Pseudo Stop" mode (with the RTI and COP disabled) the rest of the time, how many years could your system run typically on 5 batteries of 9.9 Amp-Hours each. (Assume 105 deg. C operation.) 1.718 (Tip: calculate the average current draw per hour, then the average current draw per year. Then divide the total energy you have (5*9.9) by the average current draw per year.)

9. Consider using an HC9S12 in single-chip mode in an embedded system. Using the table below, and assuming the processor is in "Run" mode 3.9% of the time, "Wait" mode 2.6 % of the time, and "Pseudo Stop" mode (with the RTI and COP disabled) the rest of the time, what size battery (in Amp-Hours) would you need to use the processor for 5 years without changing the battery in typical operation? (Assume 105 deg. C operation.) 183 Amp-Hours

10. Using the table below, and assuming the processor is in "Run" mode 5% of the time, "Wait" mode 2.2 % of the time, and "Stop" mode the rest of the time, how many years could your system run in typical operation with 1 batteries of 30 Amp-Hours each. (Assume 105 deg. C operation.) .794 years

11. Using the table below, and assuming the processor is in "Run" mode 1.9% of the time, "Wait" mode 1.3 % of the time, and "Pseudo Stop" mode (with the RTI and COP enabled) the rest of the time, what size battery (in Amp-Hours) would you need to use the processor for 13 years without changing the battery in typical operation? (Assume 140 deg. C operation.) 365

12. Using the table below, and assuming the processor is in "Run" mode 1.7% of the time, "Wait" mode 1.7 % of the time, and "Stop" mode the rest of the time, what size battery (in Amp-Hours) would you need to use the processor for 15 years without changing the battery in typical operation? (Assume 27 deg. C operation.) 237.72______________________________________________________________________________

HW Test 2: Address Decoding

1. Consider a 20-bit address space which is to address the following chips in the given orderChip 0: 64 KB Chip 1: 32 KB Chip 2: 32 KB Chip 3: 32 KB Chip 4: 32 KBChip 5: 64 KB Chip 6: 128 KBAssume Chip 0 starts at address 0 and that chips are placed as close together as possible (i.e. you leave no empty addresses between chips if possible).Give the starting address of each chip below and the number of critical address lines each has.Chip 1: [64] K, critical lines = [4]Chip 2: [96] K, critical lines = [4]Chip 3: [128] K, critical lines = [3]Chip 4: [160] K, critical lines = [3]Chip 5: [192] K, critical lines = [2]

2. Consider a 20-bit address space which is to address the following chips in the given order

Chip 0: 64 KBChip 1: 32 KBChip 2: 32 KBChip 3: 128 KBChip 4: 256 KBChip 5: 64 KBAssume Chip 0 starts at address 0 and that chips are placed as close together as possible (i.e. you leave no empty addresses between chips if possible).Give the starting address of each chip below and the number of critical address lines each has.Chip 1: [64] K, critical lines = [3]Chip 2: [96] K, critical lines = [3]Chip 3: [128] K, critical lines = [1]Chip 4: [256] K, critical lines = [1]Chip 5: [512] K, critical lines = [1]


Chip 0: 256 KBChip 1: 128 KBChip 2: 128 KBChip 3: 256 KBChip 4: 128 KBChip 5: 8 KBChip 6: 8 KB

Assume Chip 0 starts at address 0 and that chips are placed as close together as possible (i.e. you leave no empty addresses between chips if possible).

a. The starting address of Chip 6 is then [904] K.

b. Give the the following Address Line values for Chip 5 and put an asterisk (*) by the bits which are critical.(Answers should be one of the following: 0, 1, 0*, 1*, or X with no space between bit and asterisk.)

A19 = [1*]A18 = [1*]A17 = [1*]A16 = [0]A15 = [0]A14 = [0]A13 = [0*]

c. There will be a total of [21] critical address lines for all chips.

4. Consider a 20-bit address space which is to address the following chips in the given orderChip 0: 256 KBChip 1: 256 KBChip 2: 64 KBChip 3: 16 KBChip 4: 16 KBChip 5: 8 KBAssume Chip 0 starts at address 0 and that chips are placed as close together as possible (i.e. you leave no empty addresses between chips if possible).The starting address of Chip 5 is 608

A19 = [1*]A18 = [0]A17 = [0]A16 = [1*]A15 = [1*]A14 = [0]A13 = [0]There are a total of 14 critical address lines for all chips.


Chip 0: 128 KBChip 1: 128 KBChip 2: 64 KBChip 3: 32 KBChip 4: 16 KB


a. The starting address of Chip 4 is then 552 K.b. Give the the following Address Line values for Chip 4 and put an asterisk (*) by the bits which are critical.(Answers should be one of the following: 0, 1, 0*, 1*, or X with no space between bit and asterisk.)

A19 = 0A18 = 1*A17 = 0A16 = 1*A15 = 1*A14 = 0A13 = X

c. There will be a total of 11 critical address lines for all chips.





A19 = 1*A18 = 0A17 = 0A16 = 0A15 = 1*A14 = 0A13 = X


7. ______________________________________________________________________________

HW Test 2: Address Decoding-Gaps


Chip 0: 8 KBChip 1: 256 KBChip 2: 16 KBChip 3: 8 KBChip 4: 8 KBChip 5: 64 KBChip 6: 128 KB


a. The starting address of Chip 6 is then [640] K.b. Give the the following Address Line values for Chip 3 and put an asterisk (*) by the bits which are critical.(Answers should be one of the following: 0, 1, 0*, 1*, or X with no space between bit and asterisk.)

A19 = [1*]A18 = [0]A17 = [0*]A16 = [0*]A15 = [0]A14 = [1*]A13 = [0*]

c. There will be a total of [22] critical address lines for all chips.


Chip 0: 128 KBChip 1: 32 KBChip 2: 128 KBChip 3: 128 KBChip 4: 32 KBChip 5: 64 KB



A19 = 1*A18 = 0A17 = 0A16 = 0*A15 = 0A14 = XA13 = X






A19 = 0A18 = 1*A17 = 0*A16 = 0A15 = 0A14 = XA13 = X

c. There will be a total of 10 critical address lines for all chips Starting AddressChip 0: 32 KB 0Chip 1: 256 KB 32 KB -> 256 KBChip 2: 256 KB 512 KBChip 3: 16 KB 768 KB Chip 4: 64 KB 784KB -> 832 KBChip 5: 16 KB 896 KB

hahaha there is a reason I do this on paper19 18 17 16 15 14 13 12 11 10512 256 128 64 32 16 8 4 2 1*0 *0 0 0 0 X X X X X*0 *1 X X X X X X X X*1 *0 X X X X X X X X*1 *1 *0 *0 0 0 X X X X*1 *1 0 *1 X X X X X X*1 *1 *1 0 0 0 X X X X^^^^^^^^ 10000 hours in paint

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HW Test 2: DecoderSolution Algorithm: Understand/Memorize the following table (Note that chip select must be 1 (one) for all in order to turn anything on):

A2A1A0/Y0/Y1/Y2/Y3/Y4/Y5/Y6/Y7

00001111111

00110111111

01011011111

01111101111

10011110111

10111111011

11011111101

11111111110

XXX11111111

1. Which output will be zero for the decoder below given the following inputs?

A0 = 0 A1 = 1A2 = 0CS1 = 1CS2 = 0CS3 = 1No Outputs

2. Given the following inputs:A0 = 0A1 = 1A2 = 1

CS1 = 1CS2 = 0CS3 = 0Answer - Y6

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HW Test 2: DecodeGate

All right guys. First step: look at the gate youre given and determine what your outputs need to be in order to activate the chip select. In the case of the NAND gate below (problem 1), all inputs would need to be 1s. In the case of the OR gate (problem 2), all inputs would need to be 0s. In the case of the AND gate (problem 3), all would need to be 1s.Second step: Write out A19-A12 and fill them in according to what they would need to be as determined above. If a line isnt given, it gets an X. Third step: You now should have two sets of 4 bits. Convert to hexadecimal. These will be the first two options that need to be satisfied to turn on the chip. Wherever they are both satisfied in the answer choices given in the problem is where the chip will be addressed. (Note: An X indicates more than one option is viable. Convert accordingly.) - Baghdady

1. Assume the following gate is connected to the LOW-active chip select line of a 8-KB memory chip used in a byte-addressable system with 20-bit addresses. Which of the following system addresses would address this chip? 0xBDC9A0X9DE8B0xBC48C2. Assume the following gate is connected to the LOW-active chip select line of a 8-KB memory chip used in a byte-addressable system with 20-bit addresses. Which of the following system addresses would address this chip?0xE46A30xC5E940xC5EB10xD569C

3. Assume the following gate is connected to the high-active chip select line of a 8-KB memory chip used in a byte-addressable system with 20-bit addresses. Which of the following system addresses would address this chip? 0x91D590x100270xB12ED

4. Assume the following gate is connected to the LOW-active chip select line of a 8-KB memory chip used in a byte-addressable system with 20-bit addresses. Which of the following system addresses would address this chip? 0xC9D3F0xD9C210xC9594

5. Assume the following gate is connected to the high-active chip select line of a 8-KB memory chip used in a byte-addressable system with 20-bit addresses. Which of the following system addresses would address this chip?0x2D89B0x0EDD6

6. Assume the following gate is connected to the high-active chip select line of a 8-KB memory chip used in a byte-addressable system with 20-bit addresses. Which of the following system addresses would address this chip?

0xB45DB0x9004F

7. Assume the following gate is connected to the high-active chip select line of a 8-KB memory chip used in a byte-addressable system with 20-bit addresses. Which of the following system addresses would address this chip?

0xFAA33 0xFA94B 0xFA9C80xF8C7E ______________________________________________________________________________

HW Test 3: Memory General

1. How is SRAM generally used in a system? Lvl1 cache, Lvl 2 cache, NVRAM

2. What type of Memory is used to store variables in a(n) (embedded) system? RAM, Volatile, SRAM, DRAM (System & embedded system have same answers)

3. What is the advantage of using DRAM over SRAM? Lower power at use, Higher Density, Less expensive.

4. What type of memory is made out of transistors? SRAM

5. Which of the following is volatile? SRAM, DRAM, SDRAM

6. What type of memory is used to store the Stack in an embedded system? RAM, Volatile, SRAM,DRAM (Any one of)

7. Which type of memory is generally used to store system states in an embedded system? ROM, Non-Volatile, PROM, EPROM, or EEPROM

8. What type of memory is generally used to store Program Instructions in an embedded system?ROM, Non-Volatile, PROM, EPROM, EEPROM

9. What type of memory is generally used to store Tables or Images in an embedded system?ROM, Non-Volatile, PROM, EPROM, EEPROM

10. What is the advantage of using SRAM over DRAM? (Check all that apply.)Lower power consumption (at rest), Simpler to implement, Faster, Can be placed on same die as processor logic

11. Which type of RAM is the following memory cell found in? DRAM 12. What type of memory is generally used to store User Settings in an embedded system? ROM or Non-Volatile or PROM or EPROM or EEPROM

13. Which of the following are non-volatile? EEPROM, EPROM, NVRAM, OTP ROM, Flash, Masked ROM, PROM.

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HW Test 3: EPROM Programming

1. In the EEPROM Programming Flowchart, how many times does the programmer try to program a difficult cell before it quits? 10

2. In the EPROM Programming timing diagram shown below (see image with problem), how long must programmer wait to insure the DATA is valid after the EPROM is told to output the cell data written to it? tDV

3. In the EPROM programming flow chart shown below, how does the programmer program the EPROM? Programs all cells then checks each one for validity.

4. In the EPROM programming timing diagram shown below,at what point in time does the EPROM programmer read the DATA to be verified from the bus?The second rising edge of CE#

5. In the EPROM programming timing diagram shown below,how long must the DATA be stable before the EPROM latches the data into memory?tDS

5. In the EPROM programming timing diagram shown below,how long must the ADDRESS be stable before the EPROM latches the data into memory?tAS

6. In the EPROM programming timing diagram shown below, what signal tells the EPROM to output the cell data which was written to it? CE

7. In the EPROM programming timing diagram shown below, at what point in time does the EPROM read the DATA it is to program into its cell? The first rising edge of CE#Using the figure Programming Waveform from above to answer 8-9 questions:8. What signal determines whether input data or output data is on the data bus?OE or OE# or OE#/Vpp or OE/Vpp9. At what point in time does the EPROM read the DATA it is to program into its cell? The first rising edge of CE#

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HW Test 4: Development Tools

1. Name four different things that you generally find on a micro-controller project board.Reset SwitchCom PortsLCD Display7-Segment DisplayLEDsKeypad/SwitchesAmplifiers/Op AmpsOpto-IsolatorsRelaysSCRs/TriacsBuzzersPotentiometersDACsDip SwichesThermometersBreadboardsExpansion Ports/Slots/Connectors

2. Whats the name of an electro-mechanical device that is used to switch higher-voltage and/or higher-current devices? Relay/SCR/Triac (any one of)

3. What field does the 0038 reside in the s-record shown below? AddressTo catch all similar problems, the key is as follows:S = Start Code, 1 = Record Type, 11 = Byte Count, 0038 = Address, [4-2] = Data, 42 = Checksum

4. What does DPDT on a relay stand for?Double Pole Double Throw

5. What is circuitry that is used to interface two different chips together called?glue logic6. What kind of IC is used to isolate a low-voltage microprocessor circuit from a higher-voltage motor circuit? opto-isolator7. What is the name for a program which takes C code written on a computer and creates code for a microprocontroller? That is, it creates for a processor other than the one it runs on. Cross Compiler

8. What is the name for software and/or hardware which allows you to start and stop execution and examine the state of the processor while it is executing your code? Debugger

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HW Test 5: AddressingFor these take PORTB and convert to binary, and the rightmost bit is the value of ADDR[]. If ECLK is 0 it is preparing, if it is a 1 it is doing the action. Pay attention to the table, as it will tell you about what size is being used.

1.LSTRB# = 1 R/W # = 0PORTA = 0xA9PortB = 0xB8ECLK = 0Answer - Preparing to write 8 bits to an even address

2. LSTRB# = 0 R/W# = 0PORTA = 0xF7 PORTB = 0xE8 ECLK = 1Answer - Writing 16 bits to an even address

3. LSTRB# = 1R/W# = 0PORTA = 0x9APORTB = 0x8BECLK = 0write 16bits to odd address

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HW Test 5: General

1. The "256" in the part number MC9S12DP256B refers to the amount of [memory] contained in the chip.

2. The term glue logic refers to the added circuitry necessary to interface two or more chips together.

3. The flash memory in the chip is used to hold code instructions for the chip.

4. What signal from the MC9S12 is used in conjunction with the R/W# line to determine whether or not 8- or 16-bit data is being read? LSTRB5. Which of the following is/are not found on the MC9S12? Piezo Electric Buzzer, Digital to Analog Converter, Temperature Sensor

6. In the glue logic below the signal A is [a] and the signal B is [b][a] = ECLK[b] = R/W#

7. What type of data/information is stored at the upper end of the MC9S12 memory map?Interrupt Vector Table

8. In the glue logic below the signal A is [a] and the signal B is [b][a]=WE#[b]=OE#9. The [a] memory in the chip is used to hold code instructions for the chip. Flash

10. What signal is shown at the top of this timing diagram? (As indicated by a '?') ECLK

11. What is a compiler called which generates code for a process other than the one it is running on? Cross Compiler12. What signal from the MC9S12 is used to determine whether or nor a memory chip is being read from or written to? RW or R/W or R/W#13. What type of memory is located at the very beginning (lowest addresses) of the MC9S12 Memory Map by default? registers or control registers_________________________________________________________________________

HW Test 5: Memory InterfacingFormula:Chip 0 is an [a]-K B Memory Chip.Chip 0 contains the [b]-order Bytes of 16-bit integersThe starting address of the memory system is 0x[c].The ending address the memory system is 0x[d]. The configuration is [e] Endian.o [a] = 2^(AX - A1 - 10) (difference of indices for D,C ie X - 1) D is always the same (1 byte out), its the address lines that tell you how many bytes are addressed in the chipo [b] look at spread of FG and KL to see which chip has high and low order (low order chip starts at D0 (D0 to D7 usually))o [c] Take a 20-digit binary number. All positions are 0 except at A bit and B bit, where they are 1s. Convert this number to hex and thats the answer. Should be 5 digits when done.o [d] Take binary number from [c]. Make every bit from A0 to A equal to 1. Convert to hex. Should be 5 digitso [e] big endian if LSTRB goes into low-order chip

1. Consider the following diagram where we are interfacing two memory chips to a MC9S12. Given that the pins are connected as follows:

A = A19B = A17C = A1 F = D8D = A15 G = D15E = A0 H = A1 K = D0I = A15 L = D7J = LSTRB

o Correct Answers for: a 32Correct Answers for: b highCorrect Answers for: c A0000512K 256K 128K 64K 32K 16K 8K 4K... 1 0 1 0 X X X X So then change all the Xs to 1s and that should give you the answer1010 1111 1111 1111 1111 = AFFFF

Correct Answers for: d AFFFFCorrect Answers for: e Big

2. Consider the following diagram where we are interfacing two memory chips to a MC9S12. Given that the pins are connected as follows:A = A19 B = A15

C = A1 F = D0 D = A14 G = D7 E = LSTRB

H = A1 K = D8 I = A14 L = D15 J = A0

A = 16B = lowC = 88000D =8FFFFE = Big


A = A19 B = A17

C = A1 F = D8 D = A14 G = D15 E = LSTRB

H = A1 K = D0 I = A14 L = D7 J = A0

A = 16B = highC = A0000D = A9FFFE = little


A = A18 B = A17

C = A1 F = D8 D = A14 G = D15 E = A0

H = A1 K = D0 I = A14 L = D7 J = LSTRB

16high6000067FFFBig

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HW Test 5: Memory Interfacing To LabelSolution Algorithm: Use the formulas from the previous problem in reverse to solve. Note: C and H seem to always be A1, and the opposite of LSTRB is A0

(^^^ I did not find that D/I seem to be B - 2. See example number 3 and 4 that I posted below. This also affects the size of the chip because it is changing the address lines.

I think I figured out the reason why. Look at the starting and the ending addresses and break them down so you can look at the bits. Figure out which bit is the first that changes and then that bit is the answer for D/I.is seems to work with every example so I think it is true)

Quick way of figuring out the inputs: subtract the beginning from the end address and add 1. This is the combined size of the 2 chips, and you can say 2^n = (end - beginning)/2, with n being the highest number input used (e.g. 16384/2 = 2^13, so inputs are A1 to A13).

OPTION 2: D0-D7 will be D0&D7 if chip is low-order D0-D7 will be D8&D15 if chip is high-order If big-endian LSTRB will go to low-order chip A0 will go to high-order chip If little-endian LSTRB will go to high-order chip A0 will go to low-order chip Regardless of big or little, LSTRB always goes to the odd address/byte A0-A_: to find the _, equation is log_2((end_address-start_address)/2)1. Given that A = A18, B = A17Chip 0 contains the high-order Bytes of 16-bit integers. The starting address of the memory system is 0x60000. The ending address of the memory system is 0x6FFFF. The configuration is Big Endian. C = A1, D = A15, G = D15, E = A0, H = A1, K = D0, I = A15, L = D7, J = LSTRB. (32-K)2. Given that A = A10, B = A15Chip 0 contains the low-order Bytes of 16-bit integers. The starting address of the memory system is 0x88000. The ending address of the memory system is 0x8BFFF.The configuration is Big Endian. C =A1, D =A13, G =D7, E =LSTRB, H = A1, K = D8, I = A13, L = D15, J = A0. (8-K)

3. Consider the following diagram where we are interfacing two memory chips to a MC9S12.A = A19B = A15Chip 0 contains the high order Bytes of 16 bit integersThe starting address of the memory system is 0x88000The ending address of the memory system is 0x8FFFF.The configuration is Big Endian.Complete the following:C = [A1]D = [A14] G = [D15]E = [A0]

H = [A1] K = [D0]I = [A14] L = [D7]J = [LSTRB]

Chip 0 is a [16]-k B memory chip

4. Consider the following diagram where we are interfacing two memory chips to a MC9S12.A = A18B = A15Chip 0 contains the low order Bytes of 16 bit integersThe starting address of the memory system is 0x48000The ending address of the memory system is 0x49FFF.The configuration is Big Endian.Complete the following:C = [A1]D = [A12] G = [D7]E = [LSTRB]

H = [A1] K = [D8]I = [A12] L = [D15]J = [A0]

Chip 0 is a [4] - KB memory chip

5.A = A18 B = A17 Chip 0 contains the low-order Bytes of 16-bit integersThe starting address of the memory system is 0x60000.The ending address the memory system is 0x63FFF.The configuration is Big Endian.Complete the following:C = A1 D = A13 G = D7 E = LSTRBH = A1 K = D8 I = A13 L = D15 J = A0Chip 0 is an 8-K B Memory Chip.

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HW Test 5: Reset Modes

1. In Expanded Wide mode, the MSB of the Address is located on Port [A],the LSB of the Address is located on Port [B],the MSB of the Data is located on Port [A],and the LSB of the Data is located on Port [B].

2. Give the necessary values for the Mode Pins to set up the MC9S12 to use an 8-bit external memory bus with emulation. (Valid answers are 0, 1, or X.) MODA = [a]MODB = [b]MODC = [c]a = 1b = 0c = 0

3. In Expanded Narrow mode, The MSB of the Address is located on Port A, the LSB of the Address is located on Port B, and the data is located on Port A.

4. What does setting the ROMON bit to 1 do?Makes the internal flash usable.

5. What does setting the ROMON bit to 0 do?Makes the internal Flash unusable.

6. What does setting the ROMCTL bit to 1 at reset do?Allows for the ROMON bit in the MISC register to be set.

7. Give the necessary values for the Mode Pins to set up the MC9S12 to use a 16-bit external memory bus in regular mode.MODA = [1]MODB = [1]MODC = [1]

8. Give the necessary values for the Mode Pins to set up the MC9S12 to use a 16-bit external memory bus in emulation mode. (Valid answers are 0, 1, or X.) MODA = 1MODB = 1MODC = 09. Give the necessary values for the Mode Pins to set up the MC9S12 to not use expanded memory. (Valid answers are 0, 1, or X.) MODA = [0]MODB = [0]MODC = [X]

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HW Test 6: General

1. What is the purpose/function of a pull-down resistor? Answer: Pulls an input down to a zero by latching it to ground.

2. Give an advantage and disadvantage of using isolated(port-based) I/O.Pro - simultaneous memory and I/O. Cons - Additional pins needed for address, data, controls; additional instructions needed to access the I/O bus.

3. What latch chip was used in class to write to I/O devices? 74374

4. What does volatile mean in the following line of C code?

#define PTH *(volatile unsigned char *)0x260

Answer: Variable can be changed from outside the program (external device can drive high/low)

5. Give an advantage and disadvantage of using memory-mapped I/O. Advantage includes many operations, and a disadvantage is I/O error on a memory map cannot caught and results in program crashes.

6. Give an advantage and disadvantage of using linear select addressing of I/O.CHECK me up on this guys - seems legitAdvantage: simple selection logic and one port per addresslinedisadvantage: wastefull addressing

7. What does the following line of C instruct the compiler to do? What does it allow the programmer to do?#define PTH *(volatile unsigned char *)0x260(essay style question)

8. Why is a latch needed to store the address from the 9S12 when communicating with an I/O device? (essay style question)A: Bus is multiplexed so address must stored while data is put on the bus

9. Why is the 373 Latch's G input connected to 5 Volts?(essay style question)The latches G input is not-ed so it has to connect to 5 volts to make it a zero.

10. What is the difference between the 74-373 and the 74-374? (essay style)74373 uses an enable, while 74374 latches values on the rising edge of a clock (VERIFY)

11. Give an advantage and disadvantage of using memory-mapped I/O. Pros. No addition pins or instructions necessary. Cons. Less memory can be addressed.12. What latch chip was used in class to read from I/O devices? 7437313. Everything done in the CPU is done in parallel (not serial). Why?Answer: Everything is done in parallel because there are plenty of jobs that computer has to do and most all of them are perform individually. Therefore, parallelism makes everything WAY faster and other programs does not have for another to complete before it executes.

14. What is a typical size/value of a pull-up resistor?Answer: R is typically 4.7 KOhm 10 KOhm______________________________________________________________________________

HW Test 6: PAL Decoding

1. Write out the starting and ending addresses in Binary, then see where they start to differ. This is your answer. If they start to differ before the 10th digit than put an X in the space.

The upper address lines of a 20-bit address are to be connected to the inputs of a 10-input PAL to decode memory-mapped I/O addresses in a system.

The PAL is to generate a low signal when an address in the range0x82000 - 0x827FFis selected.

1000001000000000000010000010011111111111What do the input values of the PAL need to be for it to output a low? (1, 0, or type in X if input address not used.) The highest order inputs of the PAL should be used first and the lower ones not connected if not needed. i.e. D9 is connected to A19, D8 to A18, etc... )

D9 = 1D8 = 0D7 = 0D6 = 0D5 = 0D4 = 0D3 = 1D2 = 0D1 = 0D0 = X

2. (Same as above, but range is 0xD4000 - 0xD5FFF)Answer - D9 = 1, D8 = 1, D7 = 0, D6 = 1, D5 = 0, D4 = 1, D3 = 0, D2 = X, D1 = X, D0 = X

3. 0x58000 - 0x5BFFFD9 = 0, D8 = 1, D7 = 0, D6 = 1, D5 = 1, D4 = 1, D3 = X, D2 = X, D1 = X, D0 = X

4. 0x90400 - 0x907FFD9 = 1, D8 = 0, D7 = 0, D6 = 1, D5 = 0, D4 = 0, D3 = 0, D2 = 0, D1 = 0, D0 = 1

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HW Test 6: PIM

1. An open drain output allows for wired-ORing or pins. TRUE

2. This register can be used to detect overloads or shorts at port pins. PTIn

3. This register can be used to internally connect a resistor to from a port pin to either Vcc or Vdd if the corresponding pin is set to input. PERn

4. In order to know which pin an interrupt has occurred on, this register must be read. PIFn

5. A [a] resistor is generally used to make an input pin's default value 1. Pull up

6. This register can determine whether the pull resistor is pull-up or pull-down PPSn

7. This register can determine whether the an interrupt is detected on either the rising edge or falling edge of a signal. PPSn

8. Which register is written to in order to change the values of a certain port's pins? PTn

9. What Port only has 4 pins instead of 8? J

10. Which register needs to be configured before ever outputing a value to a certain port pin? DDRn

11. This register determines whether or not a transition on a port pin will produce an interrupt. PIEn

12. The ISA level directly supports serial instructions. False

13. Which register determines if port pins will be used as input or output? DDRn

14. Which register determines if port pins will act as an OR gate when its pins are tied together, or not? WOMn

15. This register reads the state of the register buffer if reading a pin is set to output. PTn

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HW Test 6: PIM InitializationSolution Algorithm: Convert the required data using the following Register key:DDR(p) - Data Direction Port p, 1 - output, 0 - inputPER(p) - Port Pull Device Enable Register, 1 - enable if input, 0 - disable if inputPIE(p) - Port Interrupt Enable Register, 1 - enable/unmask interrupt, 0 - disable/mask interruptPPS(p) - Port Polarity Select Register, 1 - Enable Pull Down, 0 - Enable Pull Up(NOTE: PPS carries 1 - Rising Edge, 0 Falling Edge sets Interrupt Flag for P, H, J.)Basically, PPS(p) = 1 for the bits next to Pull Down and Rising Edge, 0 for every other bitRDRH - Port Reduced Drive Register, 1 - one-third full output drive, 0 - full output drive1.Given the following desired initialization settings for Port H of the HC9S12, give the hexadecimal value for each register shown below.(Do not put a 0x in front of each number. Assume pins that aren't input are output, and vice versa. Make each bit that doesn't matter a 0.)Output: bit(s) 6 7Reduced Drive: bit(s) 6 7Pull Device Enabled: bit(s) 1 2Interrupt Enabled: bit(s) 0 5Falling Edge Triggered Interrupts: bit(s) 5Rising Edge Triggered Interrupts: bit(s) 0Pull Up: bit(s) 1Pull Down: bit(s) 2Answer: DDRH = C0, PERH = 06, PIEH = 21, PPSH = 05, RDRH = C0

2. Given the following desired initialization settings for Port H of the HC9S12, give the hexadecimal value for each register shown below.(Do not put a 0x in front of each number. Assume pins that aren't input are output, and vice versa. Make each bit that doesn't matter a 0.)

Input: bit(s) 0 1 2 3 4 7Reduced Drive: bit(s) 5 6Pull Device Enabled: bit(s) 1 7Interrupt Enabled: bit(s) 0 2Falling Edge Triggered Interrupts: bit(s) 2Rising Edge Triggered Interrupts: bit(s) 0Pull Up: bit(s)Pull Down: bit(s) 1 7

DDRH = [60]PERH = [82]PIEH = [05]PPSH = [83]RDRH = [60]

3. Given the following desired initialization settings for Port H of the HC9S12, give the hexadecimal value for each register shown below.(Do not put a 0x in front of each number. Assume pins that aren't input are output, and vice versa. Make each bit that doesn't matter a 0.)

Input: bit(s) 0 6 7Reduced Drive: bit(s) 1 2 4Pull Device Enabled: bit(s) 0Interrupt Enabled: bit(s) 6Falling Edge Triggered Interrupts: bit(s) 6Rising Edge Triggered Interrupts: bit(s)Pull Up: bit(s) 0Pull Down: bit(s)

DDRH= 3EPERH= 01PIEH= 40PPSH= 00RDRH= 16______________________________________________________________________________

HW Test 6: IO CalculationSolution Algorithm: Voltage after drop over LEDs/current through LEDs = Resistance of RIf 2 voltages sources are hooked in parallel, remember that the voltage heading towards the resistors is equal to just ONE of those sources, but the current going towards the resistors is all of the currents coming from all of those sources (and going through the LEDs) combined. Just remember for parallel: VTotal = V1 = V2 = V3, ATotal = A1 + A2 + A3.

1. Consider the I/O interface of the circuit below. What is the value of R given that the LEDs need to operate at 14.6 mA with a voltage drop of 1.2 Volts given that Vcc is 3.4 Volts?Answer - 151

2. Consider the I/O interface of the circuit below. What is the value of R given that the LEDs need to operate at 11.2 mA with a voltage drop of 1.1 Volts for LED1 and 0.8 Volts for LED2 given that Vcc is 3.4 Volts?Answer - 134

3. Consider the I/O interface of the circuit below. What is the value of R given that the LED needs to operate at 10.8 mA with a voltage drop of 0.9 Volts given that Vcc is 4.5 Volts? (Answer should be rounded to nearest integer.)This answer actually requires the calculation of (Vcc - .9V)/(.0054 A) = 667 because the current is split between the 2 resistors evenly______________________________________________________________________________Solution Algorithm: Current = Voltage after drop through LEDs / Resistance R

HW Test 6: IO Calculation 2

1. Consider the I/O interface of the circuit below. What is the current (in mA to the nearest integer) through one of the LEDs given that the value of R is 119 ohms, the LEDs need to operate with a voltage drop of 1.1 Volts, and that Vcc is 4.9 Volts? Answer - 32

2. Consider the I/O interface of the circuit below. How much current (in mA to the nearest integer) must the port pin be able to sink given that the value of R is 314 ohms, the LED needs to operate with a voltage drop of 1.1 Volts, and Vcc is 4.5 Volts?Answer - 11

3. Consider the I/O interface of the circuit below. What is the current (in mA to the nearest integer) through one of the LEDs given that the value of R is 233 ohms, the LEDs need to operate with a voltage drops of 1.2 Volts for LED1 and 0.9 Volts for LED2, and that Vcc is 4.6 Volts?

Answer - 21______________________________________________________________________________

HW Test 7: Bit MaskingSolution Algorithm: Take bits mentioned (they are 1s, with the not mentioned bits 0s) and convert to Hex. If the problem states set, OR this result with PTH, if it states clear, AND PTH with the inverse of the result.

1. How would you set the following pins of Port H without affecting any other pins? Set bit(s) 0 1 2 4 6 7Answer: PTH | 0xD7

2. How would you set the following pins of Port H without affecting any other pins?Set bit(s) 1 2 4 5 6Answer: PTH | 0x767654 32100111 0110 = 76 = 0x76______________________________________________________________________________

HW Test 7: Bit Masking ANDSolution Algorithm: Same as above. Note: This problem may or may not be bugged, and can be answered in two separate ways, with the NOT of the section that should remain, or with the section that should be cleared.

To clear, AND it with the hex of the inverted pins given. i.e. clear bit 7 = PTH & 0111 11111.How would you clear the following pins of Port H without affecting any other pins?Clear bit(s) 1 2 3 4 5 6Answer: PTH & 0x81 or PTH ~& 0x7E

2. How would you clear the following pins of Port H without affecting any other pins?Clear bits 0 1 4 6Answer: PTH & 0xAC or PTH & ~0x53

3. How would you CLEAR bits 0 4 5 of Port H without affecting any other pins?Answer: PTH & ~ 0x31 ______________________________________________________________________________

HW Test 7: Bit Masking WhileSolution Algorithm: Determine what bits of Port H are being checked, and determine when these bits are tripped in order to exit the while loop. Note: Remember that 0 constitutes false, and all other values constitute true if no logical test occurs. 1.Given the following code, when must the program drop out of the while loop and execute the instruction PTJ = 0?while ((PTH & 0x02) == 0);PTJ = 0;Answer: When PortH[1] = 1;

2. Given the following code, when must the program drop out of the while loop and execute the instruction PTJ = 0?while(PTH & 0xBF);PTJ=0;

Answer: No possible solution with these choicesWhy? Because everything inside the while() would have to be 0. Aka, the only two options would be PTH=0x40 or PTH=0x00.

3. Given the following code, when must the program drop out of the while loop and execute the instruction PTJ = 0?while (PTH & 0xFD); PTJ = 0;

Answer: no possible solution with these choicesWhy? Because everything inside the while() would have to be 0. Aka, the only two options would be PTH=0x02 or PTH=0x00.

4. Given the following code, when must the program drop out of the while loop and excute the instruction PTJ = 0?while ((PTH & 0x7F) == 0); PTJ = 0;Answer: When PortH[0] = 1

When PortH[1] = 1

When PortH[2] = 1

When PortH[3] = 1

When PortH[4] = 1

When PortH[5] = 1

When PortH[6] = 1

5. Given the following code, when must the program drop out of the while loop and excute the instruction PTJ = 0?while ((PTH & 0x0F) == 0);

PTJ = 0;

Answer: When PortH[0] = 1

When PortH[1] = 1

When PortH[2] = 1

When PortH[3] = 1

6. Given the following code, when must the program drop out of the while loop and excute the instruction PTJ = 0?

while (PTH & 0x02);

PTJ = 0;

Answer: When PortH[1] = 0

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HW Test 7: Bit Masking XORSolution Algorithm: Convert the hex code to binary. Follow the required operations. Note: Xor Operator produces a 1 if the two input bits are different, or a 0 if they are the same (difference function);1.What is the value of ChangedSw (in hex) after this code is run?unsigned char OldSw = 0x1F;unsigned char NewSw = 0xDA;unsgined char ChangedSw; (Well done, Dr. Reid)

ChangedSw = (~OldSw ^ NewSw) & OldSw;

Answer = 0x1A;

2. What is the value of ChangedSw (in hex) after this code is run?

unsigned char OldSw = 0xE1;unsigned char NewSw = 0x6C;unsgined char ChangedSw;

ChangedSw = (OldSw^NewSw) & NewSw;

Answer = 0x0C

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HW Test 7: Bit Masking XOR CodeNote: A problem to this effect was discussed in class. If you missed said discussion, it would be prudent to assign a random value to OldSw, then change it in NewSw and view the result. (Test Cases of OldSw = 0x6A and NewSw = 0xA6 seem to work decently)1. What does the following C code look for? (i.e. What kind of change does this C code detect?)/* ... */

unsigned char OldSw, NewSw, ChangedSw;

while (OldSw == NewSw) NewSw = PTH;

ChangedSw = (NewSw ^ ~OldSw) & ~NewSw;

OldSw = NewSw;

/* ... */

Answer: ChangedSW bit values are 1 only where switches remained a 0 after switching.

2. What does the following C code look for?/* ... */



ChangedSw = (~OldSw ^ ~NewSw);

OldSw = NewSw;

/* ... */ Answer: ChangedSW is a 1 for any values that have been changed.

3. What does the following C code "look for?" (i.e. What kind of change does this C code detect?)

/* ... */



ChangedSw = (~NewSw ^ OldSw) & ~NewSw;

OldSw = NewSw;

/* ... */

Answer: ChangedSW is a 1 only where switches remained a 0.

4. What does the following C code "look for?" (i.e. What kind of change does this C code detect?)

/* ... */



ChangedSw = (~NewSw ^ OldSw) & ~OldSw;

OldSw = NewSw;

/* ... */

Answer: ChangedSW is a 1 only where switches remained a 0.

5. /* ... */



ChangedSw = NewSw & (OldSw ^ ~NewSw);

OldSw = NewSw;

/* ... */

Answer: ChangedSW is a 1 only where switches never changed from a 1.

6. /* ... */



ChangedSw = OldSw & (~OldSw ^ NewSw);

OldSw = NewSw;

/* ... */

Answer: ChangedSW is a 1 only where switches remained 1.

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HW Test 7: Keyboard

Hey guys I figured this out. Ill start typing my general solution below then commenting the code to show what is going on.

Solution Algorithm: For the second type, work backwards through the grid like so, with a 0 meaning a press: 16151413

1211109

8765

4321

Convert this from 1->16 to hex (4 chars), and that should be the answer. The exception to this is if the return is ~, which can be easily accounted for.

Seems to me that at least for problems using the for loop and rows only, the answer follows a pretty simple pattern. (Though why the code works that way I have no clue). Your answer will be in hex form and consist of four numerals. i.e. 0x####. Going from left to right, the first numeral represents the bottom row of the keypad. Any key pressed on that row constitutes a 0, and all unpressed keys a 1. So, if no keys are pressed, the first numeral is F (1111). If the C and D keys have been pressed (may help to see actual keypad), then the first numeral will be C (1100). The pattern continues from there where the next numeral corresponds to the second to bottom row, etc You can look at problems 3 and 4 to see keys pressed and the corresponding answer. Problem 2 follows this pattern as well. The only difference is that the return is not-ed, so you simply not the answer you get following the process I just explained. As for problem 1, I have no idea whats going on there. I hope this explanation at least helps yall get the right answer on the HW, even if I cant say how the code works.(Lemme know if this explanation is unclear, and Ill try to revise it if it is)Its a little rough, and Ill work on coming up with a better explanation, but you nailed it. Get yourself a cookie.

Alright so heres how to do these (although I haven't tested it on all of them). Ill show a keypad thing below for reference. And since he always seems to set the values to the same things I will just show those as well.

bit 0 0 1 2 3bit 1 4 5 6 7bit 2 8 9 A Bbit 3 C D E F bit 4 bit 5 bit 6 bit 7DDRH = 0x0F; // This means bits 0 through 3 of port H are input, bits 4 through 7 are outputRDRH = 0x00; // doesn't really matterPERH = 0x00; // dittoPIEH = 0x00; // don't need interruptsPTH = 0x0F; // set initial values for it.

Alright, so for all of these bits 4 through 7 are output, BUT 0 through 3 are INPUT! This is important. Generally he just has a for loop where he will set the PTH to a value that changes each time it goes through the loop (the KeyMask and RowMask values). The rows are set to a certain value, in all actuality the column value we just set does not matter because it is about to be overwritten because it is set to input. So then you take the 4 row bits and whichever row is on, or 0, you check each column to see if that value is on on the row you are checking. Then the column bits, 4 through 7, are written in PTH. You then do whatever you are supposed to do with this output to solve the problem. Ill go through a few and comment through them.

^ Green hurt my eyes too much - Changed to purple.

1. Given the following code and keypad layout (see slides or actual problem), what will the function GetKey () return when it is run while keys A and B are pressed?DDRH = 0x0F; // Bits 0 through 3 are output (1), bits 4 through 7 are input (0)RDRH = 0x00;PERH = 0x00; // The rest of this doesnt really matter. It wont change anyways.PIEH = 0x00;PTH = 0x0F;

unsigned char GetKey(void){ unsigned char KeyMask[16] = { 0xEE, 0xDE, 0xBE, 0x7E, 0XED, 0xDD, 0xBD, 0x7D, 0xEB, 0xDB, 0xBB, 0x7B, 0xE7, 0xD7, 0xB7, 0x77 }; int i; char Key; for (Key=0, i=0; i

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