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UPTEC E12001
Examensarbete 30 hpFebruari 2012
Space Vector Pulse Width Modulationfor Three-Level Converters
- a LabVIEW Implementation
Påbyggnadsprogrammet till civilingenjörsexamen i elektroteknik
Master Programme in Electrical Engineering
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Table of Contents
1% I0T2(.TI20%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%3
1%1 4ac)#round5 The Lyse)il Wa$e Po&er Pro6ect%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%3
1%/ 2$er$ie&5 *rom Sea to +rid%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%7
1%8 ultile$el .on$erters and odulation Strate#ies%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%19
1%: +uidelines5 Purpose and ethod%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%11
/% (LTILEVEL .20VETES5 T2P2L2+IES' .20T2LES A0 I+ITAL
.2P20E0TS%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%1/
/%1 ultile$el Strate#ies%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%1/
/%1%1 .ascaded ;-4rid#e ultile$el .on$erters%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%18
/%1%/ *lyin# .apacitor ultile$el .on$erters%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%1<
/%1%8 iode .lamped ultile$el .on$erters%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%1=
/%/ i#ital .omponents5 Soft&are and ;ard&are%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%17
/%/%1 *P+A%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%17
/%/%/ LabVIEW%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%/1
/%8 .ontrol Al#orithm5 Predicti$e .urrent .ontroller%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%//
/%8%1 The .urrent as a eference%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%/8
/%8%/ . Volta#e unbalance%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%/:
/%: .onclusions%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%/<
8% SPA.E VE.T2 2(LATI20 AL+2IT; *2 (LTILEVEL .20VETES I0
T;E2> A0 I0 PA.TI.E%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%/?
8%1 odulation Topolo#ies%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%/?
8%/ Space Vector Pulse Width odulation for t&o-le$el con$erters%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%/7
8%/%1 eference Vector%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%/7
8%/%/ Time uration%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%81
8
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List of Figures
*i#ure 15 2ne of Lyse)ils point absorbers and its different parts%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%3
*i#ure /5 2$er$ie& of a Po&er .on$ertin# System5 *rom Source to +rid%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%7
*i#ure 85 !a" Three-phase t&o-le$el in$erter &ith ? I+4T-s&itches &ith the three output phases a'b
and c% 2utput $olta#e &a$eform created &ith PW5 !b" Line-to-line Volta#e !c" Line-to-#round
Volta#e %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%19
*i#ure :5 A .ascaded ;-4rid#e ultile$el .on$erter !one phase le#" and its 7-le$el output
&a$eform%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%18
*i#ure
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*i#ure /85 D-transformation%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%83
*i#ure /:5 Time si#nal compared &ith a ramp%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%83
*i#ure /
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List of Appendices
Appendix 15 Space $ector modulation in Simulin)5 4loc) sho&in# calculation for sector selection
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
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1. INTRODUCTION
E$ery pro6ect dealin# &ith rene&able ener#y is in need of rene&able ener#y con$ersion in form of
multile$el po&er electronics% This thesis approaches three-le$el con$erters in a &a$e po&er
con$ersion point of $ie& and co$ers the calculation and implementation of a pulse &idth
modulation system usin# a modulation strate#y that uses a space $ector as a reference in order to
achie$e a desired three-le$el &a$eform !Space Vector Pulse Width odulation"% The system is
specially adapted for three-phase systems that reuires hi#h-po&er and hi#h-$olta#e and is therefore
suitable for all types of rene&able ener#y sources%
1.1 Background: The Lysekil Wave Power Project
The (ppsala (ni$ersity Po&er i$ision epartment started their &a$e po&er pro6ect in /99/ and
four years later the first &a$e ener#y con$erter !WE." &as tested out at sea% Se$eral WE.Gs has
been tested there since then and the success rate has been hi#h% ost of the con$erters are
#rounded &ith concrete at the bottom of the sea' /< m belo& the &ater surface 1% The WE.Gs are
con$entional point absorbers5 They use linear #enerators to con$ert the mechanical ener#y created
by the &a$e motion into electrical ener#y% A WE. &ith this form operates in the follo&in# &ay5
• The buoy mo$es alon# the &a$es creatin# a $ertical up and do&n mo$ement%• This motion is transferred to the rope that is connected to the piston%
• The piston induces current in the stator &indin#s &hen #oin# up' but &ith help from the
spring attached at the bottom' also &hen #oin# do&n%
1http5@@&&&%el%an#strom%uu%se@fors)nin#spro6e)t@Wa$ePo&er@Lyse)ilspro6e)tetHE%html' 19@91@1/
3
Figure 1: One of Lysekils point absorbers and its different parts
http://www.el.angstrom.uu.se/forskningsprojekt/WavePower/Lysekilsprojektet_E.htmlhttp://www.el.angstrom.uu.se/forskningsprojekt/WavePower/Lysekilsprojektet_E.htmlhttp://www.el.angstrom.uu.se/forskningsprojekt/WavePower/Lysekilsprojektet_E.html
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1.2 Overview: Fro !ea to "rid
After successfully achie$in# the extraction of ener#y &ith help from the po&er con$erter' the next
step is to connect it to the #rid% This can not be done directly% The recei$ed output from the WE.
has to be processed throu#h se$eral systems before it can match the characteristics of the #rid !*i#%
/"% If the #enerator is synchronous it has to meet some demands before it can be connected to a
stron# #rid% These reuirement has to be fulfilled5
• Same freuency
• Same amplitude
• Same phase and phase shift !three phase"
7
Figure 2: Overview of a Power Converting System: From Source to rid
!enewable
Power Source
rid
"#−converter $alman
Power Control S%P&'
#igital Output
(nverter !ectifier
Filter
"C #C
"C
FP"
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This means that the output from the po&er con$erter &ill not be connected to the #rid until these
reuirements are fulfilled% To do this a reference for the #rid characteristics is needed% This is done
&ith the Balman filter% The Balman filter uses a A con$erter to approximate a reference that fits
the #rid% Its output is based on samples% With this information the in$erter can be supplied &ith
s&itchin# information% The in$erters capability is based on the information #i$en by the space
$ector modulation al#orithm that #i$es the exact s&itchin# time for each s&itch' creatin# a stepped
output $olta#e &a$eform usin# the .' supplied by the ener#y source% This output &ill then fulfil
all the demands mentioned before% irectly connected to the in$erter !theoretically to the
modulation al#orithm" is the current controller' that controls the ener#y output%
1.# $ultilevel %onverters and $odulation !trategies
A . to A. con$erter is defined as a in$erter% The con$erter produces sinusoidal output &a$eform&ith respect to ma#nitude VJ' freuency rad@sJ and phase a'b'cJ &itch help from a .-po&er
supply% To create this specific &a$eform the in$erter s&itches has to be turned 20 and 2** at
certain times' #i$en by the chosen modulation strate#y% As seen in *i#% 8b' the output &ill not be
exact as a sinus &a$e' but the charactaristics &ill be the same% *i#% 8a sho&s a typical three-phase
t&o-le$el in$erter &ith I+4TGs !Insulated +ate 4ipolar Transistor" as s&itchin# de$ices% The output
phases are #i$en as a'b and c%
19
Figure ): *a+ ,-ree.p-ase two.level inverter wit- / (0,.switc-es wit- t-e t-ree output
p-ases ab and c Output voltage waveform created wit- P&': *b+ Line.to.line %oltage
*c+ Line.to.ground %oltage
sw1
sw
2
sw
3
sw
4
sw
5
sw
6
#C
Source
a
b
c
(0,
⋅t
%
%
⋅t
a
b
c
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In$erters are commonly used for medium $olta#e applications% *or hi#h-$olta#e hi#h-po&er
applications' the in$erter also ser$es as a control mechanism for the reacti$e po&er and $olta#e
stabilisation% With the multile$el con$erter topolo#y the output &a$eform can be formed &ith
smaller $olta#e steps ! dv / dt "' &hich also decreases the stress on the bearin#s and &indin#
isolation =J% It ob$iously also #i$es a lo&er total harmonic distortion !T;" in the output' because
of the closer resemblance to the sinusoidal &a$eform% *or multile$el con$erters' medium $olta#e
semiconductors de$ices can still be utili,ed for hi#h-$olta#e hi#h-po&er applications% Still standin#
is the issue &ith the capacitor $olta#e balancin# problems 1
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. !ULTIL"#"L CON#"RT"R$% TO&OLO'I"$( CONTROL"$
AND DI'ITAL CO!&ON"NT$
.1 !ultilevel $trategiesost of todayGs po&er systems need components ma)in# hi#her po&er operations possible% A
concern for the medium $olta#e #rid is the connection &ith only one semiconductor s&itch% This
limitation became the fuel for pushin# researches to de$elop the multile$el po&er con$erters'
reali,in# the combination of hi#h-po&er and medium-$olta#e% Except for the increase of po&er
le$els' this also opened up opportunities for rene&able ener#y sources' ie multile$el con$erter
systems could easily be attached to it 1
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.1.1 Cascaded )*+ridge !ultilevel Converters
A cascaded ;-4rid#e con$erter has se$eral ;-4rid#e con$ersion cells% These cells are formed as in
*i#% :% It consists of four s&itches% Each cell is also supplied &ith a .-source and is series-
connected on the A. side% The &hole fi#ure demonstrates one phase le# for the con$erter% The
&a$eform to the ri#ht is the circuits correspondin# &a$eform% Addin# V.1' V./' V.8 and V.: #i$es
its 7-le$el step-shaped &a$eform =J%
Each of these le$els can ha$e KV.' 9 and -V. as their output throu#h different path selections
&hen connectin# the .-source to the A. output' thus assi#nin# different s&itchin# patterns for the
four s&itches% S&itch 1 and : s&itched 20 #i$es an output of KV.' s&itch / and 8 20 #i$es -V .
and all the s&itches 20 #i$es a ,ero% The series connection bet&een the A. outputs #i$es then the
summation of the outputs creatin# this &a$eform%
The ad$anta#es &ith the cascaded ;-brid#e multile$el con$erter can be seen in the formula for the
calculation of the output phase $olta#e le$els5 m=/s1 % +i$en that s stands for the number of
.-sources needed' the number of $olta#e le$els is more than double than for the sources% Also the
18
Figure 3: " Cascaded 4.0ridge 'ultilevel Converter *one p-ase leg+ and its 5.level output
waveform
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series-connection of the ;-brid#e form lo&ers the manufacturin# costs' because it shortens the
process% The problem remainin# is the fact that each ;-brid#e needs its o&n .-source 3J% This
means that it can not be connected to products that already ha$e multiple separated .-sources
1
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.1. Fl,ing Capacitor !ultilevel Converters
In 177/ the *lyin# capacitor con$erter &as introduced for the first time% The &or) of eynard and
*och up#rades the techniue &here series connection of s&itches &as needed' adaptin# the system
to hi#her $olta#e con$ersions% ;i#h-$olta#e con$ersion reuires semiconductors capable of )eepin#
the desired $olta#e at a certain le$el% The paper
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The s&itchin# combination for the three-le$el in$erter !*i#% ?a" does not ha$e as many combination
states as for the fi$e-le$el% To #et the output $olta#e Van for the three-le$el in$erter' it has to be
re#ulated &ith the combination of four s&itchin# states' as seen in Table 1%
*or the fi$e le$el system ho&e$er there are 1: s&itchin# states% *or an m-le$el system the reuired
clampin# capacitors per phase le# can be described as5 m−1∗m−/// ' m−1 desi#natin#the reuired number of .-bus capacitors%
With the increase of le$els' also the amount of some problem factors increases5 1
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.1.- Diode Claped !ultilevel Converters
The diode clamped multile$el in$erter has almost the same structure as the flyin# capacitor' but
instead of capacitors this in$erter type uses diodes as clampin# de$ices' creatin# the desired output
$olta#e% The $olta#e across each capacitor is defined as % #C / m−1 ' m bein# the number of
le$els and m−1 the amount of capacitors needed% So' for a t&o-le$el in$erter the $olta#e is
V. and for that case one capacitor is used% *or a three-le$el in$erter the $olta#e is V .@/ and
therefore is in need of t&o capacitors% This specific desi#n ma)es it possible to increase the number
of le$els 6ust by increasin# the amount of capacitors% In this context the terminolo#y neutral point
clampedM is often used% It describes the neutral point bet&een t&o capacitors connected across the
.-bus addin# an extra le$el to the system% If m is an e$en number' the neutral point is not utili,ed'
so then it is usually called a multiple point clamped con$erter% Experience sho& that hi#her le$els
than the three-le$el con$erter causes $olta#e balancin# problems' so it is common to use the three-
le$el in$erter ?J' but there are studies demonstratin# SVPWs &ith self balancin# systems 13J%
1=
Figure 7: " #iode Clamped converter for a *a+ t-ree.level inverter *one p-ase leg+ and
for *b+ five.level inverter *one p-ase.leg+
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*i#% =a sho&s a three-le$el in$erter% Its output $olta#e Van !one phase le#" has three states5 V.@/' 9
and -V.@/% To #et V.@/' the t&o upper s&itches need to be 20% To #et a ,ero' the t&o middle
s&itches need to be 20 and for -V.@/ the t&o lo&er s&itches need to be 20% 2ne difference
bet&een a con$entional t&o-le$el in$erter is the part in *i#% =a that is called 1 and 1G' referrin# to
the t&o diodes% The reuired amount of diodes can be calculated as m−1∗m−/ ' &here mstands for amount of le$els% So in the three-le$el case t&o diodes is needed for each phase% The
formula also sho&s a ma6or increase of the number of diodes &hen increasin# the amount of le$els%
A three-le$el in$erter needs in a three-phase system ? diodes' a four-le$el needs 13' a fi$e-le$el 8?
and at six-le$els it already has reached a amount of ?9 diodes% This hi#her le$el in$erters may &or)
in theory but not in practice% The t&o diodes clamps the s&itchin# $olta#e to half of the .-bus
$olta#e and the difference bet&een Va9 !for an example &hen S1 and S/ is on' the $olta#e across a
and 9 is V.' #i$in# Va9 N V." and Van #i$es the $olta#e across one capacitor !V.@/"% It is importantto add that the upper and lo&er s&itchin# pairs are complementary% This means that S1 and S1G or
S/ and S/G ne$er can be 20 at the same time% *or the fi$e-le$el in$erter !*i#% =b" there are fi$e
possible $olta#e outputs !Van"5 V.@/' V.@:' 9' V.@: and V.@/ and they operate as seen in Table 8%
Van S&itches !20"
V.@/ S1-S:
V.@: S/-S: and S1G9 S8'S:'S1G'S/G
-V.@: S:'S1G-S8G
-V.@/ S1G-S:G
,able ): #uty cycle for t-e switc-es in one p-ase leg *five.level inverter+
eachin# hi#her le$els decreases the lo&er harmonics and the need for filters' but at the same time
it ma#nifies the need for clampin# diodes% Ad$anta#es &ith the diode-clamped in$erter is the hi#h
efficiency% This because all the de$ices are s&itched at the fundamental freuency% The diode-
clamped in$erter also has a easy reacti$e po&er control application' but has difficulties controllin#
the real po&er for the indi$idual con$erters 1
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2.2 (igital %o'onents: !o)tware and *ardware
..1 F&'A
The *P+A !*ield Pro#rammable +ate Array" is a inte#rated circuit confi#ured &ith a hard&are
description lan#ua#e% Its uniue desi#n allo&s custom desi#n of the hard&are% *rom a hi#h-le$el
$ie& the *P+A is a pro#rammable silicon chip% It uses lo#ic bloc)s and pro#rammable routin#
resources' reali,in# this tailored $ersion' &ithout physically chan#in# anythin# in the hard&are% The
di#ital computin# tas)s are de$eloped in the soft&are !ie #eneral-purpose and #raphical
pro#rammin# lan#ua#es" and then compiled do&n to a confi#uration file or bit stream' containin#
information on ho& the components should be &ired to#ether% The *P+A does not reuire the user
to ha$e experience in hard&are-desi#n' &hich broadens the user #roup%
4enefits
These )inds of pro6ects reuire a po&erful system considerin# factors such as efficiency' time and
cost% With the *P+A comes se$eral benefits5/
• Performance5 4ecause of the lac) of seuential execution' the *P+A accomplished more per
cloc) cycle% The computin# po&er is hi#her than for con$entional SPGs%
• ,ime to market 5 Implementin# a concept is easier and faster% Instead if &ee)s it ta)es hours%
• Cost 5 The pro#rammable silicon eliminates fabrication costs and installation reuirements
• !eliability5 The *P+A does not use operatin# systems% This minimi,es problems' because
the communication &ith the hard&are &ill be directly%
• Long.term maintenance5 ;a$in# the characteristic of bein# confi#urable ma)es it easy to
adapt to future modifications%
/http5@@,one%ni%com@de$,one@cda@tut@p@id@?738' 19@91@1/
17
Figure 8: #ifferent parts of t-e FP"
http://zone.ni.com/devzone/cda/tut/p/id/6983http://zone.ni.com/devzone/cda/tut/p/id/6983
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;ard&are description
The hard&are contains a certain set of confi#urable lo#ic bloc)s that can be &ired to#ether% Excepts
for the lo#ic bloc)s it also has other specifications such as5
• *lip-*lops5 4inary shift re#isters that synchroni,es lo#ics and sa$es the lo#ic states bet&een
cloc) cycles%
• L(Ts !Loo) (p TableGs"5 All combinations of different lo#ics !A0' 2 etc%" are
implemented as truth tables in the L(T memory% The output of each uniue combination is
defined from before%
• ultipliers !Shift-add operation"
• 4loc) A
All these part and more are then used and controlled throu#h the chosen pro#rammin# lan#ua#e
connected to it8%
*P+A type
*or this pro6ect a Virtex< LC
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.. Lab#I"/
LabVIEW !Laboratory Virtual Instrumentation En#ineerin# Wor)bench) is a #raphical
pro#rammin# en$ironment' that' &ith help from lo#ic bloc)s and other components' ma)es it
possible to test' simulate and control a flo&chart-type model% It is easily inte#rated &ith hard&are
de$ices such as the *P+A% ostly the bloc) di#ram !&here the circuit is dra&n" and the front panel
!the input@output data' but also the pro#rammatic interface" is used &hen dealin# &ith this pro#ram
!*i#% 19"%
Except the fact that a #raphical pro#rammin# lan#ua#e is more peda#o#ic and user-friendly' the
LabVIEW soft&are has benefits considerin# the follo&in# t&o bi# differences from other
pro#rammin# lan#ua#es5:
1% +raphical pro#rammin# is reali,ed &ith help from #raphical icons' combined in a dia#ram
!*i#% 11" and is then directly compiled to machine code' so that the processor can understand
and execute the orders created in the dia#ram%
/% ata flo& is transmitted in form of data !not lines of text"% This ma)es it easier to control
different executions done separately and consecuti$ely%
:http5@@&&&%ni%com@lab$ie&@&hatis@#raphical-pro#rammin#@ ' 19@91@1/
/1
Figure 11:=9ample of a Logic
Operation done in Lab%(=&
Figure 1;: Lab%(=& softaware and its interaction devices
http://www.ni.com/labview/whatis/graphical-programming/http://www.ni.com/labview/whatis/graphical-programming/
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2.# %ontrol +lgorith: Predictive %urrent %ontroller
The predicti$e current controller can be used for any multile$el in$erter hi#h-$olta#e' hi#h-po&er
application /
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complex plane"' be chan#ed into stationary $alues 1:J5
d
dt id k =−
!
Li d k
1
Lvd k −ed k wi> k
d
dt i
> k =−
!
Li
>k
1
Lv
> k −e
>k wi
d k
The V. $ariation is #i$en by5
d
dt % #C =
1
C ∫ ic dt
.-.1 T0e Current as a Reference
The current control is dri$en &ith help from future $alues' calculatin# the minimum in$erter $olta#e
reuired to ma)e the inductor current follo& the current reference as much as possible 1:J% *i#% 18sho&s the parts that has to be considered calculatin# the $alues for the current control%
The load current at k 1t- instant is #i$en in the formula for the instant output $olta#e% These
are the instant output $olta#e parameters in the complex D-plane5
vd k 1= !id k 1 Ld
dt id k 1−wid k 1 ed k 1
/8
Figure 1): Overview of t-e Current Cotroller Ccalculations
SVPWMSVPWM
1 Load
Current Prediction
[i k 1 i k 1]
Calculation
'imi?ationof
Cost Function1=i ref @
respecting /
/ Aeutral
%oltage #eviation
[ vc k 1 ]
Calculation for Current Control
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v> k 1= !i> k 1 Ld
dt i> k 1−wi>k 1 e> k 1
The currents $aryin# in time is defined as5
d
dt id k 1=
id k 1−i d k , s
d
dt i > k 1=
i > k 1−id k , s
*inally #i$in# the load current at k 1t- instant5
id k 1= 1
!, s L[ Lid k w, s Li> k 1,s % d k 1−ed k 1 ]
i> k 1=1
!, s L[ Li> k w, s Li> k 1,s % >k 1 −e> k 1]
Prediction for the #rid $olta#e $alues can be calculated &ith the La#ran#e extrapolation methodM' a
process that constructs ne& data points that are not included in the ran#e of the measurements% This
may not be appropriate for unpredictable functions' ho&e$er if the samplin# is lo&' extrapolation
can be a$oided 1J%
ost control systems need a cost function that can determine if the reuired criterion is achie$ed or
not% The cost function compares the calculated predicted current &ith the current reference% A lo&
$alue for the cost calculation is to desire% It is #i$en as5
c1=1∣id k 1ref −i d k 1∣/∣i > k 1ref −i> k 1∣ ' &here O 1 and O / are &ei#htin# factors' the
&ei#htin# factor bein# a number bet&een 9-1% The &ei#htin# factor O / also determines the accuracy
of the reacti$e po&er control' thus compensatin# for the po&er factor $ariation% The instantaneous
reacti$e po&er can be predicted 6ust li)e for the current5 Bk =e> k id k −ed k i >k 1:J
.-. DC #oltage unbalance
The problem is caused by une$en char#in#@dischar#in# of the .-lin) capacitors &hen the output
is connected to the ,ero-point% Each output terminal !Va9' V b9' Vc9" can be connected to this point
and deli$ers in that case 9V% When that is the case' the neutral point current' i9' causes this une$en
char#in# pattern% It is )no&n that multile$el neutral point clamped in$erter has a .-balancin# problem% The reason for the unbalance lies in the capacitors% When a output phase $olta#e is shorted
to the capacitor middle point' the correspondin# phase current is transferred to the neutral point% To
pre$ent this the neutral point current $alues should be ,ero% The solution to this problem is the
re#ulation of the s&itchin# of the capacitors 1:J% The .-lin) currents are5
i s=i c1i1ic1=i9ic2ic2=i si−1
/:
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If the system is balanced the follo&in# relation is $alid5 i1i9i−1=9 and #i$es the currents5
i1= sa1⋅ sa2 ia sb1⋅ sb2 ib sc1⋅ sc2 ici9= sa2⋅ sa)ia sb2⋅ sb) ib sc2⋅ sc)ic
i−1= sa)⋅ sa3 ia sb3⋅ sb3i b sc3⋅ sc3 ic
This #i$es the current flo&in# throu#h capacitor c1 and c/5
i c1i c2=1 1 1
1 1 9⋅ i si 1
i−1
With this also the .-lin) $olta#e can be calculated5
c/= ∣vc k 1∣
voltagedifferencebetween c1∧c
/
This is the )ey &hen minimi,in# the $olta#e unbalance% Another &ay of decreasin# the unbalancin#
problem is throu#h re#ulation of the ener#y5
= p k 1=1
/C vc1
/ =1
/C vc1 k
, s
C ⋅ic1
/
= nk 1=1
/C vc2
/ =1
/C vc2 k
, s
C ⋅ic2
/
In the same &ay as for the capacitor $olta#e-comparison5
c/=[ = p k 1− = nk 1 ] =determinest-e allowed neutral voltage variation
2.& %onclusions
There are se$eral differnt types of multil$el con$erters on the mar)et and the most studied
con$erters has been described in this chapter5 .ascaded ;-4rid#e ultile$el .on$erters' *lyin#
.apacitor ultile$el .on$erters and iode .lamped ultile$el .on$erters% .hoosin# the ri#ht
con$erter it is important to consider the $olta#e le$el to implement% ;i#h-le$el con$erters #i$es lo&
distortion but hi#her $olta#e unbalance' so there has to be a compromise bet&een those t&o factors'
but also other issues such as increase of euipment for hi#her le$els% *or hi#h-$olta#e hi#h-po&er
applications the in$erter also can be used as a control for the $olta#e and reacti$e po&er re#ulation%
This is done &hen the in$erter is connected to a L-load' a current controller% esi#nin# the
multile$el application a soft&are !LabVIEW" directly connected to the hard&are !*P+A" &ill be
used for this pro6ect%
/
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.hoosin# the modulation it is important to consider follo&in# thin#s5
• inimi,ation of load current harmonics and s&itchin# freuency
• Pro$idin# uniform s&itchin# freuency for all s&itchin# de$ices and a balanced .
capacitor $olta#e 19J
ifferent PW - approaches ha$e the same #oal5 To reduce the T; of the current% Increasin# the
s&itchin# freuency reduces the lo&er-harmonics' &hich contributes to a lo&er T;' achie$in# the
#oal of a $olta#e output &a$eform &ith the reuested rms $alues and freuency and a sinusoidal
&a$eform resemblance ?J%
Turnin# the s&itches 20 and 2** creates pulses &ith the same amplitude but &ith different &idth%
These pulses are #enerated in the output to replace the sinusoidal &a$eform /9J% The easiest &ay
of creatin# this is by usin# a intersection method' ie comparison &ith a sa&tooth@trian#le &a$eform
!carrier &a$e"% When the reference &a$e !sinus" is lar#er than the trian#ular &a$eform' the PW
si#nal is s&itched 20 !$alue5 1" and &hen it is smaller it is s&itched 2** !$alue5 9"%
The most common method is called the Sinusoidal PWM% Althou#h it is commonly used it has a
bi# disad$anta#e F it has lo& output $olta#e' &hich also can be seen in Table :% There are ho&e$er
other methods that can meet these demands in a better &ay' usin# similar carrier-based systems &ithdifferent forms5
• Trapezoidal modulation5 .omparison of a trian#ular &a$e and a modulatin# trape,oidal&a$e%
• Staircase modulation5 The modulation si#nal is formed as a stair' the le$els bein#calculated to eliminate certain harmonics% 0ot recommended for cycles that ha$e less than
1< pulses%
• Stepped modulation5 Each step bein# a certain time portion !in de#rees" &hich isindi$idually controlin# the amplitude and is used to elimate harmonics% +i$es lo& distortion'
but hi#h amplitude%
• Third harmonic injected PWM5 Implementation in the same &ay as for the SPW' butthe references si#nal is not a sinusoidal &a$e% It consists of a 1" fundamental component /"
Third harmonic component% This method #i$es hi#her amplitude and a better utili,ation of
the .-source%
Space Vector Pulse width Modulation !SVPW" #enerates the appropriate #ate dri$e &a$eform
for each PW cycle% The in$erter is treated as one sin#le unit and can combine different s&itchin#
states !number of s&itchin# states depends on le$els"% The SVPW pro$ides uniue s&itchin# time
/=
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calculations for each of these states ?J% This techniue can easily be chan#ed to hi#her le$els and
&or)s &ith all )inds of multile$el in$erters !cascaded' capacitor clamped' diode clamped"% The
three $ectors that form one trian#le &ill pro$ide duty cycle time for each' #i$in# the desired $olta#e
$ector !Vref "% This can be described &ith the formula5 % =, 1 % 1, /% /, 8 % 8/,c
odulation
Techniue
Line Volta#e
T;
Stator .urrent
T;
*undamental Volta#e
!Volt"
SPW ::%8 :%98 /?7'7
Trapi,oidal :9%93 /%ues and t-eir ,4#
SVPW also ha$e #ood utili,ation of the . lin) $olta#e' lo& current ripple and relati$e easy
hard&are implementation% .ompared to the SPW' the SVPW has a 1
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#.2 !'ace ,ector Pulse Width $odulation )or two-level converters
The circuit in *i#% 1? demonstrates the foundation of a t&o-le$el $olta#e source con$erter% It has six
s&itches !s&1-s&?" and each of these are represented &ith an I+4T s&itchin# de$ice% A' 4 and .
represents the output for the phase shifted sinusoidal si#nals% ependin# on the s&itchin#
combination the in$erter &ill produce different outputs' creatin# the t&o-le$el si#nal% The bi##est
difference from other PW methods is that the SVPW uses a $ector as a reference% This #i$es the
ad$anta#e of a better o$er$ie& of the system%
-..1 Reference #ector
The reference $ector is represented in a D-plane% This is a t&o-dimensional plane transformed from
a three-dimensional plane containin# the $ectors of the three phases% The s&itches bein# 20 or
2** is determined by the location of the reference $ector on this D-plane%
/7
Figure 1/: ,-ree.level t-ree.p-ase inverter wit- a load and neutral point
n A
BC
sw1
sw2
sw3
sw4
sw5
sw6
#C
Source
Figure 17: ,-e reference vector in t-e two
and t-ree dimensional plane
jβ
αa
c
b
Vref
ϴ
Vα
Vβ
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Table < sho&s that the s&itches can be 20 or 2**' meanin# 1 or 9% The s&itches 1'8'< are the
upper s&itches and if these are 1 !separately or to#ether" it turns the upper in$erter le# 20 and the
terminal $olta#e !Va' V b' Vc" is positi$e !KV."% If the upper s&itches are ,ero' then the terminal
$olta#e is ,ero"%
Switching
states
a b c
S1 S/ Van S8 S: V bn S< S? Vcn
1 20 2** V. 20 2** V. 20 2** V.
9 2** 20 9 2** 20 9 2** 20 9
Table
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represented as one rotatin# $olta#e $ector% The ma#nitude and an#le of this $ector can be calculated
&ith .lar)Gs Transformation5
% ref =%
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, 1=, c⋅a⋅sin 8 −
n−18 ⋅=, c⋅a[sin
n
8 cos −cos
n
8 sin ]
, /=, c⋅a⋅sin−n−1
8 =, c⋅a [−cossin
n−18
sin cosn−1
8 ]
, 9
=, c
−, 1
−, /
.hoosin# n as the number of the sector !nN1'/'8':'
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-..- $2itc0ing Tie
uty .ycle
*or each sector there are = s&itchin# states for each cycle% It al&ays starts and ends &ith a ,ero
$ector% This also means that there is no extra s&itchin# state needed &hen chan#in# the sector% The
une$en numbers tra$el counter cloc)&ise in each sector and the e$en sectors tra$el cloc)&ise%
uty cycle for sector 1
*or sector 1 it #oes throu#h these s&itchin# states5 999-199-119-111-119-199-999' one round and
then bac) a#ain% This is durin# the time Tc and it has to be di$ided amon#st the = s&itchin# states'
three of them bein# ,ero $ectors5
,
c
=, 9
:
, 1
/
, 9
/
, /
/
, 1
/
, 9
:
This can be calculated for all the sectors !*i#% /1"% There are different )inds of &a$eforms5 centre
ali#ned and ed#e ali#ned% Ed#e ali#n &a$eforms ma)es it easier &hen comparin# &ith the carrier
&a$e' but the centre ali#ned has the ad$anta#e of reducin# the harmonics and also reducin# noise
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Sector Duty Time Upper Switches Duty Time Lower Switches
1 S1, 1, /
, 9
/
S/ , 9
/
S8
, /, 9
/
S:
, 1, 9
/
S< , 9
/
S?, 1, /
, 9
/
2 S1, /
, 9
/
S/, 1
, 9
/
S8, 1, /
, 9
/
S: , 9
/
S< , 9
/
S?
, 1, /
, 9
/
S1 , 9
/
S/, 1, /
, 9
/
S8, 1, /
, 9
/
S: , 9
/
S<, /
, 9
/
S?, 1
, 9
/
! S1 , 9
/
S/, 1, /
, 9
/S8
, /, 9
/
S:, 1
, 9
/
S<, 1, /
, 9
/
S? , 9
/
" S1, /
, 9
/
S/, 1
, 9
/
S8 , 9
/
S:, 1, /
, 9
/
S<, 1, /
, 9
/
S? , 9
/
# S1, 1, /
, 9
/
S/ , 9
/
S8 , 9
/
S:, 1, /
, 9
/
S<, /
, 9
/
S?, 1
, 9
/
,able 8: #uty time for eac- sector
8
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8? Figure 21: &aveform s-owing se>uencing of switc-ing states for all t-e regions
000 100 111 110 100 000110 000 010 111 110 010 000110
000 010 111 011 010 000011 000 001 111 011 001 000011
000 001 111 101 001 000101 000 100 111 101 100 000101
Sec!r1 Sec!r2
Sec!r3 Sec!r4
Sec!r5 Sec!r6
Va
Vb
Vc
Va
Vb
Vc
Va
Vb
Vc
Va
Vb
Vc
Va
Vb
Vc
Va
Vb
Vc
, 9
:
, 1
/
, 1
/
, 9
:
, /
/
, /
/
, 9
/
, 9
:
, 1
/
, 1
/
, 9
:
, /
/
, /
/
, 9
/
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-..3 Ipleentation in !atlab4$iulin5
To test the theory the calculations from 8%/%/ and 8%/%8 has been simulated usin# atlab@Simulin)%
Some specifications5 Amplitude and .-$olta#e has been chosen as 1V' samplin# time Ts N
1@19999s' cycle time for the ramp Tc N 1@1999s' the three phases are phase sifted 1/9 de#rees apart
and ha$e the freuency of a typical S&edish #rid' /
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Part I
The $olta#e $ectors5 Va' V b' Vc is replaced &ith VD and V% As seen in *i#% 1=' Va and VD ha$e the
same direction' but different ma#nitude% The same expression is seen in *i#% /8 as a amplitude
difference% With the D-transformation the si#nals are demonstrated in a t&o-dimensional plane'
ma)in# it easier to use in the calculations done in the other parts%
Part II
The reference $olta#e $ector Vref ' an#le and modulationindex a is calculated as sho&n in
chapter 8%/%
Part III
Appendix 1 sho&s the bloc) dia#ram made in Simulin)% The calculations are based on the $ector
reference an#le% If Vref is bet&een 9 and /8 it is in sector 1' if it is bet&een /8 and
/pi / 8 it is in sector / and so on%
Part IV
*i#% /: #i$es one example of one time calculation compared &ith the ramp% If the si#nal is #reater
then the ramp the $alue one is #i$en' else ,ero%
83
Figure 2): D.transformation
% a % b% c
% %
Figure 23: ,ime signal compared wit- a ramp
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Part V
In Part V the s&itchin# information is fed to a (ni$ersal 4rid#e !representin# the in$erters"' that is
connected to three loads and a neutral point bet&een them !*i#% /8"% The .-$olta#e source is set to
1 V% To #et the phase $olta#e' for example Vab5 Substract V b from Va% The output for Vab' V bc' Vac is
sho&n in *i#% /: and also compared to the input sinusoidal &a$es% Appendix : sho&s the output for
all three phases%
87
Figure 26: (nverter ouput sc-eme
Figure 2/: ,wo.level voltage ouput % bc compared to input signal % bc
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-..6 Conclusions
In chapter 8%/ the SVPW for a t&o-le$el neutral-point-clamped $olta#e source in$erter has been
presented% The t&o $olta#e le$el !9V. and 1V." can &ith help from the in$erter s&itches create
the t&o le$els in the in$erter output !one le$el for line-to-nutral $olta#e"% .alculatin# the duty cycle
!the s&itches 20-time" for each s&itch' #i$es a sinusoidal resemblin# &a$eform in the output%
#.# !'ace ,ector Pulse Width $odulation )or three-level converters
*i#% /= sho&s a three-le$el neutral point clamped in$erter% It contains 1/ s&itchin# de$ices and also
supplied &ith t&o capacitors connected in series% 4oth are char#ed &ith V.% The point bet&een
these capacitors is the .-$olta#e neutral point% Each phase le# consists of : series-connected
s&itchin# de$ices !I+4TGs" and t&o clampin# diodes% Their 6ob is to clamp the six middle s&itches
potential to the .-lin) point at ,ero% Specific combinations of the t&el$e s&itches #i$es the three-
le$el output $olta#e%
The four s&itches in one phase le# can only be turned on t&o at a time and so be connected to the
.-lin) points p' o' n% These are represented &ith the s&itchin# states P' 2 and 0% This means that
three $olta#e le$els can be created usin# 2 as the reference%
The ad$anta#es of three-le$el con$erters instead of t&o-le$el5
:9
Figure 27: A three-le$el' three-phase neutral point clamped in$erter
a
bc
% c1
% c2
#1a
#2a
#1c #1b
#2c #2b
neutral point o
p
n
(0,
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• ;i#her le$els means that the output &a$eform resembles the sinusoidal &a$eform more%
This also means that the harmonic distortion is decreased%
• Smaller $olta#e le$els are used% This means smaller % ' &hich means reduced stress on
the motor bearin#s%
• The clampin# diodes limits the $olta#e across the 2**-state s&itchin# de$ices to one
capacitor $olta#e le$el !half of the .-lin) $olta#e"% This reduces the $olta#e' so medium
rated semiconductor de$ices can be used for hi#h-$olta#e hi#h-le$el applications%
2ne bi# do&nside of the hi#her le$el in$erter is the neutral point balancin# problem%
S1% 20 2** 2**
S% 20 20 2**
S!% 2** 20 20
S"% 2** 2** 20
V%& V. 9 -V.
Switchin' State P 2 0
,able 5: Switc-ing combination and switc-ing states for a t-ree.level inverter *one p-ase.leg+
-.-.1 $2itc0ing $tates
*or a three-le$el three-phase in$erter there are /= s&itchin# states !*i#% /?"% These states represent
the connection to the different .-lin) points% If there is a load connected to the output of these
states the in$erter &ill #enerate a output phase $olta#e% This can be calculated as follo&s5
% a;=/S1a−S 1b−S 1c/S/a−S /b−S /c
% b; =/S1b−S 1a−S 1c/S/b−S /a−S /c
% c;=/S1c−S 1b−S 1a/S/c−S /b−S /a
These are the line-to-neutral $olta#es% To recei$e the line-to-line $olta#e5
% ab=% a;−% b;
% bc=% b;−% c;
% ca=% c;−% a;
:1
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There is reuested to #enerate fi$e le$els of outputs' so the three-le$el can be created% These le$els
are /V.' V.' 9' -V. and -/V. !for the line-to-line $olta#e"% All /= s&itchin# states and 17
$olta#e $ectors and the #enerated output $olta#e is sho&n in Table 11%
As for the t&o-le$el in$erter the reference $ector is #i$en &ith the help from three $olta#e $ectors%
*or the three-le$el con$erter each sector also is di$ided into : re#ions' specifyin# the output e$en
more% 4ased on the ma#nitude the $olta#e $ectors can be defined as5
• Rero Volta#e Vectors !RVV"5 VN9 !redundant s& states"
• Small Volta#e Vectors !SVV"5 V1':'='19'18'1? !redundant s& states"
• edium Volta#e Vectors !VV"5 V8'?'7'1/'1
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-.-. Tie Duration
To describe the reference $olta#e $ector Vref ' the space $ector transformations comes in handy5
% ref =/
8
% a;% b;⋅e <
/
8
% c;⋅e− <
/
8
% ref =% ⋅e < 9 t −9=% 9
Vref can be described &ith the three nearest $olta#e space $ectors% This selection is based on the
ma#nitude of the Vref and its an#le% *or one cycle5
% ref =, 1% 9, /% y, 8 % ?
Ta' Tb and Tc for Sector 1' e#ion 8 !*i#% /7b"
If V/ Is chosen as the reference axis !maximum ma#nitude as units" the $olta#e $ectors on the axis
can be described as5
% 9=% 1=1
/ % y=% 8=
8/
⋅e <
? % ? =% :=
1
/⋅e
< 8
and the reference $ector as5
% ref = % u%
:
8% #C
⋅e
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In similar &ay the calculations for e$ery sector and re#ion can be calculated !Table 19"% ;a$in# the
duration time for the $ectors &ill #i$e information about the duty cycle for each s&itch%
e#ion Selection
The re#ion selection is done as in 1=J% The re#ions are #i$en as5
% 88
% −% #C
8 9 for sector 1% If this is not fulfilled' the $ector is in re#ion /5
% −
88 % −
% #C
8 9 If none of the abo$e are true' the $ector is in re#ion 85
% − 8?
% #C 9 % If none of these are fulfilled the $ector is in re#ion :%
::
Figure 25: Space vector diagram for *a+ all sectors *b+ sector 1
13
4
2
, c % : , b % 8
, a % 1
% ref
% ref
a b
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Sector (e'ion 1 (e'ion (e'ion ! (e'ion "
1 a, c sin 8 −
, c/ [1−/asin
8 ]
a, csin
, c [1a sin −8 ]
−a, c sin
−, c/ [/ asin
8 −1]
, c
/[1−/asin ]
, c
/ [/asin
8
−/]
, c
/ [1/asin −
8 ]
, c
/[/asin −1 ]
a, csin 8−
, c [1−asin8 ]
a, c sin 8
−
, c/
[1− /asin8
]
a, c sin
, c
/[/ a sin
8
−1]
−a, c sin 8
−
a, c [1−sin ]
, c
/[1−/asin
8]
, c
/ [/asin −1]
, c
/ [/asin
8−1]
, c [ 1−asin]
a, c sin 8
, c/
[/asin−8
− 1]
! a, c sin
, c/
[1− /asin−8
]
−a, c
sin
8
, c [1−a sin −8]
−a, c sin 8
−, c/ [/a sin −1]
, c
/[/asin
8
1]
−, c
/ [ 1/asin
8
−]
, c
/ [1−/asin]
−, c/
[1−asin ]
a, csin 8
, c/[/asin−
8−1]
" −a, c sin
, c
/[1/asin
8]
a, c sin −8
, c
/ [/a sin −
8
−1 ]
−a, c sin
a, c [1sin 8
]
, c
/[/asin
8
−−1]
−, c
/ [ 1/asin
8
]
, c
/ [1/asin]
, c
/[1 /asin
8
]
a, c
sin
, c [1asin 8
−]
# −a, c sin8
, c
/ [1/asin]
a, csin 8 −
, c[1a sin ]
a, csin pver 8−
−, c
/ [/ asin 8 1]
, c
/ [/asin −
8
1]
−
, c
/ [/asin 1],
c
/ [/asin
8
1]
, c
/[/asin
8
−−1]
−a, c
sin
8
, c [ 1asin]
$ a, c sin 8
, c/ [1/asin−
8 ]
−a, csin
−, c [1/a sin ]
a, c sin 8
, c/ [asin −
8 1]
, c
/[/asin 1]
, c
/ [1−/asin
8 ]
, c
/ [/asin
8−−1]
, c[ 1a sin −8
]
−a, c sin
−, c/
[ /asin 8
−1 ]
,able 1;: ,ime e9pressions of voltage vectors in different sectors and regions
:
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Switchin' States Correspondin' Volta'e Vectors
a b c Vector Magnitude Angle
P P P V9 9V 9
2 2 2
0 0 0
P 2 2 V1 /
8
% #C
9
2 0 0
P 0 0 V/ :
8% #C
9
P 2 0 V8 /
8% #C
?
P P 2 V: /
8% #C
8
2 2 0
P P 0 V< :
8% #C
8
2 P 0 V? /
8% #C
/
2 P 2 V= /
8% #C
/8
0 2 0
0 P 0 V3 :
8% #C
/8
0 P 2 V7 /
8% #C
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-.-.- $e7uencing of $2itc0ing $tates
In the same &ay as for the t&o-le$el in$erter each s&itch in each phase le# has its o&n output
&a$eform% Each sector has : re#ions' meanin# there &ill be5
?!sectors":!re#ions"8!phases":!s&itches" N /33 &a$eforms% *or the t&o-le$el there are =/
&a$eforms% ;o&e$er only 1:: of these has to be calculated' because the lo&er s&itches in each
phase le# are complementary to the upper s&itches%
Seuencin# for e$en sectors
Seuencin# for s&itch 1 and / in e$en sectors' ie /': and ?' #i$es a opposite !be#ins &ith 1 to 9 to
1" &a$eform and cannot be compared &ith the ramp in the same &ay% *or these sectors the
&a$eform for s&itch 8 and : are used instead' because they #i$e the complementary &a$eform of
s&itch 1 and /% Later' after the &a$eform is compared &ith the ramp' the output information can be
in$erted' #i$in# s&itchin# information for s&itch 1 and / in the e$en sectors%
:=
Figure );: &aveform s-owing se>uence of switc-ing states for switc- 1 and 2 in sector
1 region 1 p-ase a
% a
9
Switc-1
Switc-2
9
9
, c
A
O
P P P P P
O O O O O
A
, b
:
, a
/
, c
/
, b
/
, a
/
, c
/
, b
/
, c
/
, a
/
, b
/
, c
/
, a
/
, b
:
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-.-.3 $#&/! of )ig0er Levels and Overodulation
;i#her le$els
This report only co$ers in$erters up to three le$els of $olta#e output and the space $ector
modulation is desi#ned as in *i#% /7a% It is important to add that this only is one &ay of calculatin#
the three-le$el modulation% The sectionali,in# of the sectors in the shape of these : re#ions can be
done in different &ays% This is only one of them% With this type of se#mentation it is easier to follo&
the same pattern' as *i#% /7b is for *i#% /7a% This &ay seems ho&e$er to be the easiest one' because
of its symmetrical dimensions%
2$ermodulation
Another factor that has not been considered in this study is the o$ermodulation of the space $ector
modulation% 2$ermodulation is &hen the reference $olta#e can be considered outside the dia#ram%
*i#% /7 sho&s the reference si#nal inside the dia#ram% .alculations and implementation on
o$ermodulation techniues has sho&n positi$e results as in #ood performance /8J' but is ho&e$er
a $ery complex method to realise%
:3
Figure )1: Space vector diagram for a *a+ t-ree.level inverter *b+ five.level inverter
< <
% ref % ref
a b
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-.-.6 Ipleentation in $iulin5 and Lab#I"/
Simulin) output
The theoretical three-le$el calculations has been realised usin# Simulin)% *i#% 89 sho&s the output
$olta#e &a$eform for V bc !line-to-line $olta#e"% Some specifications5 Amplitude and .-$olta#e
has been chosen as 1V' samplin# time Ts N 1@19999' cycle time for the ramp Tc N1@1999' the three
phases are phase shifted 1/9 de#rees apart and ha$e the freuency of a typical S&edish #rid'
/
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LabVIEW output
*i#% 88 sho&s the line-to-line $olta#e output for a three-le$el in$erter% The implementation is done
in LabVIEW% Some specifications5 Amplitude and .-$olta#e has been chosen as 1V' samplin#
time Ts N 9%9/s' cycle time for the ramp Tc N 9%999
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LabVIEW adaptation
Simulin) and LabVIEW are $ery different soft&are pro#rams% The simulations done in Simulin)
are not realistic or useful &hen usin# to#ether &ith the *P+A% The sample time in Simulin) can be
chosen as hi#h as &anted' in this case Ts N 1@19999' &hich is far to complicated to produce in reality
usin# LabVIEW% This three-le$el con$erter is adapted to the Balman filter that produces sinusoidal
&a$es formed by :99 samples@period' each sample bein#
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Sector Time (e'ion 1 (e'ion (e'ion ! (e'ion "
1 Ta
T b
Tc
% b1
/% c
% a
1% c% a
% b
−1
/
1
/−% a
−% c−1
/1
/−% b
% a−1
/
% b
1% c
Ta
T b
Tc
−% b1
/−% a
−% c
−% c−1
/
−% b1−% a
1
/% c
% a −1
/1
/% b
1−% a−% c
−% b−1
/
! Ta
T b
Tc
% a1
/% b
% c
1% b% c
% a−1
/
1
/ −% c
−% b−1
/1
/−% a
% c−
1
/
% a1% b
" Ta
T b
Tc
−% a1
/−% c
−% b
−% b−1
/
−% a1−% c
% b−1
/
% c−1
/1
/ % a
1
/−% c
−% b−1
/1
/ −% a
# Ta
T b
Tc
% c1
/% a
% b
1% a% b
% c−1
/
1
/−% b
−% a −1
/1
/−% c
% b −1
/
% c1% a
$ Ta
T b
Tc
−% c1
/
−% b
−% a
−1
/−% a
−% c1−% b
1
/% a
1/ % c
% b−1
/
1−% b−% a
−% c− 1/
,able 1): #uration time described wit- t-e p-ase voltages %a %b and %c
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-.-.8 Conclusions
In chapter 8%8 the SVPW for a three-le$el neutral-point-clamped $olta#e source in$erter has been
presented% The three $olta#e le$els !9V. ' 1V. and /V." can &ith help from the in$erter s&itches
create the three le$els in the in$erter output% .alculatin# the duty cycle for each s&itch' #i$es a
sinusoidal resemblin# &a$eform in the output% ;i#her le$el means lo&er distortion' but at the same
time the problem &ith the neutral point unbalance is attendin#% ealisin# the three-le$el con$erter
in LabVIEW reuires adaptation to the *P+A' in form of memory stora#e and sample time
selection%
3. CONCLU$ION$
This thesis has presented the theories behind multile$el con$erters' usin# the neutral point diode
clamped con$erter as a basis% Ad$anta#es &ith the diode-clamped in$erter is the hi#h efficiency%
The modulation chosen for the pro6ect' the space $ector pulse &idth modulation' has #ood
utili,ation of the . lin) $olta#e' lo& current ripple and is relati$e easy to implement in the
hard&are% These features ma)es it suitable for hi#h-$olta#e hi#h-po&er applications' such as
rene&able po&er #eneration% This specific desi#n ma)es it possible to increase the number of le$els
6ust by increasin# the amount of capacitors% It also &or)s &ith all )inds of multile$el in$erters%
Increasin# the $olta#e le$els decreases the harmonic distortion' because it resembles the desired
sinusoidal output more' but is also increases the $olta#e unbalancin# problems% Also' the system
becomes more complex' both in theory !more calculations" and reality !more euipment"% *or this
reason many prefer to &or) &ith the three-le$el con$erter% *or hi#h-$olta#e hi#h-po&er
applications the in$erter also is used as a control for the $olta#e and reacti$e po&er re#ulation% This
is done &hen the in$erter is connected to a L-load' a current controller% It is ho&e$er not suitable
for acti$e po&er control% Testin# the theories of the three-le$el con$erter in Simulin) can be useful
&hen ma)in# small chan#es in the code' because it does not ta)e as much time as in LabVIEW' but
there are no #uaranties that it &ill &or) &ith other sample times than the idealistic ones in Simulin)%
Implementin# the ideas behind the SVPW in LabVIEW' reuires adaptation to the *P+A% The
memory is not endless and each of the memories' lo#ic bloc)s etc used in LabVIEW are carefully
chosen so it &ill not ta)e up all the space in the *P+A% It is also important to consider that it is not
only the space $ector modulation al#orithm that &ill ta)e space in the *P+A' also the Balman filter
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and the current controller al#orithm has to fit in there% In conclusion' some errors in the $olta#e
&a$eform output has been noticed5 e$iations causin# une$en pattern% This does ho&e$er not
intrude &ith the final sta#e of #rid-connection' because of the filterin# done in the end%
6. FUTUR" /OR9
Where this pro6ect ends a ne& be#ins% There are se$eral ideas that can be analysed and
implemented% These are some of the su##estions for future &or)5
• .onnect the *P+A to the three-le$el in$erter and test the modulation al#orithm created in
LabVIEW%
• Try the space $ector modulation strate#y &ith a unbalanced system5 % a; % b; % c;≠9
• Impro$e the three-le$el SVPW5 educe losses &ith a filterin# system &ithin LabVIEW
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8. A&&"NDIC"$
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:. R"F"R"NC"$
1J os odrX#ue, et al%' YPredicti$e .urrent .ontrol of a Volta#e Source In$erterY' IEEE
transactions on industrial electronics' $ol%
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19J 4um Seo) Suh et al%' ultile$el Po&er .on$ersion F An 2$er$ie& of Topolo#ies and
odulation Strate#iesM' epartment of Elec)ical and .ornputer En#ineerin#' (ni$ersity of
Wisconsin' 1773
11J Brishna et al%' irect Predicti$e .urrent .ontrol of +rid .onnected 0eutral Point
.lamped In$erter for Wa$e Po&er ExtractionM' International Symposium on Po&er
Electronics' Electrical ri$es' Automation and otion' /919
1/J arian P% Ba,mier)o&s)i et al%' .urrent .ontrol Techniues for Three-Phase
Volta#e-Source PW .on$erters5 A Sur$eyM' IEEE Transactions on industrial electronics'
$ol% : 2* AT;E0S'
epartment of Electrical and .omputer En#ineerin#
1:J Brishna' Predicti$e .urrent .ontroller for a +rid .onnected Three Le$el In$erter &ith
eacti$e Po&er .ontrolM' i$ision of Electricity' (ppsala (ni$ersity' /919
1
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/9J Infineon' PW for A.IM' Published by Infineon Technolo#ies A+ 31=/? \nchen'
+ermany' /99?
/1J A)ira 0abae et al%' A 0e& 0eutral-Point-.lamped PW In$erterM' IEEE Transactions on
Industry Applications' Vol% IA-1=' 0o% 2* .;I0A'
V2L% ?' 02% /' (0E /993
/8J Subrata B ondal et al%' Space Vector Pulse Width odulation of Three-Le$el In$erter
Extendin# 2peration Into 2$ermodulation e#ionM' IEEE Transactions on Po&erElectronics' Vol% 13' 0o% /' march /998
/:J %athna)umar et al%' MA 0e& Soft&are Implementation of Space Vector PWM'
epartment of Electrical En##' +o$ernment colle#e of Technolo#y' India' /99<
/