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AI00780B

12

A0-A11 Q0-Q7

VCC

M2732A

GVPP

E

VSS

8

Figure 1. Logic Diagram

M2732A

NMOS 32K (4K x 8) UV EPROM

FAST ACCESS TIME: 200ns

EXTENDEDTEMPERATURE RANGE

SINGLE 5V SUPPLY VOLTAGE

LOW STANDBY CURRENT: 35mA max

INPUTS and OUTPUTS TTL COMPATIBLEDURING READ and PROGRAM

COMPLETELYSTATIC

DESCRIPTION

The M2732A is a 32,768 bit UV erasable andelectrically programmable memory EPROM. It isorganized as 4,096 words by 8 bits. TheM2732Awith its single 5V power supplyand with an accesstimeof 200ns, is idealsuited forapplicationswherefast turn around and pattern experimentation oneimportant requirements.TheM2732Aishonsedin a 24pinWindow CeramicFrit-SealDual-in-Line package.The transparent lidallows theuser to exposethechip toultraviolet lightto erase the bit pattern. A new pattern can be thenwritten to the clerice by following the programmingprocedure.

A0 - A11 Address Inputs

Q0 - Q7 Data Outputs

E Chip Enable

GVPP Output Enable / Program Supply

VCC Supply Voltage

VSS Ground

Table 1. Signal Names

1

24

FDIP24W (F)

July 1994 1/9

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Q2VSS

A3

A0Q0Q1

A2A1

GVPP

Q5

A10E

Q3

A11

Q7Q6

Q4

A4

VCCA7

AI00781

M2732A

8

1234567

9101112

201918

171615

A6A5 A9

A8232221

1413

24

Figure 2. DIP Pin Connections

Symbol Parameter Value Unit

TA Ambient Operating Temperature grade 1grade6

0 to 7040 to 85 C

TBIAS Temperature Under Bias grade 1grade6

10 to 8050 to 95 C

TSTG Storage Temperature 65 to 125 C

VIO Input or Output Voltages 0.6 to 6 V

VCC Supply Voltage 0.6 to 6 V

VPP Program Supply Voltage 0.6 to 22 V

Note:Except for the rating Operating Temperature Range, stresses above those listed in the Table Absolute Maximum Ratings may causepermanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above thoseindicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extendedperiodsmay affectdevice reliability.Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.

Table 2. Absolute Maximum Ratings

DEVICE OPERATION

The six modes of operation for the M2732A arelisted in the Operating Modes Table. A single 5Vpower supply is required in the read mode. Allinputs are TTL level except for VPP.

Read Mode

The M2732A has two control functions, both ofwhich must be logically satisfied in order to obtaindata at the outputs. Chip Enable (E) is the powercontrol and should be used for device selection.Output Enable (G) is the output controland should

be used to gate data to the output pins, inde-pendent of device selection.

Assuming that the addresses are stable, addressaccess time (tAVAQ) is equal to the delay from E tooutput(tELQV). Data is availableat the outputsafterthefallingedge ofG, assumingthatE has been lowand the addresses have been stable for at leasttAVQV-tGLQV.

Standby Mode

The M2732A has a standby mode which reducesthe active power current by 70 %, from 125 mA to

35 mA. The M2732Ais placed in the standby modeby applying a TTL high signal to E input. When instandby mode, the outputsarein ahigh impedancestate, independentof the GVPP input.

Two Line Output Control

BecauseM2732Asareusuallyusedinlargermem-ory arrays, this product features a 2 line controlfunction which accommodates the use of multiplememory connection. The two line control functionallows:

a. the lowest possible memory power dissipation,

b. complete assurance that output bus contention

will not occur.To most efficiently use these two control lines, it isrecommendedthat E be decoded and used as theprimary device selecting function, while G shouldbemadea common connection to all devices inthearray and connected to the READ line from thesystem control bus.

This ensures that all deselected memory devicesare in their low power standby mode and that theoutput pins are only active when data is requiredfrom a particular memory device.

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Programming

Whendelivered, and aftereach erasure, all bits ofthe M2732Aare in the 1 state. Data is introducedby selectively programming 0s into the desiredbit locations. Although only 0s will be pro-grammed, both 1s and 0s can be presented inthe data word. The only way to change a 0 to a1 is by ultraviolet light erasure.

TheM2732Ais in the programmingmodewhen theGVPPinput is at 21V. A 0.1F capacitor must beplaced across GVPPand ground to suppress spu-rious voltage transients which may damage thedevice. The data to be programmed is applied, 8bits in parallel, to the data output pins. The levelsrequired for the address and data inputs are TTL.

When the address and data are stable, a 50ms,active low, TTL program pulse is applied to the E

input. A program pulse must be applied at eachaddress location to be programmed. Any locationcanbeprogrammedat anytime- either individually,sequentially, or at random. The program pulse hasa maximumwidth of 55ms. The M2732Amust notbe programmed with a DC signal applied to the Einput.

Programming of multiple M2732As in parallelwiththe same data can be easily accomplished due tothe simplicity of the programming requirements.Inputs of the paralleled M2732As may be con-nected together when they are programmed withthe same data. A low level TTLpulse applied to the

E input programs the paralleled 2732As.Program Inhibit

Programming of multiple M2732As in parallelwithdifferent data is also easily accomplished. Exceptfor E, all like inputs (including GVPP) of the parallelM2732As may be common. A TTL level program

pulse applied to a M2732As E input with GVPP at21V will programthat M2732A. Ahigh level E inputinhibits the other M2732As from being pro-grammed.

Program Verify

A verify should be performed on the programmedbits to determine that they were correctly pro-grammed. The verify is carried out with GVPPandE at VIL.

ERASURE OPERATION

The erasure characteristics of the M2732A aresuch that erasure begins when the cells are ex-posed to light with wavelengths shorter than ap-proximately4000. It should benotedthat sunlightand certain types of fluorescent lampshave wave-lengths in the3000-4000range.Research shows

that constant exposure to room level fluorescentlighting could erase a typical M2732A in approxi-mately 3 years, while it would take approximately1 week to cause erasure when exposed to thedirect sunlight. If the M2732A is to be exposed tothese types of lighting conditions for extended pe-riods of time, it is suggestedthat opaque labelsbeput over the M2732A window to prevent uninten-tional erasure.

The recommended erasure procedure for theM2732A is exposure to shortwave ultraviolet lightwhichhas a wavelength of 2537 . The integrateddose (i.e. UV intensityx exposure time) for erasure

should be a minimum of 15 W-sec/cm2

. The era-sure time with this dosage is approximately 15 to20 minutes using an ultraviolet lamp with 12000W/cm2 power rating. The M2732A should beplaced within 2.5 cm of the lamp tubes duringerasure. Some lamps have a filter on their tubeswhichshould be removed beforeerasure.

Mode E GVPP VCC Q0 - Q7

Read VIL VIL VCC Data Out

Program VILPulse VPP VCC Data In

Verify VIL VIL VCC Data Out

Program Inhibit VIH VPP VCC Hi-Z

Standby VIH X VCC Hi-Z

Note:X = VIHor VIL.

Table 3. Operating Modes

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AI00827

2.4V

0.45V

2.0V

0.8V

Figure 3. AC Testing Input Output Waveforms

Input Rise and Fall Times 20ns

Input Pulse Voltages 0.45V to 2.4V

Input and Output Timing Ref. Voltages 0.8V to 2.0V

AC MEASUREMENT CONDITIONS

AI00828

1.3V

OUT

CL= 100pF

CLincludesJIG capacitance

3.3k

1N914

DEVICEUNDERTEST

Figure 4. AC Testing Load Circuit

Note that Output Hi-Z is defined as the pointwhere datais no longer driven.

Symbol Parameter Test Condition Min Max Unit

CIN Input Capacitance (except GVPP) VIN= 0V 6 pF

CIN1 Input Capacitance (GVPP) VIN= 0V 20 pF

COUT Output Capacitance VOUT= 0V 12 pF

Note: 1. Sampled only, not 100% tested.

Table 4. Capacitance (1) (TA= 25 C, f = 1 MHz )

AI00782

tAXQX

tEHQZ

DATA OUT

A0-A11

E

G

Q0-Q7

tAVQV

tGHQZ

tGLQV

tELQV

VALID

Hi-Z

Figure 5. Read Mode AC Waveforms

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Symbol Alt Parameter Test

Condition

M2732A

Unit-2, -20 blank, -25 -3 -4

Min Max Min Max Min Max Min Max

tAVQV tACC Address Valid to

Output ValidE = VIL,G = VIL

200 250 300 450 ns

tELQV tCE Chip Enable Low to

Output Valid G = VIL 200 250 300 450 ns

tGLQV tOE Output Enable Low

to Output Valid E = VIL 100 100 150 150 ns

tEHQZ(2) tDF

Chip Enable High toOutput Hi-Z G = VIL 0 60 0 60 0 130 0 130 ns

tGHQZ(2) tDF

Output Enable Highto Output Hi-Z E = VIL 0 60 0 60 0 130 0 130 ns

tAXQX tOH Address Transition to

Output TransitionE = VIL,G = VIL

0 0 0 0 ns

Notes:1. VCCmust be applied simultaneouslywith or before VPPand removed simultaneously or after VPP.2. Sampled only, not 100% tested.

Table 6. Read Mode AC Characteristics (1)

(TA= 0 to 70 C or 40 to 85 C; VCC= 5V5% or 5V 10%; VPP= VCC)

Symbol Parameter Test Condition

Value

UnitMin Max

ILI Input Leakage Current 0 VIN VCC 10 A

ILO Output Leakage Current VOUT= VCC 10 A

ICC Supply Current E = VIL, G = VIL 125 mA

ICC1 Supply Current (Standby) E = VIH, G = VIL 35 mA

VIL Input Low Voltage 0.1 0.8 V

VIH Input High Voltage 2 VCC+ 1 V

VOL Output Low Voltage IOL= 2.1mA 0.45 V

VOH Output High Voltage IOH= 400A 2.4 V

Note: 1. VCCmust be appliedsimultaneously withor before VPPand removed simultaneously or after VPP.

Table 5. Read Mode DC Characteristics (1)

(TA= 0 to 70 C or 40 to 85 C; VCC= 5V5% or 5V10%;VPP= VCC)

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Symbol Parameter Test Condition Min Max Units

ILI InputLeakage Current VIL VINVIH 10 A

ICC Supply Current E = VIL, G = VIL 125 mA

IPP Program Current E = VIL, G = VPP 30 mA

VIL Input Low Voltage 0.1 0.8 V

VIH Input High Voltage 2 VCC+ 1 V

VOL Output Low Voltage IOL= 2.1mA 0.45 V

VOH Output High Voltage IOH= 400A 2.4 V

Note: 1. VCCmust be applied simultaneouslywith or before VPP and removed simultaneously or after VPP.

Table 7. Programming Mode DC Characteristics (1)

(TA= 25C; VCC= 5V5%; VPP= 21V0.5V)

Symbol Alt Parameter Test Condition Min Max Units

tAVEL tAS Address Valid to Chip Enable

Low 2 s

tQVEL tDS Input Valid to Chip Enable Low 2 s

tVPHEL tOES VPPHigh to Chip Enable Low 2 s

tVPL1VPL2 tPRT VPPRise Time 50 ns

tELEH tPW Chip Enable Program PulseWidth 45 55 ms

tEHQX tDH Chip Enable High to Input

Transition 2 s

tEHVPX tOEH Chip Enable High to VPP

Transition 2 s

tVPLEL tVR VPPLow to Chip Enable Low 2 s

tELQV tDV Chip Enable Low to Output

Valid E = VIL, G = VIL 1 s

tEHQZ tDF Chip Enable High to OutputHi-Z 0 130 ns

tEHAX tAH Chip Enable High to AddressTransition 0 ns

Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.

Table 8. Programming Mode AC Characteristics (1)

(TA= 25C; VCC= 5V5%; VPP= 21V 0.5V)

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AI00783

tVPLEL

PROGRAM

DATA IN

A0-A11

E

GVPP

Q0-Q7 DATA OUT

tAVEL

tQVEL

tVPHEL

tEHQX

tEHVPX

tELEH

tELQV

tEHAX

tEHQZ

VERIFY

VALID

Figure 6. Programming and VerifyModes AC Waveforms

Speed and VCCTolerance

-2 200 ns, 5V5%

blank 250 ns, 5V5%

-3 300 ns, 5V5%

-4 450 ns, 5V5%-20 200 ns, 5V10%

-25 250 ns, 5V10%

Package

F FDIP24W

Temperature Range

1 0 to 70 C

6 40 to 85C

Example: M2732A -2 F 1

ORDERING INFORMATION SCHEME

Foralistofavailableoptions(Speed,VCC Tolerance,Package,etc...) referto thecurrentMemoryShortformcatalogue.For further information on anyaspect of this device, please contact SGS-THOMSON Sales Office nearestto you.

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FDIPW-a

A2

A1

A

L

B1 B e1

DS

E1 E

N

1

CeA

e3

Symb mm inches

Typ Min Max Typ Min Max

A 5.71 0.225

A1 0.50 1.78 0.020 0.070

A2 3.90 5.08 0.154 0.200

B 0.40 0.55 0.016 0.022

B1 1.17 1.42 0.046 0.056

C 0.22 0.31 0.009 0.012

D 32.30 1.272

E 15.40 15.80 0.606 0.622

E1 13.05 13.36 0.514 0.526

e1 2.54 0.100

e3 27.94 1.100

eA 16.17 18.32 0.637 0.721

L 3.18 4.10 0.125 0.161

S 1.52 2.49 0.060 0.098

7.11 0.280

4 15 4 15

N 24 24

FDIP24W

Drawing is not to scale

FDIP24W - 24 pin Ceramic Frit-seal DIP, with window

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Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for theconsequences of use of such information nor for any infringementof patents or other rights of third parties which may result from its use. Nolicense is granted by implication or otherwise under any patent or patent rights ofSGS-THOMSON Microelectronics. Specifications mentionedin this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.SGS-THOMSON Microelectronics products are notauthorized for use as critical components in life support devices or systems without expresswritten approval of SGS-THOMSON Microelectronics.

1994 SGS-THOMSON Microelectronics - All Rights Reserved

SGS-THOMSON Microelectronics GROUP OF COMPANIESAustralia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -

Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.

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M2732A