46 • 2017 IEEE International Solid-State Circuits Conference

ISSCC 2017 / SESSION 2 / POWER AMPLIFIERS / 2.8

2.8 A Class-G Voltage-Mode Doherty Power Amplifier

Voravit Vorapipat, Cooper Levy, Peter Asbeck

University of California, San Diego, CA

In modern communication, wideband and high-spectral-efficiency modulationresults in high peak-to-average power ratio (PAPR), up to 8 to 10dB. Well-knownPA-efficiency-enhancement techniques, such as Doherty and outphasing, offerreduced efficiency improvement beyond 6dB back-off, limiting the efficiencyenhancement obtainable with high PAPR modulation. Recent works have shownthat a combination of different techniques [1-3] can result in improved efficiencywell beyond 6dB back-off. However, these combined techniques have come at acost of glitches due to mode-transitions, when power supply voltage or loadimpedance undergo large variations at critical power levels. In [1,2] switchingbetween power supply voltages causes significant glitches, which degrade theEVM and ACPR of the transmitted signal. In [1], reasonable EVM is achieved, byreducing the average output power so that power supply switching is lessfrequent. A “skipping window” technique is proposed in [3] to skip high-frequencymode-transitions reducing overall glitching. While this improves the ACPR, theefficiency is degraded since there is no enhancement during a skipped transition.

In this work, we demonstrate the combination of the voltage-mode Doherty (VMD)[4] and Class-G switched-capacitor power amplifier (SCPA) [5] techniques.Together, these techniques provide efficiency peaking at both 6 and 12dB back-off over a wide bandwidth without introducing the glitches present in previousworks. The Class-G VMD with integrated matching network achieves a PAE of24% and better than -32dB EVM for 256-QAM OFDM signals.

Figure 2.8.1 shows two Class-G SCPAs, which behave like RF voltage sources,connected across a transformer, forming the Class-G VMD structure. The SCPAis based on segmentation of a voltage mode Class-D RF power amplifier, in whichthe capacitor and a totem-pole driver are partitioned into small unit cells. When asub-set of unit cells is turned on, the output voltage is proportional to the numberof active unit cells [5]. By allowing the unit-cell totem-pole driver to independentlyoperate at either a full or half supply voltage (Fig. 2.8.2), high efficiency can beachieved when all unit cells operate at either of these conditions [5]. At full power,the two SCPAs drive the transformer in anti-phase at full amplitude, and theimpedance seen by each SCPA is 25Ω. As the unit cells of the peaking SCPA areturned off reducing its output amplitude, the impedance seen by the main SCPAstarts to increase until it reaches 50Ω. Here the peaking SCPA is completely off,providing efficiency peaking at 6dB back-off [4]. From 6-to-12dB back-off, theunit cells of the main PA transition one-by-one from full supply to half supply,gradually decreasing the main PA amplitude until all main PA unit cells operate athalf supply. With high impedance (50Ω) presented by the VMD, and a half supplyswing presented by the Class-G SCPA, efficiency peaking at 12dB back-off isachieved. As output power varies from zero to full power, the PA operation onlyinvolves mode-switching at the unit-cell level, thus avoiding large mode-switchingglitches present in previous works [1,2] associated with switching the supply forthe entire PA.

The implementation of the Class-G VMD is shown in Fig. 2.8.2. The SCPAs areimplemented with a polar architecture, and the phase-modulated RF (PMRF)inputs are the same for both main and peaking PAs. The amplitude-control word(ACW) independently controls the state of individual unit cells (“on” at full supply,“on” at half supply, or “off”) in each SCPA. A series-combined primary load-modulation transformer is used. This increases the output power by lowering theimpedance presented to the SCPAs, and fully utilizes the transformer structure atany power level to provide low insertion loss, especially at 6dB back-off and lower[4]. Using ACW control over unit cell operation as shown in Fig. 2.8.1, efficiencypeaking at both 6 and 12dB back-off is achieved. Figure 2.8.2 also shows theClass-G SCPA unit cell, composed of a pull-down network to ground, and twopull-up networks connected to full and half supply, respectively [5]. In a full-

supply mode, VinpF and Vinn are switching, providing a 2.4Vp-p square wave. VenH

prevents current flow from the 2.4V to 1.2V supply [5]. In a half-supply mode,VinpH and Vinn are switching, providing a 1.2Vp-p square wave. The unit-cellcapacitors are resonated with the transformer leakage inductance. This seriesresonance is followed by a parallel resonance of the transformer core inductanceand Cp. Together, the two resonances form an impedance-compensation network,resulting in wide bandwidth. The unit cells are segmented into 5b unary cells and4b binary cells. Since half supply is not used in the peak PA unit cells, the LSBunit cell of the main PA is discarded to maintain the same resolution (Fig. 2.8.1)in both PAs (9b effective resolution for each).

The PA is fabricated in 45nm CMOS SOI (Fig. 2.8.7). All transistors used in thedesign are thin-oxide with regular Vt. The chip is assembled on a PCB and itsoutput measured with a 50Ω GSG probe. Output loss is calibrated to the padswhere the probe is landed. The quoted PAE includes all power consumed on thechip, but excludes PMRF/Serial Data/ClkSer/ClkBB input powers since most ofthis power is consumed in the termination resistors. In an integrated solution,these input powers will be replaced by the power required to drive a fewminimum-size inverters, which is negligible compared to the output power of thisdesign. The CW measurement (Fig. 2.8.3) shows that the PA achieves peakpower/peak PAE/6dB PAE/12dB PAE of 25.3dBm/30.4%/25.3%/17.4% at 3.5GHz.This presents an improvement in PAE of 66%/129% at a 6dB/12dB back-off overa Class-B PA normalized to the same peak efficiency. The 1dB Psat bandwidth isgreater than 38% spanning from 2.9 to 4.3GHz while still maintaining high peakand back-off PAEs.

The PA is linearized by memoryless AM-AM and AM-PM look-up tables (LUTs),calibrated with a 30kHz amplitude modulation with 100% modulation index. Witha 10MHz 32-carrier 256-QAM OFDM signal and 8.2dB PAPR, the PA achieves17.1dBm Pavg, -40.1dB EVM, >45dBc ACPR and 21.4% PAE (Fig. 2.8.4), morethan a 1.8× improvement in efficiency compared to Class-B back-off. Theasymmetry of the close-in spectrum is due to the reconstruction filter in the RFvector signal generator, which leads to a distortion in a polar architecture. Thisfilter also limits the modulation bandwidth of the measurement setup to 10MHz.The chip should be able to support modulation bandwidths in excess of 80MHz,at which point the bandwidth would be limited by the 1:24 deserializer. In separatemeasurements, the average output power was varied to demonstrate the trade-off between PAE and EVM for this PA (Fig. 2.8.5). A summary of measurementresults and comparison with recent works is shown in Fig. 2.8.6.

This work demonstrates a CMOS power amplifier that achieves widebandefficiency peaking at both 6 and 12dB back-off without mode-transition glitches.This is evidenced by the excellent EVM that is achieved without backing off theoutput signal power. The absence of glitches allows the Class-G VMD to transmithigh PAPR modulation with high efficiency and excellent EVM using a simplememoryless LUT.

Acknowledgements:The authors would like to thank GlobalFoundries for circuit fabrication andIntegrand Software for use of an electromagnetics simulation tool (EMX).

References:[1] S. Hu, et al., "A Broadband CMOS Digital Power Amplifier with Hybrid Class-G Doherty Efficiency Enhancement," ISSCC, pp. 44-45, Feb. 2015.[2] P. Godoy, et al., "A 2.4-GHz, 27-dBm Asymmetric Multilevel Outphasing PowerAmplifier in 65-nm CMOS," IEEE JSSC, vol. 47, no. 10, pp. 2372-2384, Oct. 2012.[3] W. Tai, et al., "A Transformer-Combined 31.5 dBm Outphasing Power Amplifierin 45 nm LP CMOS With Dynamic Power Control for Back-Off Power EfficiencyEnhancement," IEEE JSSC, vol. 47, no. 7, pp. 1646-1658, July 2012.[4] V. Vorapipat, et al., "A wideband Voltage Mode Doherty Power Amplifier," IEEERFIC, pp. 266-269, May 2016.[5] S. M. Yoo, et al., "A Class-G Switched-Capacitor RF Power Amplifier," IEEEJSSC, vol. 48, no. 5, pp. 1212-1224, May 2013.

978-1-5090-3758-2/17/$31.00 ©2017 IEEE

47DIGEST OF TECHNICAL PAPERS •

ISSCC 2017 / February 6, 2017 / 4:30 PM

Figure 2.8.1: Class-G Voltage-Mode Doherty operation at 0/6/12dB back-off;idealized efficiency vs Pout; and unit-cell state table. Figure 2.8.2: Class-G Voltage-Mode Doherty implementation.

Figure 2.8.3: CW measurement results of output power and PAE.

Figure 2.8.5: PAE and EVM vs output power for a 10MHz 32-Carrier 256-QAMOFDM signal with nominal 8.2dB PAPR.

Figure 2.8.6: Summary of measurement results and comparison with previouslypublished CMOS PAs with greater than 6dB efficiency enhancement.

Figure 2.8.4: Measured spectrum and constellation of a 10MHz 32-Carrier 256-QAM OFDM signal with 8.2dB PAPR.

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Figure 2.8.7: Die micrograph (1.2mm×1mm).