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Sub-envelope modulation method to reduce totalharmonic distortion of AC/AC matrix converters

F.L. Luo and Z.Y. Pan

Abstract: An AC/AC matrix converter is an array of power semiconductor switches that connectsdirectly a three-phase AC source to another three-phase load. It can convert an AC power sourcewith certain voltage and frequency to another AC load with variable voltage and variablefrequency directly without a DC-link and bulk energy storage component. Classical modulationmethods such as the Venturini method and the space vector modulation method using AC-networkmaximum-envelope modulation, implement matrix conversion successfully. However, they alsocause very high total harmonic distortion (THD). A novel approach, the sub-envelope modu-lation (SEM) method, is presented to reduce THD of matrix converters effectively. The approachis extended to an improved version of matrix converters and the THD can be reduced further.The algorithm of the SEM method is described in detail. Simulation and experimental resultsare also presented to verify the feasibility of the SEM approach. The results will be very helpfulfor industry applications.

1 Introduction

An AC/AC matrix converter [1–3] is an array of powersemiconductor switches that connects directly a three-phaseAC source to another three-phase load. This converter hasseveral attractive features that have been investigated inrecent decades. It can convert an AC power source withcertain voltage and frequency to another AC load withvariable voltage and variable frequency directly withouta DC-link and bulk energy storage component. It eliminates

large energy storage components, i.e. bulk inductor orelectrolytic capacitors. The structure of a classical 3 Â 3matrix converter is shown in Fig. 1. The semiconductorswitches are marked S Jk , which means the switch isconnected between input phase J and output phase k ,where J ¼ {A, B , C }, k ¼ {a, b, c}.

All the switches S Jk in the matrix converters require abidirectional-switch capability of blocking voltage andconducting current in both directions. Unfortunately, thereare no such devices available now, so discrete devices needto be used to construct suitable switch cells. One optionis the diode bridge bidirectional switch cell arrange-ment, which consists of an insulated gate bipolar transistor

(IGBT) (or other full control power semiconductorswitches) at the centre of a single-phase diode bridge [4].The main advantage is that both current directions arecarried by the same switching device, therefore, only onegate driver is required per switch cell. Device power lossesare relatively high since there are three devices in eachconduction path. The current direction through the switchcell cannot be controlled. This is a disadvantage since many

advanced commutation methods require the current direc-tion of the switch cell to be controllable.

The common emitter bidirectional switch cell arrange-ment consists of two IGBTs, and another scheme is twodiodes. The diodes provide the reverse blocking capability.There are several advantages using this arrangement whencompared to the diode bridge bidirectional switch cell. First,it is possible to control the current direction independently.Secondly, conduction power losses are also reduced sinceonly two devices carry the current. Thirdly, each bidirec-

tional switch cell requires an isolated power supply for thegate drive. The switch cell can be connected in commoncollector mode. The conduction power losses are thesame as that of the common emitter configuration. Anoften-quoted advantage of this method is that onlysix isolated power supplies are needed to supply the gatedriver [5]. Therefore, the common collector configurationis generally preferred for creating the matrix converterbidirectional switch cells.

Normally, the matrix converter is fed by a three-phasevoltage source and, for this reason, the input terminals

Fig. 1 Structure of conventional matrix converterE-mail: [email protected]

The authors are with the School of Electrical and Electronic Engineering,Nanyang Technological University, Block S1-B1c-108, Nanyang Avenue,Singapore 639798

r The Institution of Engineering and Technology 2006

IEE Proceedings online no. 20060015

doi:10.1049/ip-epa:20060015

Paper first received 21st December 2005 and in final revised form 31st May 2006

856 IEE Proc.-Electr. Power Appl., Vol. 153, No. 6, November 2006



2.1 Measurement of input instantaneous voltage It is required to know the instantaneous phase voltage of the AC supply. One approach is to measure the inputvoltage with three voltage sensors, as shown in Fig. 4a.

If the AC supply is a balanced pure sinusoidal supply, onesimple approach to get the instantaneous phase voltageis applicable, i.e. calculating the input voltage in real time.

If the magnitude and timebase of the three-phase supply areknown, the instantaneous phase voltage can be determined.Thus a three-phase transformer and a rectifier are adopted.The turns ratio of the transformer is n : 1. The adoption of a transformer is to isolate the control circuit from the power

stage. The scaled DC-link voltage V dc/n can be obtained bya small rate rectifier and an electrolytic capacitor. To obtainthe timebase, a comparator is introduced. The input of the

Fig. 4 Structure of matrix converter with SEM drive systema Structure with nine cells

b Structure with 12 cells

c Output of the comparator




comparator can be either of two input phases (such as phaseA and phase B). At the falling edge of vcom (such as t1),the instantaneous phase voltage of the AC supply can beobtained:

v Aðt 1Þ ¼ V m sinÀ

5p=6Á

v Bðt 1Þ ¼ V m sinÀp=6

ÁvC ðt 1Þ ¼ V m sin

ÀÀ p=2Á9>>=>>; ð1Þ

where V m

¼pV dc=3 ffiffiffi3

p and V dc is the imaginary DC-link

voltage. The frequency of AC power supply is called f i andthe angular frequency oi ¼ 2pf i. Redefining the initial timethe instantaneous input voltage during one cycle (1/ f i ¼ T i )can be expressed as:

v Aðt Þ ¼ pV dc3 ffiffi

3p sin

Àoit þ 5p

6

Áv Bðt Þ ¼ pV dc

3 ffiffi

3p sin

Àoit þ p

6

ÁvC ðt Þ ¼ pV dc

3 ffiffi

3p sin

Àoit À p

2

Á

9>>>>=>>>>;

ð2Þ

In a discrete system with sampling frequency f (samplingtime T ), the voltage sequence of the AC power supply canbe obtained from (2):

v AðkT Þ ¼ pV dc3 ffiffi

3p sin

ÀoikT þ 5p

6

Áv BðkT Þ ¼ pV dc

3 ffiffi

3p sin

ÀoikT þ p

6

ÁvC ðkT Þ ¼ pV dc

3 ffiffi

3p sin

ÀoikT À p

2

Á

9>>>>=>>>>;

ð3Þ

With the help of signal vcom, the voltage sequence of the ACpower supply can be calculated rigorously without erroraccumulation.

2.2 Modulation algorithmAn SEM example (only va is illustrated) is shown in Fig. 5a.

The output is modulated between the two most adjacentinput phases. The modulation rule of the example is given inTable 1. vhigh is the smallest voltage that is greater than vra(vra is reference voltage of output phase a), vlow is the largestone that is less than vra, i.e.

vhigh ¼ minfvijvi4vrag; i ¼ a; b; c

vlow ¼ maxfvijviovrag; i ¼ a; b; c

)ð4Þ

Then output phase a is connected to the two most adjacentphases alternately and the duty cycle of PWM d can bedetermined:

d

¼

va À vlow

vhigh À vlow ð5

ÞAssume that the output frequency is f o, the magnitude of the reference output phase voltage is V o, the angularfrequency oo ¼ 2pf o, and the initial phase angle is f0.The PWM switching frequency is f and the period is T .The modulation algorithm of the system can be accom-plished by:

Algorithm 1

Define the variables hi , ho, and set their initial values tozero, i.e.

hi ¼ 0; ho ¼ 0

Define array vi [3] to store input phase voltage;Define array order[3] to map vi to the input phase, andinitialise the array with {1, 2, 3} representing {A, B , C };

Do nothing until the first falling edge of the signal vcomcomes. When the first falling edge comes, for every PWM

Fig. 5 Maximum voltage ratio with and without common-modevoltagea SEM waveforms for nine-switch cells matrix converter

b Maximum voltage ratio of 50% without common-mode voltage

c Maximum voltage ratio of 87% with common-mode voltage

Table 1: SEM rule of example in Fig. 5a

Time –t 1 t 1–t 2 t 2–t 3 t 3–t 4 t 4–t 5 t 5–t 6 t 6–t 7

Modulation

phase

v high v A v C v A v A v B v A v B

v low v B v B v C v B v C v C v A

Time t 7–t 8 t 8–t 9 t 9–t 10 t 10–t 11 t 11–t 12 t 12–t 13 t 13–

Modulation

phase

v high v B v C v B v C v C v A v C

v low v C v A v A v B v A v B v B

IEE Proc.-Electr. Power Appl., Vol. 153, No. 6, November 2006 859



cycle T , do the following loop:

(a) Calculate AC power supply voltage vi [1] ¼ vA(kT ),vi [2] ¼ vB (kT ), vi [3] vc (kT ) according to (3):

vi½1 ¼ v AðkT Þ ¼ V m sinðyi þ 5p=6Þvi½2 ¼ v BðkT Þ ¼ V m sinðyi þ p=6Þvi½3 ¼ vC ðkT Þ ¼ V m sinðyi À p=2Þ

9>>=>>; ð6Þ

where V m¼pV dc=3 ffiffiffi3p

is the magnitude of input phase

voltage which is measured from the transformer. If the ACpower supply is measured by three voltage sensors, this stepcan be ignored.

(b) Sort the voltages vi [1], vi [2], vi [3] in descending order:

(i) If vi [1]ovi [2], then exchange vi [1] and vi [2], alsoexchange order[1] and order[2]; else do nothing;

(ii) If vi [1]o vi [3], then exchange vi [1] and vi [3], alsoexchange order[1] and order[3]; else do nothing;

(iii) If vi [2]ovi [3], then exchange vi [2] and vi [3], alsoexchange order[2] and order[3]; else do nothing;

Thus the condition vi [1]Z vi [2]Z vi [3] is satisfied, then

the variable order will also map the input phases.

(c) Calculate three output voltage va, vb, vc using thefollowing equation:

va ¼ V o sinðyo þ f0Þvb ¼ V o sinðyo À 2p=3 þ f0Þvc ¼ V o sinðyo À 4p=3 þ f0Þ

9>=>; ð7Þ

where V o is the magnitude of reference output phasevoltage, f0 is the initial phase angle.

(d ) For the value of va do the following:

(i) If vaZv

i [2], it means that va is betweenvi [1] andvi [2], then output phase a is modulated between

input phase order[1] and order[2], and the PWM dutycycle d is

d ¼ va À vi½2vi½1 À vi½2 ð8Þ

(ii) Else means that va is between vi [2] and vi [3], thenoutput phase a is modulated between input phaseorder[2] and order[3], and PWM duty cycle d is

d ¼ va À vi½3vi½2 À vi½3 ð9Þ

(e) Do a similar procedure as (d ) for vb and vc.

( f ) Increase hi by oiT .

(g) Add ho with ooT , if ho is greater than 2p, then subtract2p from ho.

(h) Wait for the next PWM cycle and repeat (a)–(g).

Meanwhile, if falling edge of the signal vcom comes, setvariable hi to zero.

2.3 Improvement of voltage ratio Assume that the input AC supply phase voltage is:

v A

ðt

Þ ¼V m sin

ðoit

Þv Bðt Þ ¼ V m sinðoit À 2p=3ÞvC ðt Þ ¼ V m sinðoit À 4p=3Þ

9>=>; ð10Þ

The output phase voltage is:

vaðt Þ ¼ qV m sinðoot Þvbðt Þ ¼ qV m sinðoot À 2p=3Þvcðt Þ ¼ qV m sinðoot À 4p=3Þ

9>=>; ð11Þ

where q is the voltage ratio of the output voltage (voltagetransfer gain, usually qo1). The direct phase voltagemodulation from (11) has a maximum voltage ratio of 50%, as shown in Fig. 5b. An improvement in voltage ratio

to ffiffiffi3p =2 (or 87%) is possible [15, 16] by adding common-

mode voltages to the target outputs as

vaðt Þ ¼ qV m sinðoot Þ þ sinð3oot Þ6

À sinð3oit Þ2 ffiffiffi

3p

!

vbðt Þ ¼ qV m sinðoot À 2p=3Þ þ sinð3oot Þ6


3p

!

vcðt Þ ¼ qV m sinðoot À 4p=3Þ þ sinð3oot Þ6


3p

!

9>>>>>>>=>>>>>>>;

ð12ÞThe common-mode voltages have no effect on the outputline-to-line voltages, but allow the target outputs to fitwithin the input voltage envelope with a value of up to

87%, as shown in Fig. 5c.The improvement in voltage ratio is achieved by

redistributing the null output states of the converter (alloutput lines connected to the same input line) and is ana-logous to the similar well-established technique in conven-tional DC-link PWM converters. It should be noted that avoltage ratio of 87% is the intrinsic maximum for anymodulation method. Venturini provides a rigorous proof of this fact in [14] and [15].

To increase the voltage ratio, (7) in Algorithm 1 shouldbe changed to

vco ¼ sinð3yoÞ=6 À sinð3yiÞ=2

ffiffiffi3

p

va ¼ V o½sinðyo þ f0Þ þ vcovb ¼ V o½sinðyo À 2p=3 þ f0Þ þ vcovc ¼ V o½sinðyo À 4p=3 þ f0Þ þ vco

9>>>=>>>; ð13Þ

2.4 24-switch matrix converter From Fig. 5a, if the reference voltage is greater than zeroand the three-phase four-wire supply system is available,the output is modulated between two positive phases orneutral point and one positive phase, and the THD canthen be further reduced. The structure of a 24-switch matrixconverter is shown in Fig. 4b. The modulation is shownin Fig. 6. The modulation rule of the example is shown in

Fig. 6 SEM waveforms for 12-switch cell matrix converter




Table 2. The modulation algorithm is similar to Algorithm 1except for procedure (d ).

Algorithm 2

Define the variable hi ,ho, and set their initial value tozero, i.e.

hi ¼ 0 ho ¼ 0

Define array vi [3] to store input phase voltage;

Define array order[3] to map vi to the input phase, andinitialise the array with {1, 2, 3}, representing {A, B , C };

Define variables vhigh and vlow to store the voltages that havebeen modulated;

Do nothing until the first falling edge of the signal vcomcomes. When the first falling edge comes, for every PWMcycle T , do the following loop:

(a), (b) and (c) are the same as those in Algorithm 1.

(d ) For the value of va do the following:

(i) If vaZvi [2], it means that va is between vi [1] and vi [2],then store the vi [1] to vhigh, store vi [2] to vlow.

(ii) Else means that va is between vi [2] and vi [3], thenstore the vi [2] to vhigh, store vi [3] to vlow.

(iii) If va40 and vlowo0, then store the vlow with zero. Itmeans that va is modulated between neutral point andlower positive phase which is higher than va.

(iv) Else do nothing. It means that va is modulatedbetween two positive phases.

(v) If vao0 and vhigh40, then store the vhigh with zero.It means that va is modulated between neutral point onehigher negative phase which is lower than va.

Table 2: Modulation rule of example in Fig. 6 of 24-switchmatrix converter

Time –t 1 t 1–t 2 t 2–t 3 t 3–t 4 t 4–t 5 t 5–t 6 t 6–t 7

Modulation

phase

v high v A v C v A v A 0 v A 0

v low 0 0 v C 0 v C v C v A

Time t 7–t 8 t 8–t 9 t 9–t 10 t 10–t 11 t 11–t 12 t 12–

Modulation

phase

v high 0 v C v B v C v C 0

v low v C 0 0 v B 0 v B

Fig. 7 Simulations results with enhance ratio modulationa Phase voltage with modulation I

b Phase voltage with modulation II

c Phase voltage with modulation III

d Line–line voltage with modulation I

e Line–line voltage with modulation II

f Line–line voltage with modulation III

g FFT Fig. 7d (THD 43.4%)

h FFT Fig. 7e (THD 23.6%)

i FFT Fig. 7 f (THD 15.8%)




(vi) Else do nothing. It means that va is modulatedbetween two negative phases.

(vii) Calculate the PWM duty cycle d

d ¼ va À vlow

vhigh À vlowð14Þ

(e), ( f ), (g) and (h) are also the same as those in Algorithm 1.

3 Simulation and experimental results

The simulation and experimental results are based on three-phase voltage modulation methods:

Modulation I: maximum envelop modulation forconventional nine-switch cell matrix converter.

Modulation II: SEM method for conventional nine-switch cell matrix converter.

Modulation III: SEM method for 12-switch cell matrixconverter.

With improved modulation ratio, the voltage ratio canreach about 87%. The simulation results of the phasevoltage, line–line voltage and FFT of the line–line voltagewith modulation I–III are shown in Fig. 7. The inputphase voltage is 240 V (RMS value, the same for thefollowing), frequency is 50Hz; output phase voltage is207V, frequency 100 Hz. Switching frequency is 2 kHz. TheTHDs under the three different modulation methods are43.4, 23.6 and 15.8%, respectively. The simulation result of THD as a function of modulation index with modulationmethods I–III (output frequency 130 Hz) is shown in Fig. 8.

To verify the feasibility of the proposed scheme, a12-switch cell matrix converter was built. The modulationalgorithm was implemented by a DSP TMS320F2407,

which is specialy designed for power electronics and electricdrives. The digital-signal-processor (DSP) comprises dual10-bits 16-channel analogue-to-digital converter (ADC),PWM generator, digital I/O and other modules. So theDSP can measure input voltages, generate three requiredPWM signals for three output phases and indicate toa peripheral circuit which phases are to be modulated. Theperipheral circuit is to generate gate signal for matrixconverter (include current commutation), which is built upby GAL PLD, logic gate, monostable flip–flops and so on.A 15A/1200V 1MBH15-120 IGBT was adopted as themain switch. A photo-coupled gate driver, TLP250, wasused to implement the gate drive circuit. This gate driverprovides a peak output current of 1.5A. It also isolates theinput signal from the output and thus common-mode noiseis reduced.

Fig. 8 Simulation result of THD against modulation index

Fig. 9 Experimental waveforms of output line–line voltage (top, 400 V/div.), phase current (middle, 8 A/div.) and FFT of line-line voltage(bottom, 20 dB/div., 5 kHz/div.) under various modulation methodsa Modulation method I (output frequency 130Hz; line–line voltage 360V; THD 38.5%)

b Modulation method II (output frequency 130Hz; line–line voltage 360V; THD 18.8%)

c Modulation method III (output frequency 130Hz; line–line voltage 360V; THD 14.3%)

d Modulation method III (output frequency 35Hz; line–line voltage 252V; THD 12.9%)




The phase voltage of the AC power supply is 240 V,line–line voltage is around 415V, and frequency f i is 50Hz.Switching frequency f is 10kHz. Modulation methodsI–III can be implemented by the same hardware only bychanging the software of the DSP. A 2.2kW three-phaseinduction motor was connected to the output of the matrix

converter as load. Experimental waveforms of outputline–line voltage, phase current of the induction motorand FFT of the line–line voltage under modulation methodsI–III are shown in Fig. 9. All the voltage signals aremeasured by a differential probe with a gain of 20,the voltage scale is 400V/div., current scale is 8 A/div., themagnitude scale of the FFT waveform is 20dB/div.,frequency scale is 5 kHz/div. Figure 9a shows the resultsimplementing modulation I with THD ¼ 38.5%, output

frequency f O is 130 Hz, the voltage ratio d is ffiffiffi

3p

=2, and themagnitude of the output line–line voltage is 360V. Theexperimental results implementing modulation II and IIIwith the same frequency and magnitude are shown in Fig. 9b

with THD ¼ 18.8% and Fig. 9c with THD ¼ 14.3%,respectively. From the Figures we can see that the outputunder the SEM method has lower THD than that of themaximum envelope modulation. If the method is applied tothe 12-switch cells matrix converter, the THD can be furtherreduced. Figure 9 d with THD¼ 12.9% is also withmodulation III, output frequency is 35Hz, and the

magnitude of the line–line voltage is 252V. Experimentalwaveforms of input line current (phases A and B) and theirFFT under modulation I with THD ¼ 32.9% and modula-tion III with THD¼ 12.2% are shown in Fig. 10. The THDof input line current with modulation III is also reduced.

4 Conclusions

AC/AC matrix converters have been popular since the1980s. Unfortunately, classical modulation methods,

such as the Venturini method and the SVM method usingAC-network maximum-envelope modulation, cause veryhigh THD. A novel approach, the SEM method forconventional nine-switch cell matrix converter, has beensuccessfully created. The corresponding THD is reducedsignificantly. The approach has been extended to the12-switch cell matrix converter and the THD can be furtherreduced. The modulation algorithm has been described indetail. Simulation and experimental results have also beenpresented to verify the feasibility of this novel modulationapproach. The results will be very helpful in industryapplications.

5 References

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5 Wheeler, P., and Grant, D.: ‘Optimized input filter design and low lossswitching techniques for a practical matrix converter’, IEE Proc.Electr. Power Appl., 1997, 144, (1), pp. 53–60

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11 Kwon, B.H., Min, B.H., and Kim, J.H.: ‘Novel commutationtechnique of AC–AC converters’, IEE Proc., Electr. Power Appl.,1998, 145, pp. 295–300

12 Pan, C.T., Chen, T.C., and Shieh, J.J.: ‘A zero switching loss matrix

converter’. Proc. IEEE PESC, 1993, pp. 545–55013 Villa-ca, M.M.V., and Perin, A.J.: ‘A soft switched direct frequencychanger’. Conf. Rec. IEEE-IAS Annual Meeting, 1995, pp. 2321–2326

14 Alesina, A., and Venturini, M.: ‘Intrinsic amplitude limits andoptimum design of 9-switches direct PWM AC–AC converters’. Proc.IEEE PESC, 1988, pp. 1284–1291

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Fig. 10 Experimental waveforms of input line current (top, 8 A/div.)and FFT of line current (bottom, 20 dB/div., 5 kHz/div.) undermodulation I and III a Modulation method I, THD 32.9%

b Modulation method III, THD 12.2%


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