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### Transcript of 15790 Flip Flops

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Sequential Circuits: Flip flops

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Overview

Latches respond to trigger levels on control inputs

Example: If G = 1, input reflected at output

Difficult to precisely time when to store data withlatches

Latches are asynchronous, which means that the

output changes very soon after the input changes. A flip-flopis a synchronous version of the latch.

Flip flips store data on a rising or falling trigger edge. Example: control input transitions from 0 -> 1, data input appears at

output Data remains stable in the flip flop until until next rising edge.

Different types of flip flops serve different functions

Flip flops can be defined with characteristic functions.

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D Latch

Q

Q

C

D S

R

S

R

S R C Q Q

0 0 1 Q0 Q0 Store

0 1 1 0 1 Reset

1 0 1 1 0 Set

1 1 1 1 1 DisallowedX X 0 Q0 Q0 Store

0 1 0 1

1 1 1 0

X 0 Q0

Q0

D C Q Q

When C is high, D passes from input to output (Q)

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Clocking Event

Lo-Hi edgeHi-Lo edge

What if the output only changed on a Ctransition?

C

D Q

Q

0 0 11 1 0

X 0 Q0 Q0

D C Q Q

Positive edge triggered

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Master-Slave D Flip Flop

Consider two latches combined together

Only one Cvalue active at a time Output changes on falling edge of the clock

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D Flip-Flop

D gets latched to Q on the rising edge of the clock.

Stores a value on the positive edge of C

Input changes at other times have no effect on output

C

D Q

Q

0 0 1

1 1 0

X 0 Q0 Q0

D C Q Q

Positive edge triggered

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Clocked D Flip-Flop

Stores a value on the positive edge of C

Input changes at other times have no effect on output

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Positive and Negative Edge D Flip-Flop

D flops can be triggered on positive or negative edge

Bubble before Clock (C)input indicates negative edgetrigger

Lo-Hi edge Hi-Lo edge

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Positive Edge-Triggered J-K Flip-Flop

0 0 Q0 Q00 1 0 1

1 0 1 0

1 1 TOGGLE

QJ QCLKKCreated from D flop

J sets

K resets

J=K=1 -> invert output

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Clocked J-K Flip Flop

Two data inputs, J and K

J -> set, K -> reset, if J=K=1 then toggle output

Characteristic Table

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Positive Edge-Triggered T Flip-Flop

0 Q0 Q0

1 TOGGLE

Q QCTCreated from D flop

T=0 -> keep current

K resets

T=1 -> invert current

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Asynchronous Inputs

J, K are synchronous inputs

o Effects on the output are synchronized with the CLKinput.

Asynchronous inputs operate independently of the synchronousinputs and clock

o Set the FF to 1/0 states at any time.

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Asynchronous Inputs

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Asynchronous Inputs

Note reset signal (R) forD flip flop

If R = 0, the output Q iscleared

This event can occur atany time, regardless of thevalue of the CLK

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Parallel Data Transfer

Flip flops store outputs from combinational logic

Multiple flops can store a collection of data

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Summary

Flip flops are powerful storage elements They can be constructed from gates and latches!

D flip flop is simplest and most widely used

Asynchronous inputs allow for clearing and presettingthe flip flop output

Multiple flops allow for data storage The basis of computer memory!

Combine storage and logic to make a computationcircuit

Next time: Analyzing sequential circuits.