1 Platform-Based Design: Part 3, Applications Wayne Wolf Princeton University.

30
1 Platform-Based Design: Part 3, Applications Wayne Wolf Princeton University
  • date post

    21-Dec-2015
  • Category

    Documents

  • view

    227
  • download

    3

Transcript of 1 Platform-Based Design: Part 3, Applications Wayne Wolf Princeton University.

1

Platform-Based Design: Part 3, Applications

Wayne Wolf Princeton University

2

Outline

Challenges in platform design.Example systems/platforms:

generic; set-top box; printers; wireless; network processors.

3

Mapping an application to a platform

System topology.Processing element types.Communication channel types.Software services.

4

How many processing elements?

Why not one big CPU? Depends on real-time requirements.

Tight deadlines are incompatible with multitasking. May be CPU or hardwired unit.

Similarly, tight communication deadlines discourage shared communication links.

5

Reasons for a dedicated unit

No shared unit is fast enough.Limits on reliable scheduling:

RMS utilization asymptotically approaches 69%.

Overhead effects: RTOS context switching; cache thrashing.

6

What types of processing elements?

Hardwired vs. programmable: look for algorithms that can be mapped

very efficiently.What type of programmable CPU:

chip vendor selection usually limits choice;

maximum parallelism.

7

CPUs vs. accelerators

CPU speedups should obey n% rule on entire application.

Accelerator speedups must consider n% rule, communication overhead.

CPU accel

new instruction?

accelerated operation?

8

Multithreading is important

High performance from accelerators requires multithreading: stalling units throws away a great deal

of performance.

CPU

accel

9

What type of memory system?

Cache: size, # sets, block size.

On-chip main memory: amount, type, banking, network to PEs.

Off-chip main memory: type, organization.

10

RTOS

Software and platforms

Many vendors supply APIs and libraries.

Long-term goal: custom optimization tools. hardware

BIOS

libraries

applications

11

PC-based platform

Basic hardware components: CPU; memory; timers; DMA; minimal I/O devices.

Basic software: BIOS.

12

PC-style hardware architecture

CPU

system bus

memory

DMAcontroller

timers

businterface

brid

ge

high-speed bus

low-speed bus

I/O

I/O

13

Strong ARM

StrongARM system includes: CPU chip (3.686 MHz clock) system control module (32.768 kHz

clock).• Real-time clock;• operating system timer• general-purpose I/O;• interrupt controller;• power manager controller;• reset controller.

14

Pros and cons

Plentiful hardware options.Simple programming semantics.Good software development

environments.Performance-limited.

15

Apple Newton hardware architecture

ARM 610 ROM RAM

RuntASIC

LCD

speaker

serial I/F

A/D

tablet

PCMCIA

infrared

Design Automation for Embedded Systems

16

Motorola Envoy hardware architecture

PCMCIA 1 MB DRAM 4 MB flash

AstrosystemASIC

68439CPU

audio

modem

infrared

power supply

A/Dtouchscreen

Magicbus

Design Automation for Embedded Systems

17

InfoPad hardware architecture

Wireless networkinterface

Speechcodec

Videodecompressor

ARM 60

display

Keyboard/pointer

other I/O

IEEE Trans. Computers

18

Hardware vs. software

Special-purpose hardware often consumes much less power.

Need to think about communication between units, multiprocessing.

Accelerators often require limits on parameters. May be OK if standards limit

parameters.

19

Philips set-top box hardware architecture

Networkinterface

MPEGdemux

MPEGaudio

MPEGvideo

NTSCCD-I

graphicsPCMCIA

DRAM

I/O

NVRAM

DRAM

DRAM

Philips journal

20

Customized processors

Tensilica synthesizes custom processor, associated software.

http://www.tensilica.com/technology.html

21

Printers

High-speed vs. low-cost: uniprocessor vs. multiprocessor

hardware? multiprocessor requires more complex

software.

22

The printing process

page descriptionlanguage

rasterizer

raster memory

printercontroller

printer

23

HP PPA printer controller

Controller ASIC68EC000 ROM

P IF

data path

motor ctrl

carriage pos

SRAM

DRAM

I/Oconnector

motorsASIC

encoder

printcartridgeASIC

mask ROM

flash

HP JournalJune 1997

24

HP DesignJet hardware architecture

i960KAi960

components

proc.supportASIC

penctrl

ASIC

swathRAM

servoproc.

(8052)

EEPROM

DRAMctrlfront panel stepper

motor

carriagePC board

swath generation

drawing

parsing and rasterization

25

TI Open Multimedia Applications Platform

Dual-processor shared memory system:

GPPOS

DSPmanager

General-purposeprocessor

DSP

DSPOS

DSPtask

& I/Octrl

bridge

Memctrl

external memory

http://www.ti.com/sc/docs/apps/wireless/omap/overview.htm

26

Wireless handset

Generic handset (TI):http://www.ti.com/sc/docs/psheets/diagrams/gdgradio.htm

27

ADI ADSL engine

Bus-based multiprocessor (ADI):

http://www.analog.com/industry/signal_chains/auto/communications/comms_1.html

28

Agere StarPro platform

http://www.lucent.com/micro/starpro/arch.html

29

C-Port C5 network processor

HDLCengine

HDLCengine

Memoryctrl

… (16 total)

to mem

toframer

600 Mbps

RISCexecutivecontroller

fabricprocessor

to ATM

otherchannel processors

http://www.cportcorp.com/products/digital.htm

30

Summary

Consider system requirements to select system architectures.

Multiprocessors rule high-performance applications. Co-processors can be important for low-

power applications.