[1] Novel Zero Voltage Transition PWM Flyback Converter 2008H0065 05 TETN-2009-0430
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Transcript of [1] Novel Zero Voltage Transition PWM Flyback Converter 2008H0065 05 TETN-2009-0430
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Novel Zero Voltage Transition PWM Flyback Converter
Journal: International Journal of Electronics
Manuscript ID: TETN-2009-0430
Manuscript Type: Long Paper
Date Submitted by the Author:
02-Nov-2009
Complete List of Authors: adib, ehsan; Isfahan University of Technology farzanehfard, hosein; Isfahan University of Technology
Keywords: Power Electronics, Zero Voltage Switching, Flyback Converter, Pulse Width Modulation, DC-DC Power Conversion
URL: http:/mc.manuscriptcentral.com/intjelectron Email: [email protected]
International Journal of Electronics
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Novel Zero Voltage Transition PWM Flyback Converter
Ehsan Adib, Hosein farzanehfard
[email protected], [email protected]
Department of Electrical and Computer Engineering, Isfahan University of Technology, Isfahan, Iran
Corresponding Author: Ehsan Adib Submission date: April, 15th, 2008
Area of research: Power Electronics
“The authors would sincerely like to thank the reviewers for their precise review. The reviewers comments along with
details revisions made are as following:
Reviewer: 1
Comments to the Author
The authors should perform a more detailed bibliography review comparing the proposed soft switching scheme with
other ones existent in literature, highlighting the advantages and disadvantages of the cell introduced in the paper.
Clearly state the reasons that justify the use of the cell?
Answer: the introduction is now revised and the proposed converter is compared with other existing techniques in
details.
The theoretical waveform of the voltage across capacitor Cs must be presented in Fig. 3 so that the analysis performed
in Section 2 can be better understood by the reader.
Answer: the mentioned voltage waveform is added now in Fig. 3.
In Section 3, the authors state that it is quite complex to solve equations (13) to (15). Some issues regarding the
behavior of the resonant elements in the circuit operation are discussed. However, a detailed example showing how the
resonant elements in Fig. 4 were actually designed has not been presented. Besides, the example must include the
design of all circuit elements, and not only those regarding the resonant tank.
Answer: the design considerations for the auxiliary circuit elements are now discussed in details. In addition, a
reference is added regarding the design of basic flyback converter. The authors feel that since many textbooks exists
which discusses the design procedure of basic flyback converter, further discussion would be redundant in this paper.
Which is the load range achieved for the soft switching cell? Some results showing the operation at light load condition
must be presented and discussed.
Answer: A new section is now added which presents a design example and also simulation results for nominal load and
light load.
The authors should also present and discuss the converter control system. How could one obtain the gating signal for
the main and auxiliary switches?
Answer: This is now discussed at the end of the section2.
The specifications and parameters of the experimental prototype should be summarized in a table, as Fig. 4 becomes
redundant.
Answer: To omit redundancy, the new Fig. 5 is added which shows both simulation circuit and also the parameters of
the experimental results.
The discussion on the experimental results is quite poor. Please, add some comments on Fig. 6.
Answer: The discussion on the experimental results is now enhanced.
Conclusion must be improved. Which is the main contribution of the passive snubber? How relevant are the obtained
results?
Answer: The conclusion is now improved. The contribution of the proposed active snubber is now discussed in much
detail in the introduction and conclusions.
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Reviewer: 2
Comments to the Author
The circuit idea presented in the paper is not bad, but the operating modes discussed in the second section of the paper
are partially wrong.
In section 2 (circuit description and operation) the magnetization current Im is assumed to be constant (page 2 line 12).
Based on this approximation the circuit operation is described during 8 time intervals, but both the mathematical
equations involved in this presentation and the theoretical waveforms plotted in fig.2 (page 5) do not reflect the circuit
physical behavior.
The flyback converter is based on the buck-boost converter. Unlike the ideal transformer, the current does not flow
simultaneously in both windings, so the flyback transformer has a more inductor- like behavior rather then a
transformer one. So during intervals 3 and 8 (from section 2) the current Is (from fig.1-pag.4) is not constant, as it is
presented in the paper, it has a linear variation insted. Also for the first two time intervals (to-t2) the circuit has a
resonant behavior. The approximation of a constant magnetization current is used to find the conversion ratio for stedy-
state operation and for circuit modeling.
Answer: Since the transformer magnetizing inductance is large, its current can be assumed almost constant. As it can
be observed from the simulation and experimental results, when the main switch is on its current which is equal to
magnetizing inductance current has minor changes and can be assumed almost constant. Furthermore, considering the
variation of magnetizing inductance current, the converter operating modes will not change and only the relations
describing various operating modes will slightly change. In almost all similar papers, theses variations are neglected to
simplify the analysis. Therefore, the auxiliary circuit design method becomes simple. However, the effect of
magnetizing inductance variation is considered in the simulation results and since simulation results closely follows the
theoretical analysis, the mentioned assumption is justified.
Observations regarding the content of the paper:
a-Section 2 has to be modified according to the physical phenomena that appears in the circuit. In fig.2 from pag5, some
simulations results instead of ‘Main theoretical waveforms of the proposed converter ‘ would be very well received.
Answer: simulation results are also added in the paper.
b-Section 3 (design procedure) has to be improved. Because, the design of the main converter seems to be not
significantly different from the standard flyback converter, the main focus has to be on the design procedure for the
auxiliary circuit La and Cs.
Answer: The design procedure section is now revised and design procedure is improved. Also, a design example is
now added.
c-To define the time delay between the switch S turn on and switch Sa turn on.
Answer: The duration of fourth and fifth intervals is the time delay between gate pulses of the switches which can be
observed from Fig.2. The amount of the time delay should be tuned in practice. The circuit to create the pulses is now
discussed in the second section.
d-An evaluation of the power losses improvement of the circuit have to be done. In section 3 (design procedure) the
leakage inductance Ll is neglected. This is a unfortunate assumption, because the circuit La-Cs is able to recover the
energy stored in the leakage inductance when S turns off and to return it to the circuit when Sa turns on.
Answer: The transformer leakage inductance is considered in the analysis. However, in order to simplify the design of
the auxiliary circuit, this inductor is neglected. Note that, in the simulation results the transformer leakage inductance is
considered and consequently the auxiliary circuit elements are fine tuned. A comprehensive design example is now
added. Also, the power losses of the proposed active snubber are now compared with a similar passive snubber in the
design example section.
Conclusion
From my point of view, if the ‘Observations regarding the content of the paper’ are solved, the paper may be
published.”
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Abstract: In this paper a new zero voltage transition flyback converter is introduced which uses a simple
auxiliary circuit. In this converter, zero voltage switching condition is achieved for converter switch while zero
current switching condition is attained for auxiliary switch. There is no additional voltage and current stress on
the main switch and main diode and auxiliary circuit voltage and current ratings is low. The proposed converter
is analyzed and design procedure is discussed. The presented experimental results of a prototype converter
justify the theoretical analysis.
Keywords: Flyback converter, Zero Voltage Transition (ZVT), Pulse Width Modulation (PWM).
1-Introduction
Nowadays, switching DC-DC converters (specially isolated types) are frequently employed as
power supplies in various applications. Among isolated DC-DC converters, flyback converter has
the simplest structure for low power applications. In this converter, the transformer serves as
isolation as well as energy storage element. However, the main drawback of this converter is the
switch losses and voltage spike due to the transformer leakage inductance. Furthermore, the voltage
spikes will cause high electromagnetic interface (EMI). Soft switching techniques are vastly applied
to DC-DC converters to reduce the switching losses and EMI [1-14].
Among various soft switching techniques, zero voltage transition (ZVT), zero current transition
(ZCT) and active clamp methods are increasingly used since they can eliminate switching losses
and stresses while the control circuit remains PWM [2-14]. In these converters, the auxiliary circuit
only functions at switching instances and reduces switching losses. In low to medium power
applications, since MOSFET is mainly used for switches, ZVT technique is preferred, because it
can eliminate capacitive turn on losses as well as switching losses. However, at higher power
applications where IGBT is mainly used for switches, ZCT technique is preferred since it can
eliminate tailing current losses.
Various ZVT flyback converters were previously introduced [7-10]. ZVT flyback converters
introduced in [7] and [8], have a complex auxiliary circuit. Furthermore, in these converters the
auxiliary circuit applies additional current stress on the main switch. Also in these converters the
leakage inductance energy of the transformer is not recovered which can be considerable in the case
of flyback converters. ZVT flyback converter introduced in [9], uses a simple auxiliary circuit, but,
in this converter there is an additional diode in the main power path which increases the conduction
losses. Therefore, the conduction losses of this converter are high especially when the flyback
converter is operated in boost mode to adapt a low voltage high current source to a high voltage low
current load. In this condition since the input voltage is low and also the source current is high the
conduction losses of the extra diode applied in the main power path at the transformer primary side
will considerably decrease the efficiency. ZVT flyback converter introduced in [10], satisfies all the
requirements, but its auxiliary circuit is complex. In this converter the voltage stress of the main
switch is low and thus, it is a proper choice for high input voltage applications where the voltage
stress of the main switch is high. Active clamp flyback converter is another method to attain zero
voltage switching for flyback converters [11]. In the active clamp technique, the auxiliary circuit
conducts when the secondary diode is conducting and main switch is off. As a result, the
conduction losses of the auxiliary circuit is considerable when the main switch operating duty cycle
is low and thus, this technique is a proper method for high operating duty cycles. Furthermore, in
active clamp techniques, the achieved soft switching condition is load dependent and soft switching
is not attained at light loads. Therefore, this technique is not suitable for wide load range.
In this paper a new ZVT flyback converter is introduced which employs a simple auxiliary circuit.
Besides, in this converter there is no additional element in the main power path. Also, this auxiliary
circuit completely absorbs and recovers the transformers leakage inductance energy and switching
losses of the main switch. Moreover, the auxiliary circuit elements are soft switched and thus the
auxiliary circuit losses are low. In the second section of this paper, the proposed ZVT flyback
converter is introduced and its operating modes are discussed. Design procedure is discussed in the
third section. In the forth section experimental results are presented.
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2- Circuit description and operation
The proposed ZVT flyback converter is shown in Fig. 1. The converter is composed of main
switch S, rectifying diode D, transformer T which is modeled with leakage inductance LL,
magnetizing inductance Lm and an ideal transformer with primary to secondary turns ratio of n and
an auxiliary circuit. The auxiliary circuit is composed of auxiliary switch Sa, auxiliary diode Da,
auxiliary inductor La and snubber capacitor Cs. To simplify the converter analysis, it is assumed that
all semiconductor devices are ideal. Furthermore, it is assumed that the output voltage is constant
and equal V0 and Lm current variation is neglected and assumed to be equal to IP. The proposed
converter has eight distinct operating intervals in a switching cycle. Main theoretical waveforms of
the converter are shown in Fig. 2 and the equivalent circuit for each operating interval is shown in
Fig. 3. Before the first interval it is assumed that only the main switch is conducting and Cs voltage
is Vin.
Interval 1 [t0-t1]: This interval starts by turning the main switch off which causes Da to conduct.
Since Cs voltage is equal to Vin, the main switch is turned off under zero voltage (ZV) condition. In
this interval Lm discharges Cs with a constant current equal to Ip. Thus, Cs voltage equation is:
S
PinC
C
ttIVV
S
)( 0−−= (1)
This interval ends when Cs voltage reaches –nV0 and diode D is forward biased. Duration of this
interval is:
P
sin
I
CVnVtt
).( 001
+=− (2)
Interval 2 [t1-t2]: In this interval diode D is conducting and the voltage across Lm is constant and
equal to –nV0. Therefore, LL starts to resonate with Cs and its current decreases to zero and diode D
current increases to nIp accordingly. Cs voltage and LL current during this interval can be calculated
from:
))(sin( 1000 ttIZnVV PCS−−−= ω (3)
))(cos( 10 ttII PLL−= ω (4)
Where:
S
L
C
LZ =0 (5)
SL CL .
10 =ω (6)
Cs voltage at the end of this interval is V1=–nV0–Z0Ip. Duration of this interval is:
0
122ω
π=− tt (7)
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Interval 3 [t2-t3]: During this interval diode D is conducting and the converter behaves like a
regular flyback converter when its rectifying diode is on.
Interval 4 [t3-t4]: This interval starts by turning the auxiliary switch on. This begins a resonance
between La and Cs and thus, Cs voltage increases to –nV0. The equations for Cs voltage and La
current during this interval are:
))(cos()( 3100 ttIZnVV PCS−−−= ω (8)
))(sin()(
31
1
00 ttZ
IZnVI PLa
−−−
= ω (9)
Where:
S
a
C
LZ =1 (10)
Sa CL .
11 =ω (11)
La current at the end of this interval is:
))(sin(cos)(
)(00
01
1
0041
P
PL
IZnV
nV
Z
IZnVtII
a−−
−−−==
− (12)
Interval 5 [t4-t5]: When Cs voltage reaches –nV0, auxiliary diode Da starts to conduct and a
resonance begins between Cs, La and LL. The equation for LL and La current and Cs voltage during
this interval are:
))(cos())(sin().(
4211
42
2
00 ttLL
LI
LL
LItt
LL
nVt
LL
nVI
La
a
La
a
LaLa
LL−
+−
++−
+
−−
+= ωω
ω (13)
14211
42
2
00 ))(cos())(sin().(
IttLL
LI
LL
LItt
LLL
LnVt
LL
nVI
La
L
La
L
aLa
L
La
La+−
++
+−−
+
−+
+= ωω
ω (14)
))(sin())(cos()(
4212
4200 tt
LL
LLItt
LL
LnV
LL
LnVV
La
La
La
L
La
aCS
−+
+−+
−+
−= ωω
ω (15)
Where:
)(2
LaS
La
LLC
LLZ
+= (16)
La
SLa
LL
CLL
+
=1
2ω (17)
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At the end of this interval Cs voltage reaches Vin, LL current reaches Ip and La current reaches a
specific value defined as I2. The converter should be designed so that I2 is greater than Ip to provide
zero voltage zero current (ZCZV) switching condition for the main switch turn on as it will be
discussed in the next section. Diode D turns off under ZC condition at the end of this interval.
Interval 6 [t5-t6]: The body diode of the main switch starts to conduct and this switch can be
turned on under ZCZV condition. Therefore, Vin is placed across La and the current of this inductor
decreases linearly to Ip.
Interval 7 [t6-t7]: La current decreases linearly from Ip to zero and the main switch current
increases from zero to Ip. Main switch current equation during this interval is:
a
inS
L
ttVI
)( 7−= (18)
Interval 8 [t7-t0+T]: In this interval, the main switch current is constant and equal to IP and the
converter behaves like a regular flyback converter when its switch is on.
The auxiliary switch is turned on just before turning the main switch on to discharge the snubber
capacitor. In other words, the main switch gate signal should be delayed with respect to the
auxiliary switch gate signal. Therefore, a regular PWM controller can be employed to provide the
PWM signal which is applied to the main and auxiliary switches through a monostable and delay
circuit respectively. The schematic of this circuit is shown in Fig. 4.
D
S
+
Isa
V
Vsa
R
Vs
LL
+
Sa
.Is
-+
_
Vcs
-
D
-
.La
D
Cs
C
Vin
+Lm
IDa
n:1
T
Fig. 1. The proposed ZVT flyback converter.
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Fig. 2. Main theoretical waveforms of the proposed converter.
gV
gaV
SI
SaI
SV
SaV
DI
0t 1t 2t 3t 4t 5t 6t 7t
0
0
0
0
0
0
0nVVin +
PI
inV−
pIZnV 00 +
Pin IZnVV 00 ++
PnI
0VnVin +
0
DV
CsV
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n:1
C
Vin
Cs
R
.Lm
.
LL
Da
T
L
VinT
Cs
n:1
Da.
C R
.Lm
L
D
(a) [t0-t1] (b) [t1-t2]
T
n:1
RD
CLm
.
Vin.
LL
Sa
L
Vin
L
T
n:1
Cs
Lm
La
D.
C
.R
(c) [t2-t3] (d) [t3-t4]
Lm
Sa
LL
T
n:1
C R
La
Da.
D
Vin.
Cs
T
R
n:1
LaVin
C
.Lm
.
Sa
L
Da
L
(e) [t4-t5] (f) [t5-t6]
Sa
.RS
Vin
LL
T
C
La
n:1
.Da
Lm
C
.
.Vin
LL
T
Lm
n:1
S R
(g) [t6-t7] (h) [t7-t0+T]
Fig. 3. Equivalent circuit for each operating interval.
gate driver
main
buffer & auxiliary
output pulse ofregular PWM
monostable
buffer &
gate driverswitch
controller
switch
delay
0
Fig.4. Schematic of converter controller.
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3- Design procedure
The basic flyback converter is designed like any flyback converter [15]. In order to obtain the
values for auxiliary circuit elements, it is very difficult to exactly solve equations (13) to (15). To
simplify the converter design it can be assumed that LL value is small and its effect can be neglected
and then this assumption is justified. At this condition, when the main switch is turned off, the
snubber capacitor is discharged to –nV0 instead of V1. Furthermore, when auxiliary switch is turned
on, the auxiliary diode Da conducts and the transformer primary side voltage (–nV0) is placed across
La. Thus, the La current linearly increases to Ip and diode D current reduces to zero. Then a
resonance starts between La and Cs and Cs voltage increases to nV0. Therefore, in order to achieve
ZV condition for switch turn on, nV0 should be greater or equal to Vin. When the effect of LL is not
neglected, at the main switch turn off, this inductor will overcharge Cs up to V1 instead of –nV0 and
an additional energy will be stored in Cs. This additional stored energy in Cs is transferred to LL
again by turning Sa on and increases LL current to Ip in the fifth interval. Therefore, the effect of LL
in designing auxiliary circuit elements is not significant and can be ignored. Thus, the converter
operates as discussed when –nV0 is greater or equal to Vin. Selection of Cs depends on the main
switch speed and converter delivering power. This capacitor can be designed like any other snubber
capacitor [15]. However, for flyback converter this capacitor must be overdesigned to limit the
additional voltage stress due to the transformer leakage inductance. This additional voltage stress is
equal to Z0Ip which is expressed in the previous section. In an Ideal flyback converter, the voltage
stress of main switch is Vin+nV0 and the main switch is selected according to this voltage stress. By
measuring the transformer leakage inductance and considering Z0Ip is small with respect to
Vin+nV0, the value of Cs can be calculated. The above performed analysis without LL shows that the
auxiliary switch maximum current is approximately equal to Ip+(nV0/Z1). Thus, when La is
increased, the auxiliary switch current peak is decreased. However, this will increase the duration of
fifth interval which limits the converter maximum duty cycle. Therefore, there is a trade off
between converter maximum duty cycle and the auxiliary switch current peak when selecting La.
Also, La is the turn on snubber of the auxiliary switch and its role as the snubber inductor forces its
minimum value which can be calculated like any other snubber [15]. For decreasing the auxiliary
switch current peak, the value of this inductor can be overdesigned if necessary.
4- Simulation results and design example
The converter is designed for 75V input voltage and 38V output voltage. The converter output
power is 72W and its switching frequency is 100KHz. According to the theoretical analysis, nV0
should be greater or equal to Vin and thus n should be greater or equal to 1.97. The value of 2 is
selected for n. The transformer magnetizing inductance in the primary side is calculated as 400uH
according to its current ripple [15]. The transformer is designed and implemented. The measured
value of leakage inductance is 4uH. Therefore, in order to limit the voltage stress of the main switch
to 180V, a 22nF capacitor is selected for Cs. Also, a 4uH inductor is selected for La to guarantee the
achieved zero current switching condition for the auxiliary switch. The circuit is simulated with
PSPICE software as shown in Fig. 5. The simulation results of the main switch for 72W output
power and also 25W output power are illustrated in Fig.6. A passive snubber with 22nF capacitor
provides soft switching and limits the additional voltage stress across the main switch. However,
the energy of this capacitor will be dissipated in a resistor. Therefore, employing a passive snubber
with similar function instead of the proposed auxiliary circuit would waste approximately 28W.
Also, a passive clamp can be used instead of the passive snubber which would only clamp the
voltage across the switch and can not provide ZV condition at turn off instant. The losses of this
passive clamp are approximately 8W.
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MUR860
MUR460
TD = 9uTF = .1uPW = 2uPER = 10uV1 = 0TR = .1uV2 = 10
L1
400uH
1
2
22n
MUR460
IRF640
0
K K1
COUPLING = .995K_L1,l2
4uH
1 2
TD = 0TF = .1uPW = 3.95uPER = 10uV1 = 0TR = .1uV2 = 10
IRF640
19
0
L2
100uH
1
2
75Vdc
20u
Fig. 5. Schematic of converter for simulating in PSPICE.
Time
1.968ms 1.969ms 1.970ms 1.971ms 1.972ms 1.973ms 1.974ms 1.975ms 1.976ms 1.977ms 1.978msID(M1)*10 V(M1:d,D5:2)
-100
0
100
200
(a)
Time
1.978ms 1.979ms 1.980ms 1.981ms 1.982ms 1.983ms 1.984ms 1.985ms 1.986ms 1.987ms 1.988msID(M1)*10 V(M1:d,V2:-)
-100
0
100
200
(b)
Fig. 6. Main switch voltage (broken line) and current (continuous line) (a) at 72W output power (b) at 25W output
power (Voltage scale 100V/div, current scale 10A/div and time scale 1us/div).
5- Experimental results
The experimental results of prototype converter are presented in Fig. 7. The parameters and
semiconductor devices of the prototype converter are the same as the simulated converter. Fig. 7(a)
illustrates the achieved ZV condition for the main switch. Before turning the main switch on, its
output capacitor is discharged and when the main switch turns off, its voltage increases linearly.
Since the main switch voltage rise time is much more than the switch turn off time, zero voltage
switching is achieved. Therefore, this switch is turned on and off under zero voltage switching
condition. Fig. 7(b) shows ZC switching condition attained for auxiliary switch. When the switch
turns on, its voltage becomes zero and then its current increases in a resonant fashion. Also, its
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current becomes zero before turning this switch off. The provided Soft switching condition for main
diode is presented in Fig. 7(c). The experimental results justify the theoretical analysis. The
converter efficiency curve versus output power in comparison to hard switching counterpart is
shown in Fig. 8. For the hard switching converter, passive clamp is applied to limit the switch
voltage stress.
(a)
(b)
(c)
Fig. 7. In all waveforms voltage is top waveform and current is bottom waveform of (a) Main switch (vertical scale is
50V/div or 2A/div and time scale is 1us/div) (b) Auxiliary switch (vertical scale is 50V/div or 5A/div and time scale is
1us/div) (c) Rectifying diode D (vertical scale is 50V/div or 5A/div and time scale is 1us/div).
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77
79
81
83
85
87
89
91
25 50 75
efficiency (%)
output power (W)
Fig. 8. Efficiency of ZVT flyback converter (continues line) in comparison with regular flyback converter (broken line).
5- Conclusions
In this paper, a new zero voltage transition PWM flyback converter is introduced. The converter
employs a simple zero current switching auxiliary circuit which provides zero voltage switching
condition for the main switch. In this converter there is no additional voltage and current stress on
the main switch and the voltage and current rating of the auxiliary switch is low. Furthermore, the
soft switching condition is attained for a wide load range and the converter is PWM controlled.
Thus, the control is simple and conventional PWM controllers can be employed. Also, the proposed
auxiliary circuit recovers the leakage inductance energy. The proposed converter is analyzed and
the design considerations are discussed. A design example is presented and the experimental results
of the prototype converter confirm the theoretical analysis.
6- References
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For Peer Review O
nly
[10] E. Adib, and H. Farzanehfard, “Family of isolated zero-voltage transition PWM converters”,
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