1 J.M. Heuser − STS Development Microstrip detector R&D @ GSI-CIS Johann M. Heuser, GSI Li Long,...

J.M. Heuser − STS Development 1

Microstrip detector Microstrip detector R&D @ GSI-CISR&D @ GSI-CIS

Johann M. Heuser, GSILi Long, CIS

CBM Collaboration Meeting, GSI, 27.2.2008

Update on ongoing and launched activities


tracking station with readout electronics outside of the aperture

2 projective coordinates, if possible in one

thin silicon layer: double-sided strip detector

electrical contacts at sensor's top/bottom edge: ladder construction

no "dead" region in the corners, despite of strips oriented under a stereo angle.

high radiation tolerance: design, material

1st R&D study GSI-CIS: "CBM01" - focus on connectivity

Double-sided detector, with double-metal connections of strips in the corner regions contact pad rows at top and bottom edge.

Technical challengeTechnical challengeCBM STS tracking station

Detector module

readout direction

p side "double metal"

blue: double metal connect-ions of strips I to III

n side: "vertical" strips

I II

III


Microstrip detector Microstrip detector prototype CBM01, 8/2007prototype CBM01, 8/2007

4" wafer, 285 µm Si Test sensors

Double-sided, double-metal, 1024 strips per side, 50 µm pitch, 15º stereo angle, full-area sensitive, contacts at top + bottom edge, size: 5656 mm2

Double-sided, single-metal, 256256 strips, orthogonal, 50(80) µm pitch, size: 1414 (22 22) mm2

Main sensor


Characterization at CISCharacterization at CIS

IV and CV behaviour of CBM01B1, CBM01B2, CBM02 (Mr. John et al.)

reported at CBM Meeting September 2007

U [V]

I [µ

A]

U[V]

I [µ

A]

U [V]

1/C

2 [p

F-

2]


Find application in various activities of Find application in various activities of beginning detector module R&Dbeginning detector module R&D

Only available CBM-specific microstrip detectors

GSI: Test board (CBM01B2, preparation, report A. Lymanets)

Test beam tracking module (planned)

KINR Kiev: Pre-prototype module & CBM01B1 detector tests (electrical, diode laser, radioactive source) (report V. Pugatch)

Kharkov: Test board with microcable fanout structure (planned)

Cracow: n-XYTER-SUCIMA board with CBM01B2 (planned)

+ many new ideas oooooo ooo


Towards 2Towards 2ndnd design iteration design iterationCIS activity in frame of german BMWI project INNOWAT -“SPID“:

Test wafer to explore primarilyradiation tolerance

Bias method:punch-through, poly-silicon

Breakdown voltage: charge, micro discharge

Insulation technology: p-spray , p-stop, field plate


Full detectors

7 pixel detectors; 18 strip detectors.

Test structures:

3 Pad diodes, 4 Gate diodes,

6 PDTF, 2 SIMS, 2 SDM.

Process status 2/2008:

First active implant finished.

Second manufacture run ("technology wafer")Second manufacture run ("technology wafer")

L. Long and R. Rolf, CIS


ohmic side

Simulation of electrical propertiesSimulation of electrical propertiesLayout calculation:

coupling capacitance front 21 pF/cmcoupling capacitance back 15 pF/cmresistance for front metal 25 Ohm/cmresistance for back metal 16 Ohm/cmresistance for cross connection 28 Ohm/cm

Technology simulation:

resistance for p front 66 kOhm/cmresistance for n back 44 kOhm/cm

junction side

Electrical field:


Wafer Poly p-Stop p-Spray Poly (1 MOhm)

1 X X 3,5e12,115keV

2 X X 3,5e12, 115keV 1.5MOhm

3 X X 3,2e12, 115keV

4 X X 3,2e12, 115keV 1.5MOhm

5 X X 4,0e12, 115keV

6 X X 4,0e12, 115keV 1.5MOhm

7 X X 5e12, 80keV

8 X X 5e12, 80keV

9 X X 1.1e13 70keV X 3,5e12,115keV

10 X X 2e13 70keV X 3,5e12,115keV

11 X X 1.1e13 70keV

12 X X 2e13 70keV

13 X 1.1e13 70keV X 3,5e12,115keV

14 X 2e13 70keV X 3,5e12,115keV

15 X 1.1e13 70keV

16 X 2 e13 70keV

17 X 3,5e12,115keV

18 X 3,5e12,115keV

Technology variations in detail (I)Technology variations in detail (I)

Wafers with different processing


Name Quantity biasing isolation pitch Guard

Twpx1 1, Pixel Punch Spray 80*120 No

Twpx3 1, Pixel Punch Spray 80*120 Guard

Twsp5 2,strip Punch Spray 80 Guard

Twsp6 1,strip Punch Spray 50 Guard

mastercis 5, Pixel Punch Spray Guard

Cap_gcdiode_ntestfeld 2 Test structure

Cap_gcdiode_ptestfeld 2 Test structure

Diode1_ptestfel_ 1 Test structure

Diode2_ptestfeld 1 Test structure

Diode3_ptestfeld 1 Test strckture

PDTF02st 1 Test structure

PDTF02nn 1 Test structure

PDTF02n 1 Test structure

PDTF02p 1 Test structure

PDTF02pn 1 Test structure

PDTF02pp 1 Test structure

Technology variations in detail (II)Technology variations in detail (II)

Detectors and test structures on the wafers


Name Quantity biasing isolation pitch Guard

sdm 2 Test structure

Sims1 2 Test structure

Twpsp15 1,strip Poly Spray 80,48 Guard

Twpsp12 1,strip punch Spray 80 Guard

Twpsp13 1,strip Poly+punch Pstop+ Spray 80 Guard


Twpsp2 1,strip Poly Spray 50 Guard


Twpsp23 1,strip poly+punch Pstop+ Spray 50 Guard

Twpsp24 1,strip poly+punch Plate+ Spray 50 Guard

Twpsp25 1,strip punch Spray 50 2xguard

Twpsp5 1,strip Poly+punch Spray 80 No

Twpsp6 1,strip poly+punch Spray 50 No

Twpsp7 1,strip Punch Spray w/p Guard

Twpspg5 2,strip poly+punch Spray 80 w/p Guard

Twpspg6 1,strip poly+punch Spray 50 w/p Guard

Technology variations in detail (III)Technology variations in detail (III)

Detectors and test structures on the wafers


1. The designed poly resistors has 230 squares, the sheet resist should be 4.3k/Sq by 1M and 6.5k /Sq by 1.5M.

2. For Test wafer we need only two masks.

3. Flow card for poly-resist test:

Processing steps: LTO depositionPoly-Silicon depositionOxidation.Implantation Boron variations Removing of oxidPhotolithography and patterning Aluminium 1µmPhotolithography and patterning

Polysilicon bias structuresPolysilicon bias structures

New at CIS.


L. Long, CiS Erfurt, 21.02.2008

Requirement of n-XYTER front end to the inter strip capacitance of the CBM01 detector: It seems that Ctotal (Ccable + Cint_detector+ Cin_n-XYTER) ~< 30pF.

Cint = capacitance of one strip against the two neighbour strips connected together, at frequency 10kHz and 100kHz. Rint = resistance of one strip against the two neighbour strips connected together. Both of them are tested at full depletion condition.

Comparison between CBM01 and ALICE microstrip detector:

Length [µm]

Pitch [µm]

Width [µm]

Cint [pF]

Cint[pF]

Rint [G]

Rint [G]

ALICE 40000 95 40 10 10

CBM 53000 50.7 18 8.8 7.8 4.1 3.5

Interstrip capacitance of the CBM01 detectorInterstrip capacitance of the CBM01 detector


Electrical simulations, r/o cableElectrical simulations, r/o cable

C 1 2 C 2 3 C 3 4 C 4 5

C 1 1 C 2 2 C 3 3 C 4 4 C 5 5

C 1 3

C 2 4

C 3 5

0

1 3 52 4

Cij 1 2 3 4 5

1 0.07771 0.4389 0.06232 0.01935 0.01271

2 0.03671

0.3968 0.05144 0.01935

3 0.03155 0.3968 0.06232

4 0.03671 0.4389

5 0.07771

Simple model: Five strip lines are considered. Middle strip 1V, all other strips 0V.

Inter-strip capacitance: 2 × 0.4 = 0.8 pF/cm.

noise load for FE electronics.

(L. Long, CIS)


Signal-to-noise in a detector systemSignal-to-noise in a detector system

Cable: ~0.8 pF/cm

Sensor: typically 1.5 pF/cm strip

n-XYTER: ENC 26.9 e/pF + 200 e (fast channel)12.7 e/pF + 233 e (slow channel)

Signal in 280 µm Si: 80 e/µm × 280 µm = 22 400 e

Let‘s assume an average detector module:

6cm strip + 30 cm cable: Cinterstrip = 35 pF

→ n-XYTER will see ENC @ 35 pF = 1100 e

S/N (22 400 e) = 20S/N (11 200 e, charge shared by 2 strips) = 10

on the edge ?

Simple exercise: (J. Heuser)


Cooperation GSI-CiS on microstrip detector development and production for CBM is very effective.

First detector prototypes CBM01 have been fabricated in 2007 after an intensive, innovative preparation phase in 2006.

Extremely useful now for STS prototyping. Many teams depend on these detectors for the R&D tasks.

Currently under production: "Technology wafer" for improved next version of the CBM microstrip detectors. Prime target: Radiation hardness.

Next full detector design: Will probably take some time, first need evaluation from 1st wafer and from "technology" wafer, CBM needs to specify its further requirements.

Next project with CiS involvement: Single-sided strip detectors?

Summary/OutlookSummary/Outlook


ALICE & ATLAS industry awards to ALICE & ATLAS industry awards to CiSCiS

CIS has been subcontractor of Canberra for the ALICE microstrip detectors. Cern made the specification, Canberra made the design, CiS made the whole processing. In 2006, the ALICE detectors from CiS received an award from CERN (through CANBERRA).

1 J.M. Heuser − STS Development Microstrip detector R&D @ GSI-CIS Johann M. Heuser, GSI Li Long,...

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