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![Page 1: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/1.jpg)
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IMPROVEAn ENIAC Manufacturing Science
Program to Support European Semiconductor Industry
François FinckR&D programs Manager
![Page 2: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/2.jpg)
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SC Industry Context• The semiconductor industry is a key contributor to
European economic growth and prosperity
Nevertheless
• The European semiconductor base is shrinking and more and more companies are choosing to outsource device manufacturing to other regions, mainly to Asia.
SEMI white paper 2008
![Page 3: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/3.jpg)
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Competitiveness Enablers• To maintain and improve its competitiveness the
European SC manufacturing must rely on advanced solutions in Manufacturing science
• The development of these solutions – can only be done through cooperation between
industrialists, SMEs, academia and institutes– must take advantage of the existing technology clusters
around the SC manufacturers– requires the support of Europe and National PA's
![Page 4: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/4.jpg)
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ENIAC first project callSub Programme 8
Target Activity 1: Advanced Line Operation (Manufacturing Science)• SP8-1 Objective:
To allow European device makers to increase the productivity and sustainability of the most advanced CMOS and derivative technologies semiconductor fabs
![Page 5: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/5.jpg)
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Two Technical Challenges for the Future
• Scaling down CMOS (Moore Law)• Managing High mix and heterogeneity
(More than Moore)
• To enable the production of high-quality nanoscale devices at reasonable cost
One Objective
![Page 6: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/6.jpg)
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Scaling Down CMOS
What kind of Process Control Systems do we need to develop to be able to manufacture these devices in
high volumes at reduced cost per die?Source: Intel Ireland Public Relations
LG = 10nmLG = 10nm
20nm Length
25 nm
15nm
15nm Length
65nm Node
45nm Node
90nm Node
32nm Node22nm Node
10nm Length
50nm Length
30nm Length
30nm
Courtesy of Intel
![Page 7: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/7.jpg)
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High Mix and Heterogeneity (typ. fab)
• 10 technology types• 4 to 6 generations of each technology type• > 100 products running concurrently through
the manufacturing fab. • 5000 wafers per Week• several hundred reticle changes per week
![Page 8: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/8.jpg)
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High Mix and Heterogeneity • Challenges in Equipment Effectiveness
– Increase of non productive time (gating metrology, recipe qualifications, wait and down time)
– Stagnating equipment reliability, availability and utilization
– Increasing variations by increased number of equipment per process step (and vice-versa)
– Increasing interaction between process steps– Increasing internal tool complexity
![Page 9: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/9.jpg)
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Manufacturing Science Answers
• Solutions to Process Control Issues– Virtual metrology, dynamic control plan, data
mining, data reduction, data / time synchronization
• Improving Equipment Effectiveness– Predictive Maintenance, remote diagnostics, lots
scheduling and resources planning
Manage FDC strategy, collect data, perform analysis at equipment level
![Page 10: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/10.jpg)
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Implementing Manufacturing science solutions to increase equiPment pROductiVity and
fab pErformance
![Page 11: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/11.jpg)
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IMPROVE Master Objectives
• To improve processes reproducibility and quality
• To improve the effectiveness of production equipement
• To shorten cycles time and improve learning curve
=> To IMPROVE European Fab's Competitiveness
![Page 12: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/12.jpg)
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IMPROVE 3 Manufacturing Science R&D
Topics
• Virtual Metrology• Corrective/ Preventive & Predictive
Maintenance• Dynamic Control Plan
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SPC Chart
47504800485049004950500050505100515052005250
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31
Lot number
Tre
nc
h D
ep
th
Metrology Data
UCL
LCL
Etch STI Planer
Hours/days delay for standard
metrology
SPC
LRC Etch
Wafer
Voltage, power, OES
etc
Metrology
yY
Y = f(X)
Y
X=[X1,X2,……Xn ]
Virtual Metrology Data
Courtesy of Intel
MetrologyImmediate
Computation for Virtual Metrology
Virtual
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Virtual Metrology• Providing measurement on every wafer in
real time• Improving process control from "run to run"
to "wafer to wafer"– Increasing device quality and yield
• Reducing standard metrology steps– Cycle time improvement– Operating costs reduction
![Page 15: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/15.jpg)
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Corrective/ Preventive & Predictive Maintenance
Equipment context data are available in • Manufacturing Execution System (MES)• Computerized Maintenance Management System
(CMMS)• Recipe Management Systems (RMS).
Scheduled Maintenance
(Over Enginnering)
Corrective Maintenance
(Unpredictable)
EquipmentAvailable to
produce parts
Assist
Present
R2RSPC
FDC
RMSCMMS
MES
Condition Datas
PT…
S.Hubac & al ASMC Conference (Jull 2010)
Equipment Condition Data are there... But use of this information must be... IMPROVEd
Ava
ila
bil
ity
to
be
imp
rove
d
Hig
h l
evel
of
un
exp
ecte
d
eve
nts
Equipment process data are available in specific control applications:• Fault Detections & Classification: FDC• Statistical Process Control: SPC• Regulation loop: R2R• Failure and Maintenance history: CMMS
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Corrective/ Preventive & Predictive Maintenance Evolution
Ava
ila
bil
ity
Tar
ge
t
Scheduled
Corrective
EquipmentAvailable to
produce parts
Assist
PredictiveScheduled Maintenance
(Over Enginnering)
Corrective Maintenance
(Unpredictable)
EquipmentAvailable to
produce parts
Assist
Present
Addressing root causes to increase Equipment availability & reliability
R2RSPC
FDC
RMSCMMS
MES
Condition Datas
PT
…
Target
S.Hubac & al ASMC Conference (Jull 2010)
Efficient use of Condition data containing Failure modes, Effect & Detection will allow:
to understand Root Cause(s) on Preventive / Corrective Maintenance which leads to over engineering and/or unscheduled down time.
to consider Prediction by modeling the link between Failure Modes and Detection of Cause(s) & Effect .
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Moving from Reactive to Predictive Equipment Operations
• Reducing unscheduled equipment downtime• Increasing equipment reliability• Reducing number of scrapped wafers• Improving diagnostic and recovery time
thus reducing variability
![Page 18: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/18.jpg)
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Control Plan
Risk Modeling
Target Control Plan
Dynamic Control Plan
Risk Model
Control Rules, Sampling & Limits
Real Time Decisionlot / tool
Failures History and Modeling
Yield lossesEng. KnowledgePhysics
Meas. TechnicsMeas. quality indexCost indexProduction Plan
WIPPrioritiesTool Health
FactorLot dispatching
MetrologyRun to Run FDCVirtual MetrologyWafer to wafer FDC
Dynamic
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Dynamically optimizing the Control Plan with respect to the
real time risk analysis
• Reduction of unnecessary control steps• Reinforcing the control on critical steps• Using Equipment Health Factor to optimize
lot dispatching
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Improve Development Process
– SC Manufacturers• To define problem, provide
data, specify and assess solutions
– Academics• To work on physical and
statistical models– Solution Providers
• To prototype hardware and software tools for development assessment
Data Acquisition
Modeling
Prototypes
Assessment
An extensive vertical collaboration
![Page 21: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/21.jpg)
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IMPROVE skills
– SC Manufacturers
– Academics
– Solution Providers
PhysicalModeling
Diffusion
More Moore
200/300mmLines
More thanMoore
Etch ImplantPhotoLitho
APC Framework
Data Analysis
Simulation Software
Sensors
Non linear Stats.
NeuralNetworks
BayesianNetworks
RiskAnalysis
An extensive horizontal collaboration
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Key figures3600 Men Months over 3 years100 full-time researchersJan 2009 to December 2011
35 Partners over 6 countries
IMPROVE resources
SC manuf.53%
Solutions providers
21%
Univ./lab/Institutes26%
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IMPROVE Consortium• 6 major European SC manufacturers
– LFoundry– INTEL– INFINEON– Austriamicrosystems– Numonyx– ST
• 2 Institutes– Fraunhofer G.– LETI
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IMPROVE Consortium• 10 Solutions Providers
– France:PDF Solutions, Probayes– Germany: Camline, ISYST, InReCon– Ireland: LAM Research, Lexas Research– Italy: Techno Fittings, LAM Research– Portugal:Critical Manufacturing
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IMPROVE Consortium• 12 Academic Labs
– France:EMSE-CMPGC, GSCOP, LTM CNRS– Germany: Augsburg University, FAPS (Erlangen)– Ireland: DCU (Dublin)– Italy: UNIPV, UNIMI, UNIPD, CNR E, CNR IMM – Austria:FH-WN (Wiener Neustadt)
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A novel approach using combination of technologies to estimate wafer’s physical dimensions and electrical performance
An Example of Cooperation
Numonyx
Intel
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Benefits of the Cooperation for Europe
• The IMPROVE project will be a key enabler for 2 main competitive advantages
1. To directly contribute to the competitiveness of the semiconductor fabrication in Europe with the developped solutions• Better process and equipment control at lower cost• Better productivity of equipment• Better cycle time
![Page 28: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/28.jpg)
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Benefits of the Cooperation for Europe
2. To contribute to the creation and reinforcement of a European ecosystem in the semiconductor manufacturing area• Building of a continuous collaboration network in
Manufacturing Science among European actors
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IMPROVing the Eco-system
SCManufacturers
Labs &Academics
SolutionProvidersLong term reinforced
competitiveness for all actors
New Technologies Introduction
New Problems
Expertise Development & Recognition
New Concepts to Implement
Enriched Portofolio,New Markets
More Effective Production Lines
New Tools
![Page 30: 1 IMPROVE An ENIAC Manufacturing Science Program to Support European Semiconductor Industry François Finck R&D programs Manager STMicroelectronics francois.finck@st.com.](https://reader035.fdocuments.us/reader035/viewer/2022062715/56649d995503460f94a83abb/html5/thumbnails/30.jpg)
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Thank you for your attention
More information available on IMPROVE public web site
www.eniac-improve.eu
IMPROVE project is funded by ENIAC Joint Undertaking and the National Public Authorities of Austria, France, Germany, Ireland, Italy and Portugal