1 Flash memory Yi-Chang Li Dept. Computer Science and Information Engineering National Taiwan...

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Flash memoryYi-Chang Li

Dept. Computer Science and Information Engineering

National Taiwan University

Advisor: Prof. Chia-Lin Yang

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Outline OS support for flash Design on heterogeneous flash (SLC+MLC) Efficient evaluation method for wear-leveling

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OS Support for Flash Windows Vista provides two supports for flash

memory Support for hybrid drive

ReadyDrive Support for flash plug in device

ReadyBoost

Reference: Windows PC Accelerators white paper http://www.microsoft.com/whdc/system/sysperf/perfaccel.mspx

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Support for Hybrid Disk - ReadyDrive A feature to support the use of hybrid disk

Buffer write requests on the flash Allows the disk to stay spun down longer and save power

Prefetch data to dedicate space on flash

Requirements on hybrid disk: At least 50 MB of nonvolatile flash storage (NV cache) capacity NV caches must perform at

4 MB/s for random 4K reads and writes 16 MB/s for 64K sequential reads 8 MB/s for 64K sequential writes

Recommendations on hybrid disk 256 MB to 1 GB of NV cache capacity; more is better Wear-leveling algorithms to ensure longevity of the NV cache


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Support for USB Flash - ReadyBoost A feature to expand main memory size by plugging in

a flash drive Requirements on flash storage

USB flash drives must use USB 2.0 standard Contain at least 230 MB of free capacity Perform at 2.5 MB/s for random 4K reads and 1.75 MB/s for

random 512K writes


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Outline OS support for flash Design on heterogeneous flash (SLC+MLC)

SLC, MLC, dual-mode flash cell Related works Our current progress

Efficient wear-leveling testing method

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What Is SLC / MLC / Dual-Mode Flash Cell SLC ( Single-Level Cell )

Store one bit of data in each cell

MLC ( Multi-Level Cell ) Store more than a single bit of information in each cell

Dual-mode flash cell A flash cell can be configured to SLC or MLC mode

MLC-modeMLC-mode MLC-modeMLC-mode

SLC-modeSLC-mode

faster access

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NAND – SLC NAND - MLC

Page Read 25 us 50~60 us

Page Write 200 us 600~800 us

Erase Latency 1.5 ms 1.5~3.3 ms

Block Endurance 100K 10K

Active Power 3.3 V / 15 mA 3.3 V / 15 mA

Stand-by Power 3.3 V / 10 uA 3.3 V / 10 uA

Cost per GB (mid 2007)

$10.37 $6.81

16GB (2Gx8) $11.9 $2.22

Comparison of SLC and MLC

2x

3x~4x

1x~2x

10x

Performance

Life time

Cost, (Capacity)

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Design A Hybrid Flash Device Design goal of a hybrid flash device

Performance close to SLC & Cost close to MLC

General approach Combine a small SLC and a large MLC Maintain performance by data placement policy

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Issues for Data Allocation Performance & Energy

Allocate frequently accessed data (read + write) to SLC Issue: How much should be allocated to SLC?

GC in SLC might hurt performance & energy

Endurance Allocate frequent writes to SLC Issue: How much should be allocated to SLC?

Erasure count between SLC and MLC should be balanced

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Outline OS support for flash Efficient wear-leveling testing method Design on heterogeneous flash (SLC+MLC)


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Related Works Hybrid Solid-State Disks: Combining Heterogeneous

NAND Flash in Large SSDs (ASPDAC’08) Improving NAND Flash Based Disk Caches ( ISCA’08)

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Hybrid Solid-State Disks Add a small SLC to improve average response time

20 GB MLC + 256 MB SLC, achieve 17% throughput and 14 % energy consumption improvement

Management of the additional SLC Sequential write & Garbage collection Phase out any valid data found in victim block to MLC

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Direction of write & GC

Free blockUsed block

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Hybrid Solid-State Disks

Data placement policy Hot data SLC, cold data MLC

Hot-cold identification: request size

Wear-leveling between SLC and MLC If the wearingSLC > 10 * wearingMLC

Reduce write on SLC

1. Reject writes to data that do not already exist in the SLC flash

2. Decrease the GC threshold in SLC

Ultra Mobile PCwith following applications: 1. Web browsers, 2. email clients, 3. movie players, 4. FTP clients, 5. office suites, 6. games

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NAND Flash Based Disk Cache Use a dual-mode NAND flash that stores 2 bits per cell

MLC and is capable of switching from MLC to SLC mode A page/block of dual-mode flash

When to switch from MLC to SLC? Reduce cell density from MLC to SLC mode to enhance cache

reliability Migrate data on frequently read MLC page to a new empty SLC

page

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What’s Missing in These Works ? For Hybrid SSDs

No concern about frequently read data

For both No concern of the GC effect

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Our Current Progress An analytic model for data placement Utilize dual-mode flash cell in SSDs

Decide a SLC/MLC partition to optimize for performance or energy consumption

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An Analytic Model for Data Placement Refer to an analytic model when allocating a newly

arriving data

writeAnalytic model

SLC

MLC

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Factors considered in the analytic model Average execution time

Different operation latency between SLC and MLC How does characteristic of this data affects GC in SLC/MLC?

Frequently written data might increase GC frequency Infrequently written data might increase GC overhead

ex.

Flash endurance Erasure counts between SLC/MLC should be balanced

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An Analytic Model to Decide Data Placement

SLCoverheadSLC

ProbSLC readGCGC

SLCfromlatencyreadaverage

*

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Utilize Dual-Mode Flash Cell in SSDs Effects in different SLC/MLC partition:

Larger SLC Better performance Less energy consumption from shorter latency Higher endurance level

Larger MLC Larger capacity, less GC frequency Less energy consumption from less GC frequency

We can adjust SLC/MLC partition to Optimize for system performance Optimize for energy consumption

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Efficient evaluation method for wear leveling Evaluation metrics for wear-leveling

Standard deviation of erasure count Maximum erasure count of flash block

However, we are not able to obtain erasure counts from a flash product Existing wear-leveling evaluation method on flash products

runs benchmarks on a flash until a worn-out block occurs Waste a new flash drive Take a long time

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Observations An interesting phenomenon

More writes to a flash Higher write speed Possible reason: More writes Thinner tunnel oxide

A correlation between write speed and erase count exists

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5.1

5.2

MB/s

# of Write

Average Write Speed

10xZero9xZero+1xOne9xOne+1xZero10xOne

Control Gate

Floating Gate

SubstrateDrain Source

Tunnel Oxide

Architecture of a Flash Cell

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Hypothesis Erasure count ↑ Write speed ↑

Erasure count = fErase-Write(write-speed)

With the same fErase-Write, good wear-leveling means Smaller write speed deviation of blocks Slower maximal write speed

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How To Verify These Hypotheses? Hypothesis 1: Erasure count ↑ Write speed ↑

With a programmable flash controller Issue “erase(block0) + write(block0)” until block 0 is worn out Measure write speed for each write

Test 2~ 3 kinds of flash chips

Hypothesis 2: With the same fErase-Write, good wear-leveling

-> Smaller write deviation of blocks &

Slower maximal write speed Implement two wear-leveling methods on flash controller to

observe if this hypothesis is valid

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Overview of Evaluation Method Step 1: Create TABLEErase-Write for the target flash drive

Since different flash drives have different fErase-Write

Step 2: Run a commonly used benchmark on the target flash until weal-leveling takes effects

Step 3: Sequentially write all logical pages of the flash drive Mapping write speed to erasure count by TABLEErase-Write

Step 4: Evaluate the quality of the wear-leveling algorithm in the target flash drive based on Max (erasure countEstimated)

Standard deviation (erasure countEstimated)Erasure count Write speed

0 W0

1 W1

2 W2

TABLEErase-Write of flash A

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Step 1. Build TABLEErase-Write Process of building the table:

Sequentially write all logical pages of the flash drive n times In the ith round

Erasure count ≈ i -1 Record average write speeds of all pages writes except the ones affected by

garbage collection Measure write speed of each page write Ignore the ones below average Recalculate average write speed of remaining page write speed

Fill the erasure count and average write speed into the table Write pattern used to build the table: all zeros

Question: how many entries (n) do we need?

Erasure count Write speed

0 W0

1 W1

2 W2

TABLEErase-Write of flash A

Logical Page Address

Wri

te S

pe

ed

Free PageValid PageInvalid Page

i = 12

average

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Step 2. Run A Commonly Used Benchmark Write zeros to addresses of the benchmark Question: How long?

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Sequentially write all logical pages of the flash drive Record write speeds of each page write except the

ones affected by garbage collection Measure write speed of each page write Ignore the ones slower than W0

Index TABLEErase-Write to obtain erasure counts

Step 3. Erasure Count Estimation

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Step 4 Evaluate the following two metrics

Max (erasure countEstimated)

Standard deviation (erasure countEstimated)

Example X axes: Address of logic pages, Y axes: Erasure countEstimated

Good Wear-leveling

Poor Wear-leveling

standard deviation

max

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Help from 鈺創

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End Thank you!

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Backup slides

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Hybrid SSDs – Performance Result

configuration Page size/Block size

Mapping unit size

SLC c1, c2, c3 2KB / 128KB 2KB

MLC c1 2KB / 128KB 2KB

c2 4KB / 256KB 16KB

c3 4KB / 512KB 64KB

n

iHi

Si nR

RratioRS

1

/)(

Response time of request i in conventional SSDs:SiR

Response time of request i in hybrid SSDs:HiR

Ultra Mobile PCwith following applications: 1. Web browsers, 2. email clients, 3. movie players, 4. FTP clients, 5. office suites, 6. games

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1 Flash memory Yi-Chang Li Dept. Computer Science and Information Engineering National Taiwan...

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