1

Course Introduction

Purpose This Part-C course covers ways to protect large scale integration

devices against problems caused by external sources of noise.

Objectives Understand the requirement for electromagnetic noise countermeasures.

Learn approaches and design methods for decreasing the electromagnetic susceptibility (EMS) of LSI devices that are operated in noisy environments.

Discover ways to prevent noise from affecting system operation.

Content 28 pages

Learning Time 30 minutes

2

Reducing EMS

EMS reduction is a goal shared by the semiconductor experts who design LSI devices and by the system engineers who apply those devices

It includes techniques for decreasing the electromagnetic susceptibility of a specific system, circuit or device — specifically, those used to minimize problems caused by external sources of noise in the operating environment

3

EMC Electromagnetic Compatibility

EMI Electromagnetic Interference

EMS Electromagnetic Susceptibility

SSCG Spread-Spectrum Clock Generator

WDT Watchdog Timer

PLL Phase Locked Loop

I/O Input/Output Port

Core A microcontroller chip is composed of a core, I/O ports, and power supply circuitry. The core consists of the CPU, ROM, RAM, and blocks implementing timers, communication, and analog functions.

Power supply

Two power supplies are applied to the LSI: Vcc and Vss. The core power supply internal to the LSI is VCL (internal step-down). The Vss-based power supply routed through the LSI is VSL.

Driver buffer

Output circuit transistors as well as output circuits for driving signals with large load capacitance and I/O port output transistors. Clock/bus driver, signals between blocks, etc.

OSC

CPG Clock Pulse Generator

Oscillator

POR/LVD Power-On Reset/Low-Voltage Detect functions

Harness Cables (wires) connecting a board and power supply or connecting one unit in a system to another.

Explanation of Terms

4

Vcc

Powerterminals

Power tointernalcircuits

Vss

Protecting Against Noise, Surges

Implementing protection against noise and surges is a major way to reduce EMS problems

The design shown in this example uses the drain-to-source breakdown voltage (BVDS) of a MOS transistor placed across the device’s Vcc and Vss terminals

5

Level-triggered Bypass Circuit

A control circuit can be used to turn on the bypass transistor when the input conditions on the supply line exceed a preset limit

Power tointernalcircuits

Control circuit

Vcc

Powerterminals

Vss

6

Diode Bridge Circuit

The diode bridge circuit is useful for minimizing EMS problems in devices that have multiple power supply terminals Reduces surge and noise by forcing the

Vss1 and Vss2 voltages to be equal

Vss1 Vss2

Vcc

Diode bridge circuit

I/O-1 I/O-2

7

Note that Vcc1 and Vcc2 have different electric potentials

MOS-transistor OFF circuit

Vss

Vcc1 Vcc2I/O I/O

Vcc1 Vcc2

MOS-transistor Bridge Circuit

A MOS transistor bridge circuit helps to reduce EMS problems in devices with multiple power supply terminals Uses BVDS of MOS transistor to reduce high-level noise voltages Isn’t as effective as diode bridge circuit

8

Vcc

Diode circuitBipolar action circuit

Outputcircuit

I/O terminal

MOS-transistor (OFF) circuit

Vss

Outputcircuit

Inputcircuit

Noise/Surge Bypass Circuits

Various types of bypass circuits can protect LSI devices from noise and surges that enter from the I/O terminals Three basic designs are shown here

9

To internal circuits

Schmitt Trigger circuit

R1 = Input protection resistor D1 and D2 = Input protection diodes

R1

D1

D2T2

T1

T1 and T2 = Input protection transistors or output transistors

Input pinorI/O pin

Vcc Vcc

VIH

Noise spikes

Noise is eliminated

Input Waveform

VIL

Schmitt Output

Schmitt Trigger Circuit

A Schmitt trigger serves as a type of logic-state-dependent amplitude filter, providing hysteresis via preset voltage thresholds that eliminate many noise spikes from its output Turns on when input reaches of VIH; turns off when input falls to VIL Schmitt trigger circuits require a CMOS interface

10

In an actual circuit configuration, the

“High”-state noise is eliminated, as well. “Low”-state noise is eliminated

Analog delay output

Schmitt trigger output

Noise canceller output

Noise

Timedelay Time

delay

Noise canceller circuit

To internal circuits

Schmitt Trigger

Input pinorI/O pin

Analog delay circuit

Analog delay circuit

Noise canceller with analog delay circuit

Noise Canceller (Analog Delay)

A noise canceller provides additional noise/surge filtering by adding a time-delay circuit and logic to the output of the Schmitt trigger circuit Processes signal and time-shifted version

11

Systemclock

Noise canceller circuit

To internal circuits

Schmitt Trigger

Input pinorI/O pin

Digital delay circuit

Digital delay circuit

CLK

CD Q

CLK CLK

CD Q

CD Q

CLK

CD Q

CLOCKOn-chip

Oscillator

Backup system clock

Noise canceller with digital delay circuit

Noise Canceller (Digital Delay)

Noise canceller with digital time-delay circuit doesn’t operate when system clock is stopped Design recommendation: Provide a backup system clock source that

automatically switches in if the main clock fails

12

To internal circuits

Schmitt Trigger circuit

Input pinorI/O pin

Vcc Vcc

C

R

Noise filter

Analog (R-C) Low-pass Filter

R-C LPFs attenuate high-frequency noise and are useful in many places on the LSI device Can be implemented in a small area of the chip This example places it at the input of the Schmitt trigger

13

Vcc

Vss

Judgement output

C

R

Vcc

Vss

Noisefilter

POR & LVDfunctions

R-C low-pass filter

LPF on Internal Power Lines

A low-pass filter on power lines to noise-sensitive functions such as the Power-On Reset (POR) and Low-Voltage Detect (LVD) circuits is a good design precaution

14

Mode pin

Latch D

Q

Mode latchregister

Bus

Typical modes: • Single-chip • Extended • Test

Latching the Mode State

A latch added to the output of the Schmitt trigger prevents unwanted transitions in mode state Captures and holds Mode-pin data when commanded to do so by

software

15

Keep space

Prohibition on Dynamic Circuits

Dynamic latch circuits should NOT be used because noise or surges add charge to circuit’s internal capacitors Causes malfunctions that might disrupt chip operation Renesas uses special CAD tool to prevent

accidental use of dynamic latch circuits

16

High-voltagejudgement

circuit

To high-voltage circuits

External capacitor(mounted on board by user)

Protection circuit Noise filter

C0.1µF

High-voltagejudgement flag

High-voltageterminal

High-voltage Pin Protection

Protection circuits guard against noise and ESD on Vpp terminals and high-breakdown-voltage N-channel open-drain terminals Mount external 0.1µF capacitor on the circuit board near the terminal Integrate an ESD circuit and LPF on the chip close to the terminal

17

OSC1 OSC1 OSC2

Externaltimingnetwork

System Clock Oscillator

Main clock oscillator circuit should have EMS protection to avoid critical logic timing problems Should be designed

so that the external timing network (crystal, etc.) is mounted close to the LSI device

Can include an internal Schmitt trigger for noise filtering

Can be designed with analog noise filtering, too, for additional EMS protection

18

Conventional multiplexed input terminal design

Input terminal design of reduced-noise microcontroller

A/D converterA/D converter

Multiplexed A/D Input Terminals

Input to A/D can use high-isolation switches arranged to reduce leakage and improve converter’s S/N ratio Implements a reduced-noise network design in which both of the series switches

in a channel not selected are open and the shunt switch is closed

19

System clock distribution

CPG

SYSTEM RESET

CLEAR

CPU

To on-chipmodules

Main system oscillato

r circuit

OSD

WDT

OCO

Watchdog timer may include a low-power internal oscillator for use in Sleep mode, etc.

Watchdog Timer, OCO, and OSD

WDT can be used to reset system and resume normal operation if a malfunction causes a stall or runaway condition Initial setting for WDT is “on” OSD monitors main clock

and automatically switches the CPG and WDT to the OCO if necessary

20

Precision oscillation can be obtained by various design techniques: • Frequency trimming • On-chip stabilized power supply • On-chip thermal protection circuit • Synchronization with maser clock on circuit board • Frequency switching • Etc.

System clock distribution

CPU

To on-chipmodules

CPGOn-chip

oscillator circuit

On-chip System Clock

Precision high-speed clock built into LSI device prevents malfunctions caused by noise that otherwise would be applied to external oscillator’s terminals Eliminates need for external

components, OSC pins, and some internal EMS protection components, allowing savings in cost and circuit board space

21

Illegal instruction

detected

Latch

Illegal address

detected

Interrupt flag

CPU instruction decoder

Illegal (unanticipated) address detection

Illegal Instructions/Addresses

Circuit that monitors instructions and addresses generates an interrupt flag when it detects incorrect values

22

Port

Vcc

Write+Address1

Write+Address2

External circuit

Protection register

Important registerbeing protected

D Q

D Q

Register write-enable

switch

Protection for Control Registers

Various methods can be applied to safeguard critical control registers against problems caused by external noise Using a protection register or an external “Register write-enable” switch

prevents erroneous writes to registers such Clock-stop control or Operating-mode control, even if CPU runs away

23

Use SCI or CAN bus when hardware communication is slow

Example: Hardware provides majority processing of data at three strobe points

Data

Strobe

Logic output “L” “H” “L” “L”“H” “H”

“High”“Low”Output from processing

Example: Software initiates retry if data from two reads doesn’t match

Data

Read

Logic output “L” “H” Retry = “L”

Output from processing Result = “L”

No match

Majority Processing

Majority voting can be implemented in hardware or software to supplement other noise countermeasures Reading logic states multiple times instead of only once, then using a

“majority-rules” type of decision-making process, is a good way to filter out noise spikes

24

ROM

RAM

CPU

Logic

Analog circuits

Keeping high-current ports away from analog circuits is highly recommended

Adding an isolation channel at Vss potential further reduces noise coupling

Analog Circuit Separation

Separating the analog circuits from the digital circuits on the chip helps prevent digital noise from degrading analog circuit operation Operating analog circuits in noisy

environments decreases the S/N ratio and reduces performance

25

Port

Vcc

Vcc

Port

R

CVcc to analog circuits

Vcc bus for digital circuits

Noise filter

Analog circuit(A/D converter,

D/A converter, etc.)

Vcc

Power supplies that are used exclusively for analog circuits are often given special names, such as AVcc, Vss, and Vref.

Power Supply Separation

Keeping the digital-circuit power supplies separate from the analog-circuit power supplies is essential for the proper operation of noise-sensitive analog circuits Ensure that the analog

and digital circuits have separate on-chip power traces

Provide separate Vcc pins for the analog and digital circuits

Place low-pass filters near analog circuits to obtain extra EMS protection

26

Power supply offset voltage

Set at 0V

Vcc Residual offset voltage

Vcc drops when a large load is turned on

Vdd Power supply ripple

Offset Voltage and Supply Ripple

Residual offset voltage and power supply ripple cannot be eliminated by low-pass analog filters Eliminate residual offset voltage by

synchronizing the application of the device’s power supply voltages and by properly sizing the capacitancein the Vcc power supply

Eliminate Vdd ripple by routing the power supply paths, including ground paths, as close as possible to the main voltage regulator, and by adding individual regulators for different modules on the chip, while isolating the filter components attached to those regulators

27

Microcontroller operating range

Apply RESET after stabilization

Vcc

Voltage temporarily falls below the minimum allowed

Voltage stabilization time

Vcc(Min.)

Momentary Power Interruptions

When a momentary condition causes the voltage supplied to the LSI device to fall below the lower limit of the guaranteed operating range, apply an external RESET after the voltage stabilization time

28

Course Summary

Preventing noise from entering an LSI

device chip via its terminals

Protecting against runaways and stalls

Safeguarding analog-circuit performance

Minimizing problems due to offset voltage, supply ripple

and power disruptions

For more information on specific devices and related support products and material, please visit our Web site:

http://america.renesas.com