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COMP541COMP541

Arithmetic CircuitsArithmetic Circuits

Montek SinghMontek Singh

Mar 26, 2012Mar 26, 2012

Test #1: Take HomeTest #1: Take Home Will assign it Wednesday, 3/28Will assign it Wednesday, 3/28

Give you five days to work on it (due 4/2)Give you five days to work on it (due 4/2)

Covers topics up to Lecture 15 (Memories II)Covers topics up to Lecture 15 (Memories II)

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TodayToday’’s Topicss Topics Adder circuitsAdder circuits How to subtractHow to subtract

Why complemented representation works out so wellWhy complemented representation works out so well

OverflowOverflow

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Iterative CircuitIterative Circuit Like a hierachy, except functional blocks per Like a hierachy, except functional blocks per

bitbit

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AddersAdders Great example of this type of designGreat example of this type of design Design 1-bit circuit, then expandDesign 1-bit circuit, then expand LetLet’’s look ats look at

Half adder – 2-bit adder, no carry inHalf adder – 2-bit adder, no carry in Inputs are bits to be addedInputs are bits to be addedOutputs: result and possible carryOutputs: result and possible carry

Full adder – includes carry in, really a 3-bit adderFull adder – includes carry in, really a 3-bit adder

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Half AdderHalf Adder S = X S = X Y Y C = XYC = XY

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Full AdderFull Adder Three inputs. Third is Three inputs. Third is CCinin

Two outputs: sum and carryTwo outputs: sum and carry

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Two Half Adders (and an OR)Two Half Adders (and an OR)

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Ripple-Carry AdderRipple-Carry Adder

Straightforward – connect full addersStraightforward – connect full adders Carry-out to carry-in chainCarry-out to carry-in chain

CC00 in case this is part of larger chain, or just in case this is part of larger chain, or just ‘‘00’’

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Hierarchical 4-Bit AdderHierarchical 4-Bit Adder We can easily use hierarchy hereWe can easily use hierarchy here Design half adderDesign half adder Use in full adderUse in full adder Use full adder in 4-bit adderUse full adder in 4-bit adder

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Behavioral VerilogBehavioral Verilog// 4-bit Adder: Behavioral Verilog// 4-bit Adder: Behavioral Verilog

module adder_4_b_v(A, B, C0, S, C4);module adder_4_b_v(A, B, C0, S, C4);input[3:0] A, B;input[3:0] A, B;input C0;input C0;output[3:0] S;output[3:0] S;output C4;output C4;

assign {C4, S} = A + B + C0;assign {C4, S} = A + B + C0;endmoduleendmodule

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Addition (unsigned)

Concatenation operation

WhatWhat’’s the Problem with this Design?s the Problem with this Design?

DelayDelay Approx how much?Approx how much?

Imagine a 64-bit adderImagine a 64-bit adder Look at carry chainLook at carry chain

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Delays (Post Place and Route)Delays (Post Place and Route)

Odd delays caused by placementOdd delays caused by placement

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Multibit AddersMultibit Adders Several types of carry propagate adders Several types of carry propagate adders

(CPAs) are:(CPAs) are: Ripple-carry adders Ripple-carry adders (slow)(slow) Carry-lookahead adders (fast)Carry-lookahead adders (fast) Prefix adders Prefix adders (faster)(faster)

Carry-lookahead and prefix adders are faster Carry-lookahead and prefix adders are faster for large adders but require more hardware.for large adders but require more hardware.

Adder symbol (right)Adder symbol (right)

A B

S

Cout Cin+N

NN

Carry Lookahead AdderCarry Lookahead Adder Note that add itself just 2 levelNote that add itself just 2 level

Idea is to separate carry from adder functionIdea is to separate carry from adder function Then make carry approx 2-level all way across larger Then make carry approx 2-level all way across larger

adderadder

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Four-bit Ripple CarryFour-bit Ripple Carry

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Adder functionseparated fromcarry

Notice adder has A, B, C inand S out, as well as G,P out.

Reference

PropagatePropagate The P signal is called The P signal is called propagatepropagate

P = A P = A B B

Means to Means to propagate incoming carrypropagate incoming carry

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GenerateGenerate The G is The G is generategenerate

G = AB, so G = AB, so new carry creatednew carry created

So itSo it’’s ORed with incoming carrys ORed with incoming carry

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Said DifferentlySaid Differently If A If A B and there B and there’’s incoming carry, carry will s incoming carry, carry will

be propagatedbe propagated And S will be 0, of courseAnd S will be 0, of course

If AB, then will create carryIf AB, then will create carry Incoming will determine whether S is 0 or 1Incoming will determine whether S is 0 or 1

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Ripple Carry Delay: 8 GatesRipple Carry Delay: 8 Gates

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Turn Into Two Gate DelaysTurn Into Two Gate Delays

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Design changed from deep (in delay) to wideDesign changed from deep (in delay) to wide

CC11 Just Like Ripple Carry Just Like Ripple Carry

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CC22 Circuit Two Levels Circuit Two Levels

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G from before and P to pass on This checks two propagates and a carry in

CC33 Circuit Two Levels Circuit Two Levels

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G from before and P to pass onThis checks three propagates and a carry in

Generate from level 0 and two propagates

What Happens as Scale Up?What Happens as Scale Up? Can I realistically make 64-bit adder like this?Can I realistically make 64-bit adder like this? Have to AND 63 propagates and CHave to AND 63 propagates and Cinin!! CompromiseCompromise

Hierarchical designHierarchical design More levels of gatesMore levels of gates

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Making 4-Bit Adder ModuleMaking 4-Bit Adder Module

Create Create propagatepropagate and and generategenerate signals for signals for whole modulewhole module

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Group PropagateGroup Propagate

Make Make propagatepropagate of whole 4-bit block of whole 4-bit block PP0-30-3 = P = P33PP22PP11PP00

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Group GenerateGroup Generate

Does G created upstream pass on because of string of Does G created upstream pass on because of string of Ps (also GPs (also G33)?)?

Indicates carry generated in blockIndicates carry generated in block

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Hierarchical CarryHierarchical Carry

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4-bit adder

A B

S G P Cin

4-bit adder

A B

S G P Cin

C0Look Ahead

C8 C4

Left lookahead block is exercise for youLeft lookahead block is exercise for you

Practical MattersPractical Matters FPGAs like ours have limited inputs per blockFPGAs like ours have limited inputs per block Instead they have special circuits to make Instead they have special circuits to make

addersadders So donSo don’’t expect to see same results as theory t expect to see same results as theory

would suggestwould suggest

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Other Adder CircuitsOther Adder Circuits What if hierarchical lookahead too slowWhat if hierarchical lookahead too slow Other styles existOther styles exist

Prefix adder (explained in text) had a tree to Prefix adder (explained in text) had a tree to computer generate and propagatecomputer generate and propagate

Pipelined arithmetic units – multicycle but enable Pipelined arithmetic units – multicycle but enable faster clock speedfaster clock speed

These are for self-studyThese are for self-study We might cover later in semester, time permittingWe might cover later in semester, time permitting

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On to SubtractionOn to Subtraction First, look at unsigned numbersFirst, look at unsigned numbers

Motivates why we typically use complemented Motivates why we typically use complemented representationrepresentation

Then look at 2Then look at 2’’s complements complement

Imagine a subtractor circuit (next)Imagine a subtractor circuit (next)

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One-bit SubtractorOne-bit Subtractor Inputs: Borrow in, Inputs: Borrow in, minuendminuend and and subtrahendsubtrahend

Review: Review: subtrahend issubtrahend is subtracted from subtracted from minuendminuend

Outputs: Difference, borrow outOutputs: Difference, borrow out Could use like adderCould use like adder One per bitOne per bit

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1-bit subM S

BoutD

Bin

ExampleExample

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BorrowBorrow 11 00 00

MinuendMinuend 00 11 11

Subtrahend Subtrahend 11 11 00

DifferenceDifference 11 00 11

Correct Diff -Correct Diff - 00 11 11

If no borrow, then result is non-negative (minuend >= subtrahend).

Since there is borrow, result must be negative.

The magnitude must be corrected.

Next slide.

Correcting ResultCorrecting Result What, mathematically, does it mean to What, mathematically, does it mean to

borrow?borrow? If borrowing at digit If borrowing at digit i-1i-1 you are adding 2 you are adding 2ii

Next SlideNext Slide

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Correcting Result 2Correcting Result 2 If M is minuend and N subtrahend of numbers If M is minuend and N subtrahend of numbers

length length nn, difference was, difference was 22nn + M – N + M – N

What we want is What we want is magnitudemagnitude of of N-MN-M (with (with minus sign in front)minus sign in front)

Can get by subtracting previous result from 2Can get by subtracting previous result from 2nn

N - M = 2N - M = 2nn – – (M – N + 2(M – N + 2nn))

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This is called2’s complement

Put Another WayPut Another Way This is equivalent to how we do subtraction in This is equivalent to how we do subtraction in

our headsour heads Decide which is greaterDecide which is greater Swap if necessarySwap if necessary SubtractSubtract

Could build a circuit this way…Could build a circuit this way… Or just look at borrow bitOr just look at borrow bit

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AlgorithmAlgorithm1.1. Subtract N from MSubtract N from M

2.2. If no borrow, then M If no borrow, then M N and result is OK N and result is OK

3.3. Otherwise, N > M so result must be Otherwise, N > M so result must be subtracted from 2subtracted from 2nn (and minus sign (and minus sign prepended)prepended)

Pretty Expensive Hardware!Pretty Expensive Hardware!

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That Complex Design not UsedThat Complex Design not Used ThatThat’’s why people use s why people use complementedcomplemented

interpretation for numbersinterpretation for numbers 22’’s complements complement 11’’s complements complement

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11’’s Complements Complement Given: binary number N with n digitsGiven: binary number N with n digits 11’’s complement s complement defined asdefined as

(2(2nn – 1) - N – 1) - N

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22nn - 1 - 1 11 11 11 11 11 11 11

- N- N 11 00 11 11 00 00 11

11’’s Compl.s Compl. 00 11 00 00 11 11 00

22’’s Complements Complement Given: binary number N with n digitsGiven: binary number N with n digits 22’’s complement s complement defined asdefined as

22nn – N for N – N for N 0 0

0 for N = 00 for N = 0 Exception is so result will always have n bitsException is so result will always have n bits

22’’s complement is just a 1 added to 1s complement is just a 1 added to 1’’s s complementcomplement

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ObservationsObservations 11’’s C and Signed Mag s C and Signed Mag

have two zeroshave two zeros 22’’s C has more s C has more

negative than positivenegative than positive All negative numbers All negative numbers

have 1 in high-orderhave 1 in high-order

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Adder-SubtractorAdder-Subtractor Need only adder and complementer for input Need only adder and complementer for input

to subtractto subtract

Need selective complementer to make Need selective complementer to make negative output back from 2negative output back from 2’’s complements complement Or go through adder again. See next slideOr go through adder again. See next slide

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Advantages/DisadvantagesAdvantages/Disadvantages Signed magnitude has problem that we need Signed magnitude has problem that we need

to to correctcorrect after subtraction after subtraction OneOne’’s complement has a positive and negative s complement has a positive and negative

zerozero TwoTwo’’s complement is most populars complement is most popular

Arithmetic operations easyArithmetic operations easy

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Conclusion: 2Conclusion: 2’’s Complements Complement Addition easy on any combination of positive Addition easy on any combination of positive

and negative numbersand negative numbers To subtractTo subtract

Take 2Take 2’’s complement of subtrahends complement of subtrahend AddAdd This performs A + ( -B), same as A – BThis performs A + ( -B), same as A – B

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Design of Adder/SubtractorDesign of Adder/Subtractor

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Output is 2Output is 2’’s complement if B > As complement if B > A

Inverts each bit of B if S is 1

Adds 1 to make 2’s complement

S low for add,high for subtract

OverflowOverflow Two cases of overflow for addition of signed Two cases of overflow for addition of signed

numbersnumbers Two large positive numbers overflow into sign bitTwo large positive numbers overflow into sign bit

Not enough room for resultNot enough room for result Two large negative numbers addedTwo large negative numbers added

Same – not enough bitsSame – not enough bits

Carry out can be OKCarry out can be OK

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Overflow ExamplesOverflow Examples4-bit signed numbers:4-bit signed numbers:

Sometimes a leftmost carry is generated Sometimes a leftmost carry is generated without overflow:without overflow:

-7 + 7-7 + 7 5 + (-3)5 + (-3)

Sometimes a leftmost carry is not generated, Sometimes a leftmost carry is not generated, but overflow occurs:but overflow occurs:

4 + 44 + 4

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Overflow DetectionOverflow Detection Basic condition:Basic condition:

if two +ve numbers are added and sum is –veif two +ve numbers are added and sum is –ve if two -ve numbers are added and sum is +veif two -ve numbers are added and sum is +ve

Can be simplified to the following check:Can be simplified to the following check: either Ceither Cn-1n-1 or C or Cnn is high, but not both is high, but not both

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SummarySummary TodayToday

adders and subtractorsadders and subtractors overflowoverflow

Next class:Next class: full processor datapathfull processor datapath Test #1 releasedTest #1 released

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