1 Chapter 8 Design Simulation. 2 Overview Two primary methods are used for FPGA design validation...

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1 Chapter 8 Design Simulation
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Transcript of 1 Chapter 8 Design Simulation. 2 Overview Two primary methods are used for FPGA design validation...

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Chapter 8 Design Simulation

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Overview Two primary methods are used for

FPGA design validation Simulation Board-level testing

Simulation stage Behavioral Functional Timing

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Stages of Simulation

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Simulation Stages

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Types of Simulation Files The two most common types of

simulation stimulus file are Waveform Testbench

The main factors that affect testbanch implementation include The simulator used, the completeness of the

testcases, the execution speed, partitioning ans code reuse

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Simulation Type Characteristics

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Common Simulation Mistakes and Tips Mistakes

Use of waveform stimulus Using testbenches is inadequate test

case coverage Tips

Potential differences between pre-and post-synthesis simulation results

if/else, switch/case Design grouping and ordering

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Pre-and Post-synthesis Simulation Issue

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Q & A