0.9 V low-power switched-opamp switched-capacitor bandpass filter for electroneurography acquisition...

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0.9 V low-power switched-opamp switched-capacitor bandpass filter for electroneurography acquisition systems S.-C. Lee, S.-Y. Lee and C.-H. Chiang Abstract: A 0.9 V fully differential switched-opamp-based sixth-order switched-capacitor band- pass filter, which has frequency response centred at 1.118 kHz with a Q of 0.235 and power saving by a proposed low-power biquad structure, is designed for electroneurography acquisition systems. It is implemented in a 0.18 mm CMOS technology with a normal threshold voltage of 0.48 V. The measured peak signal-to-noise ratio is 52 dB at 1 kHz sinusoid wave with input ampli- tude of 1 V pp . In addition, the measured power-supply rejection ratio and common-mode rejection ratio are .40 dB in the desired bandwidth and have peak values of 70 and 67 dB, respectively. A dynamic range of 50 dB for total harmonic distortion of 3% is obtained while dissipating 262 mW and occupying a chip area of 0.35 mm 2 . 1 Introduction With progress in integrated circuit (IC) technology and the development of new biocompatible materials, biomedical implants are becoming more and more common [1, 2]. In recent decades, there has been increasing demand for porta- ble biosignal measurement systems for continuous monitor- ing of ambulatory patients. These systems include electrocardiography (ECG), electroencephalography, elec- tromyogram and so on [3–5]. Fig. 1 shows such a portable biosignal measurement system [6]. Because portable bio- signal measurement systems require low power consump- tion and low complexity to reduce the size and cost of these devices, it is clear that low-voltage, low-power pre- processing circuits are necessary for portable applications. Moreover, biosignals by nature have low frequency (LF) with variable amplitude and occur in a very noisy environ- ment. Therefore in this paper, a precise switched-capacitor (SC) bandpass filter with switched-opamp (SO) architecture is proposed and implemented to achieve low power con- sumption with a 0.9 V supply voltage. Extending our pre- vious research on the low-voltage and low-power ADC for portable bio-acquisition systems [6], the bandpass filter with the central frequency of 1 kHz and the frequency range between 250 Hz and 5 kHz is required for electro- neurography (ENG) systems [7–9]. In order to compromise the sampling frequency of SAR ADC in the analogue front-end circuits [7], the sampling frequency of 125 kHz is also selected in this filter design. Hence, the LF filter with low Q characteristic is demanded in the ENG measure- ment system instead of the intermediate frequency filter with high Q characteristic for wireless communication [10]. On the other hand, in order to undistort the signal for the postprocessing circuitry, high-order and linear phase frequency response are the major features for the kind of filter. For this reason, a sixth-order filter is selected because of the least 30 dB attenuation [11] at 60 Hz required in our design. In addition, the linear-phase Bessel filter is one class of analogue filter that is free from ringing and suitable for conditioning ENG signals [11, 12]. Table 1 lists the desired specifications of the desired SC bandpass filter for ENG signal processing. Furthermore, the design of low-power, low-voltage cir- cuits has become a trend in analogue IC design because of the growing market of portable devices and technology scaling [13]. SC circuits are effective in low-voltage oper- ation due to their accuracy with low distortion in the CMOS technology. In low-voltage SC circuits, turning on or off MOS switches with low gate voltage and maintaining the proper operation of opamp are difficult. There are many existing solutions for low-voltage operation of SC circuits that include using low-threshold devices, on-chip voltage multipliers, local switch bootstrapping techniques and SO techniques [14]. The SO circuit is a popular technique for low-power applications without extra mask process and voltage-boost circuits. However, it is difficult for high-speed applications because it is limited by the turn-on time of opamps [15]. In general, the turn-on time is associated with the settling time and the unity-gain bandwidth of opamps. In this paper, a fully differential SO with common- mode feedback circuit (CMFB) is designed for LF biomedi- cal system and the design issue for overcoming the process variation in low-voltage operation is also discussed. On the basis of SO circuit, a low-power sixth-order SC bandpass filter with sampling rate of 125 kHz and the –3 dB cut-off frequency 250 Hz ( f PL ) to 5 kHz ( f PH ) is designed and can be applied to the portable ENG acquisition systems [6]. In order to achieve low-power target, a modified biquad circuit with lower power consumption compared with the original biquad structure is also presented. This paper is organised as follows. In Section 2, the SO tech- nique is introduced briefly. The low-power bandpass filter is # The Institution of Engineering and Technology 2008 doi:10.1049/iet-cds:20070163 Paper first received 11th February and in revised form 25th September 2007 The authors are with the Department of Electrical Engineering, National Chung- Cheng University, 168, University Road, Ming-Hsiung Chia-Yi, Taiwan, Republic of China E-mail: [email protected] IET Circuits Devices Syst., 2008, 2, (2), pp. 257–263 257

Transcript of 0.9 V low-power switched-opamp switched-capacitor bandpass filter for electroneurography acquisition...

Page 1: 0.9 V low-power switched-opamp switched-capacitor bandpass filter for electroneurography acquisition systems

0.9 V low-power switched-opamp switched-capacitorbandpass filter for electroneurography acquisitionsystems

S.-C. Lee, S.-Y. Lee and C.-H. Chiang

Abstract: A 0.9 V fully differential switched-opamp-based sixth-order switched-capacitor band-pass filter, which has frequency response centred at 1.118 kHz with a Q of 0.235 and powersaving by a proposed low-power biquad structure, is designed for electroneurography acquisitionsystems. It is implemented in a 0.18 mm CMOS technology with a normal threshold voltage of0.48 V. The measured peak signal-to-noise ratio is 52 dB at 1 kHz sinusoid wave with input ampli-tude of 1 Vpp. In addition, the measured power-supply rejection ratio and common-mode rejectionratio are .40 dB in the desired bandwidth and have peak values of 70 and 67 dB, respectively. Adynamic range of 50 dB for total harmonic distortion of 3% is obtained while dissipating 262 mWand occupying a chip area of 0.35 mm2.

1 Introduction

With progress in integrated circuit (IC) technology and thedevelopment of new biocompatible materials, biomedicalimplants are becoming more and more common [1, 2]. Inrecent decades, there has been increasing demand for porta-ble biosignal measurement systems for continuous monitor-ing of ambulatory patients. These systems includeelectrocardiography (ECG), electroencephalography, elec-tromyogram and so on [3–5]. Fig. 1 shows such a portablebiosignal measurement system [6]. Because portable bio-signal measurement systems require low power consump-tion and low complexity to reduce the size and cost ofthese devices, it is clear that low-voltage, low-power pre-processing circuits are necessary for portable applications.Moreover, biosignals by nature have low frequency (LF)with variable amplitude and occur in a very noisy environ-ment. Therefore in this paper, a precise switched-capacitor(SC) bandpass filter with switched-opamp (SO) architectureis proposed and implemented to achieve low power con-sumption with a 0.9 V supply voltage. Extending our pre-vious research on the low-voltage and low-power ADCfor portable bio-acquisition systems [6], the bandpassfilter with the central frequency of 1 kHz and the frequencyrange between 250 Hz and 5 kHz is required for electro-neurography (ENG) systems [7–9]. In order to compromisethe sampling frequency of SAR ADC in the analoguefront-end circuits [7], the sampling frequency of 125 kHzis also selected in this filter design. Hence, the LF filterwith low Q characteristic is demanded in the ENG measure-ment system instead of the intermediate frequency filterwith high Q characteristic for wireless communication

# The Institution of Engineering and Technology 2008

doi:10.1049/iet-cds:20070163

Paper first received 11th February and in revised form 25th September 2007

The authors are with the Department of Electrical Engineering, National Chung-Cheng University, 168, University Road, Ming-Hsiung Chia-Yi, Taiwan,Republic of China

E-mail: [email protected]

IET Circuits Devices Syst., 2008, 2, (2), pp. 257–263

[10]. On the other hand, in order to undistort the signalfor the postprocessing circuitry, high-order and linearphase frequency response are the major features for thekind of filter. For this reason, a sixth-order filter is selectedbecause of the least 30 dB attenuation [11] at 60 Hzrequired in our design. In addition, the linear-phase Besselfilter is one class of analogue filter that is free fromringing and suitable for conditioning ENG signals[11, 12]. Table 1 lists the desired specifications of thedesired SC bandpass filter for ENG signal processing.Furthermore, the design of low-power, low-voltage cir-

cuits has become a trend in analogue IC design because ofthe growing market of portable devices and technologyscaling [13]. SC circuits are effective in low-voltage oper-ation due to their accuracy with low distortion in theCMOS technology. In low-voltage SC circuits, turning onor off MOS switches with low gate voltage and maintainingthe proper operation of opamp are difficult. There are manyexisting solutions for low-voltage operation of SC circuitsthat include using low-threshold devices, on-chip voltagemultipliers, local switch bootstrapping techniques and SOtechniques [14]. The SO circuit is a popular technique forlow-power applications without extra mask process andvoltage-boost circuits. However, it is difficult for high-speedapplications because it is limited by the turn-on time ofopamps [15]. In general, the turn-on time is associatedwith the settling time and the unity-gain bandwidth ofopamps. In this paper, a fully differential SO with common-mode feedback circuit (CMFB) is designed for LF biomedi-cal system and the design issue for overcoming the processvariation in low-voltage operation is also discussed. On thebasis of SO circuit, a low-power sixth-order SC bandpassfilter with sampling rate of 125 kHz and the –3 dB cut-offfrequency 250 Hz ( fPL) to 5 kHz ( fPH) is designed and canbe applied to the portable ENG acquisition systems [6]. Inorder to achieve low-power target, a modified biquadcircuit with lower power consumption compared with theoriginal biquad structure is also presented.This paper is organised as follows. In Section 2, the SO tech-

nique is introduced briefly. The low-power bandpass filter is

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described in detail in Section 3. Measurement results are pre-sented in Section 4, and Section 5 briefly concludes this paper.

2 SO technique

SO circuits with multistage structures are usually used toachieve a sufficient DC gain in low-voltage circuit designsinstead of using cascode structures. Fig. 2 shows the popularSO circuit with fully differential structure. When comparedwith a single-stage structure, a differential structure has theadvantages of high power-supply rejection ratio (PSRR),high common-mode rejection ratio (CMRR) andhigh linearity[16]. Moreover, under the same required performance, thedifferential structure can be easily biased and its power andarea can be lower than those of the single-stage structure[16]. No cascode is used in the output stage for rail-to-railoutput swing and the minimum supply voltage is operated atVthþ 2Vov, where Vth is the threshold voltage andVov ¼ Vgs2 Vth is the overdrive voltage. The transistors ML1

and ML2 serve as DC shifters for proper biasing of M6 (M8),and the transistors MS1 and MS2 serve as switches to turn offthe output stage of SO circuit. In order to minimise theturn-on time, only the second stage is turned off, whereas thefirst stage is kept active during the off phase. In the low-voltagedesign, the DC shifter is sensitive to the potential of node P(VP). The variation of VP will cause ML1 and ML2 to enterthe triode region easily and to influence the operation of thesecond stage. In order to explain this phenomenon, the DCanalysis is described. According to the inherent square law,the current through ML1 and ML2 can be expressed as

IL ¼1

2upCox

W

L

� �L1

VSG, L1 � Vth p, L1

��� ���� �2(1þ lVSD, L1)

¼1

2unCox

W

L

� �L2

(VGS,L2 � Vth n, L2)2(1þ lVDS,L2) (1)

where m(i) is the carrier mobility, Vth(i) the threshold voltage,Cox the gate capacity per unit area, W/L the ratio of thechannel width and length of the MOS transistor and l thechannel length modulation coefficient.If the common-mode VP increases, the common-mode

VGS, L2 decreases. In order to maintain IL constant, VDS, L2must increase. This will decrease the voltage headroom ofVDS, L1 and make ML1 enter the triode region. In contrast,the decreasing of common-mode VP also causes common-

Fig. 1 Block diagram of the signal processing circuits for bio-signal measurement systems

Table 1: General specifications of the SC bandpassfilter

Filter type Bessel

order sixth

fPL 250 Hz

fPH 5 kHz

f0 1.118 kHz

Q factor 0.235

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mode VGS, L2 to increase. In order to maintain IL constant,VDS, L2 is decreased and it will also make ML2 enter thetriode region. Thus, it is difficult for this sensitive node topass the process corner effect in the low-voltage design.To alleviate this phenomenon, the appropriate design ofthe bias voltage (VB) and a common-mode feedbackcontrol voltage (VCM) are necessary.Fig. 3 shows the CMFB. In the design of this SO circuit,

the input common mode voltage and the output commonmode voltage are grounded and VDD/2, respectively.Therefore a level shifter is needed for voltage balance.The CMFB operation is as follows. During phase 1 (f1),the SO is turned off. Meanwhile, the capacitors CP andCM are charged to VDD and the capacitor CCM is fully dis-charged. During phase 2 (f2), the SO is turned on and thenode V1 is at virtual ground (AC ground). When theCMFB is at the steady state during phase 2, no charge isinjected into the capacitor CCMFB. According to thecharge balance, the relation of the charge in all capacitorsduring f1 and f2 can be described as follows

CP (VDD)þ CM (VDD)þ CCM (0) ¼

CP (Vout CM)þ CM (Vout CM)þ CCM (VDD) (2)

Setting CP ¼ CM ¼ CCM, the output common-mode voltageVout_CM of the SO will be set to VDD/2. The CMFB not onlycan fix the output common-mode level to improve thedynamic range, but also can stabilise the DC bias of theinternal circuit. The simulated opamp specifications andthe details of transistor sizes of the SO circuits are listedin Tables 2 and 3, respectively.

3 SO SC bandpass filter

In the filter design, a number of methods for deriving alow-pass transfer function to satisfy specifications areshown in the filter design handbook [17]. These methodscan also be used to derive realisable transfer functions con-formed to the behaviour of different types of filters. In thispaper, a third-order RLC ladder-type Bessel lowpass filter isadopted to design a desired sixth-order bandpass SC filter.To derive the transfer functions of the desired bandpass

Fig. 2 Low-voltage SO circuit

Fig. 3 CMFB circuit for low-voltage SO

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filter, the first-order transfer function ZLPi(S) of the Bessellowpass filter must be transformed to the second-order(biquad) transfer function ZBPi(s) of the bandpass filter withthe normalised frequency v0 based on the relation of (3)

S ¼ Qs

v0

þv0

s

� �, whereQ ¼

v0

BW(3)

Therefore the transfer functions of sixth-order bandpass filtercan be derived from (4) by substituting S parameter with (3)and the related signal flow graph (SFG) is illustrated inFig. 4 [7]

ZLP1(S) ¼1

SCLP1

¼)ZBP1(s)

¼1

(s=v0)QCLP1 þ (1=(s=v0)(1=QCLP1))

¼(v0=QCLP1)s

s2 þ v20

YLP2(S) ¼1

SLLP2¼)YBP2(s) (4)

¼1

(s=v0)QLLP2 þ (1=(s=v0)(1=QLLP2))

¼(v0=QLLP2)s

s2 þ v 20

ZLP3(S) ¼1

SCLP3

¼)ZBP3(s)

¼1

(s=v0)QCLP3 þ (1=(s=v0) (1=QCLP3))

¼(v0=QCLP3)s

s2 þ v20

Table 3: Summary of transistor sizes

M1 24/2 mm

M2, M3, M7, M9, ML1þ, ML1– 12/2 mm

ML2þ, ML2– 2/2 mm

M4, M5 1.5/2 mm

M6, M8 1.37/2 mm

MS1, MS2, MS3, MS4, MS5, MS6,

MS7, MS8

2/0.18 mm

MS9, MS10 12/0.18 mm

CCMFB 0.8 p

CP, CM, CCM 0.1 p

CC 0.3 p

Table 2: Summary of simulated SO specifications

Technology TSMC 0.18 mm 1P6M process

supply voltage 0.9 V

DC gain 76 dB

unit gain frequency 1.5 MHz

phase margin 728

slew rate 4 V/ms

CL 1 pF

CMFB power 25 mW

total power 61 mW

IET Circuits Devices Syst., Vol. 2, No. 2, April 2008

whereCLP1, LLP2 andCLP3 are the normalised elements of thethird-order Bessel lowpass filter and the relative values aresummarised in Table 4.In circuit-level implementation, each biquad transfer

function in SFG can be implemented in active-RC circuitsand transferred them to SC circuits by way of the relation:R ¼ 1=Cfs, where fs is the sampling frequency. The trans-ferred SC circuit is shown in Fig. 5 and its relatedZ-domain transfer function based on the numerical inte-grated methods (backward Euler) can be derived as

H(Z)�� �� ¼ VOUT(Z)

Vin(Z)¼

a4 � (1� Z�1)

Z�2 � 2Z�1 þ 1þ (a2a5) � Z�1

(5)

where ai represent the coefficients of the biquad filter andcan be obtained through the mapping of S-to-Z transferfunction between (4) and (5).In traditional biquad circuits, such as shown in Fig. 5, the

two opamps must be simultaneously active at any phase (f1

and f2). However, if we can make only one active opamp in

Fig. 4 Block diagram of the S-domain SFG for the sixth-orderbandpass filter

Fig. 5 Traditional low-Q SC biquad filter circuit

Table 4: Summary of capacitor values

Coefficients of the normalised Bessel low-pass filter (RS ¼ RL ¼ 1,

and v0 ¼ 1)

order CLP1 LLP2 CLP3

3 0.3374 0.9705 2.2034

Coefficients of the sixth-order Bessel SC bandpass filter

C1, C2 2 pF Cgain2 1.42 pF

a2C1, a5C2 112 fF Cgain4 220 fF

CDC1, CDC2 56 fF C1/RS, C1/RS1 1.42 pF

Cgain1, Cgain3 500 fF C1/RL 220 fF

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Fig. 6 Modified low-Q SC biquad filter circuit

260

each phase without destroying their biquad function, the SOtechniques can be integrated in the biquad filter to save halfpower consumption. For this reason, the SO circuit pre-sented in Section 2 has been adopted here. In order tocarry out the idea, we analyse the function of the traditionalbiquad circuit and determine that it is not necessary for theOP1 to be active for the operation at phase f2. As a result, itcan be disabled at phase f2. However, at phase f1, the OP1and OP2 must be active for the circuit operation. Hence,none of the opamps can be disabled at phase f1.In Fig. 5, the delay-free SC stage is used in both a2 and a4

signal path. In order to realise only one active opamp ineach phase (f1 or f2), the switch control phase in a2 anda4 signal path should be modified. Therefore the delay-freeSC stage in a2 signal path is replaced with the delaying SCstage, but it is still the same in a4 signal path. From the viewof the transfer function, a half delay (Z21/2) should be

Fig. 7 Implementation of the sixth-order SC bandpass filter

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added to the a2 and a5 signal path and a negative unit gain(21) should also be added in a2 signal path to fit in with thephase transformation. The negative unit gain in the a2 pathcan be realised by the fully differential circuit, withoutincreasing the circuit complexity. Moreover, the transferfunction of the modified circuit can be derived and it isthe same as (5). Fig. 6 shows the modified low-powerbiquad filter circuit. We can find that only one opamp isactive at phase f1 and vice versa at phase f2. The proposedmethod can also be applied for various types of biquadfilters to save power consumption. Mapping the modifiedbiquad filter to the blocks, as shown in Fig. 4, the wholebandpass filter, shown in Fig. 7, has been realised and therequired capacitor values are also summarised in Table 4.The power consumption of SO circuits is 62 mW, whichincludes 36 mW in the two-stage opamp, 25 mW in theCMFB circuits and the switching power of 1 mW.Without the modified biquad structure, the required totalpower consumption of a sixth-order SC filter is 367 mW;however, power consumption of only 262 mW isimplemented in this filter. Moreover, the switches in theinput and output stages of SC biquad filter are mainlyimplemented by NMOS transistors. In order to assure thenormal turn-on state at supply voltage of 0.9 V, the DClevel in the input is biased at ground. However, this biasis in conflict with the output common-mode level (Vdd/2),and level-shift circuits (CD1(2)) in the input stage arerequired to compensate the common-mode level of eachoutput stage in the filter structure.

4 Measurement results

The measured frequency response of the SC filter with a1–Vpp sinusoidal wave input signal is shown in Fig. 8.The centre frequency is 1.118 kHz and the bandwidth isfrom 250 Hz to 5 kHz for ENG signal processing, and thefrequency response is in agreement with the system analy-sis. The slight difference between simulation and measure-ment results is mainly caused by circuit mismatch andparasitic capacitors in the layout.Fig. 9 shows the output DC voltage, where the common-

mode level controlled by CMFB is locked in VDD/2, whichis also in agreement with our design.The measured spectrum of the SC filter with a 1 kHz fully

differential input signal is shown in Fig. 10. At a 0.9 Vsupply voltage and input amplitude of 1 Vpp, the filterobtains the peak signal-to-noise ratio (PSNR) of 52 dB,

Fig. 8 Frequency response of the sixth-order SC bandpass filter

IET Circuits Devices Syst., Vol. 2, No. 2, April 2008

while dissipating 262 mW and occupying a chip area of0.35 mm2. The second and third harmonic distortions arebelow fundamental frequency 52 and 56 dB, respectively.The measured signal-to-noise-plus-total-harmonic-

distortion ratio [S/(Nþ THD), SNDR] against variousinput amplitudes is shown in Fig. 11. Picking up the noisefloor in the passband (250 Hz–5 kHz) and the harmonic dis-tortions from second tone to fifth tone, the SNDR could becalculated according to the different amplitudes of the inputsignal. All the input signal amplitudes are normalised to

Fig. 10 Measurement of THD

Fig. 9 Output common-mode voltage

Fig. 11 Measured S/(THDþ N) against input signal level

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1.6 Vpp (0 dB) and a dynamic range larger than 50 dB isobtained. The THD 1% with 1.1 Vpp input signal andTHD 3% with 1.6 Vpp input signal are also measured,respectively. The measured performance in Fig. 11 can fitin with the ENG acquisition system [6, 7] requiring morethan 8-bit resolution. Fig. 12 shows the measured resultsof PSRR and CMRR against frequencies from 50 Hz to30 kHz. In the desired bandwidth, from 250 Hz to 5 kHz,the PSRR and CMRR are .40 dB and have peak valuesof 70 and 67 dB, respectively. The measured offsetvoltage is ,5 mV because of the fully differential circuitstructure. The active chip photograph with silicon area of0.35 mm2 is shown in Fig. 13. The overall circuit perform-ance and comparison with another paper are summarised inTable 5. The circuit proposed in [10, 18] is also a low-voltage SO-based SC bandpass filter, but it is a high-Qstructure for wireless communications. Because only threeopamps are adopted in the pseudo-2-path filter [10], it pro-vides a good structure with low power for a high-Qsixth-order analogue filter; however, the pseudo-2-pathtechnique is not appropriate to be employed in a low-Qanalogue filter for bio-acquisition systems. That is, the

Fig. 13 Chip photograph of the SC bandpass filter

Fig. 12 Measured PSRR and CMRR against frequencies

262

pseudo-2-path structure cannot be implemented in the arbi-trary biquad filter because its biquad transfer function isderived from a first-order integrator with double samplingdirectly and conflicts with the low-Q biquad transfer func-tion. In order to be comparable with the pseudo-2-pathfilter [10], this paper adopts the SO technique and modifiedbiquad circuits to reduce the power consumption. Moreover,comparing this with another report [18], the proposedbiquad structure is also seen to exhibit lower power con-sumption. Usually, it is difficult to directly make a compari-son between filters that have been designed with differentspecifications since there are some design trade-offs in fre-quency response, power, area, dynamic range and THD.However, this ladder-type bandpass filter has been first pre-sented for ENG acquisition systems and has some benefitsincluding low power and wide dynamic range under lowsupply voltage.

5 Conclusion

A 0.9 V low-power sixth-order SO SC bandpass filter hasbeen designed with a standard 0.18 mm CMOS technologyfor ENG measurement systems. The analysis and measure-ment results have demonstrated the benefits of this circuit.According to the measurement results, the maximumoutput swing can be up to 1.6 VPP, and the power consump-tion is 262 mW. On the other hand, the measured PSNR is52 dB at 1 kHz, with 1 Vpp input sinusoidal wave, and adynamic range .50 dB is achieved. Therefore the filterhas the advantage of lower power consumption and is suit-able for portable ENG acquisition systems.

6 Acknowledgment

The authors would like to thank the Chip ImplementationCenter (CIC), and National Science Council (NSC),Taiwan, ROC, for their support of this work under GrantNSC 95-2221-E-194-091.

7 References

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Table 5: Summary of the proposed SC bandpass filterand comparison with other reports

Property [10] [18] This work

technology, mm CMOS 0.5 0.5 0.18

supply voltage, V 1 1 0.9

power consumption, mW 310 160 262

filter order sixth

order

second

order

sixth

order

centre frequency, kHz 75 435 1.118

Q-value 45 6.6 0.235

sampling frequency 300 kHz 1.8 MHz 125 kHz

maximum output swing, Vpp 1.4 1.6 1.4

THD 1% 416 mVpp 725 mVpp 1.1 Vpp

THD 3% 452 m Vpp 1.1 Vpp 1.6 Vpp

dynamic range, dB 54 52 .50

chip area, mm2 0.8 0.15 0.35

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