04 Addressing

8/4/2019 04 Addressing

1/28

DCSE CEG Anna University

Microprocessor System Design

80x86 Addressing modes


2/28


Review

Programs for 80x86

Machine language, Assembly,

Registers, segments

Instruction set

Simple program

Logical, physical address

Stack


3/28


Storing data on X86 stack viaPUSH

The SP (Stack Pointer) register is used to access items on the

stack. The SP register points to the LAST value put on the stack.

The PUSH operation stores a value to the stack:

PUSH AX ; SP= SP-2, M[SP] AX

The push AX instruction is equivalent to:

sub SP, 2 ; decrement SP by 2 for word operation

mov [SP], AX ; write value to stack.

Stack access only supports 16-bit or 32-bit operations


4/28


Visualizing the PUSH operation

lastval

ue

????

????

????

????

????

????

????

????

high memory

low memory

SP

before PUSH AX

lastval

ue

ahal

????

????

????

????

????

????

????

high memory

low memory

SP

(new SP =

old SP-2)

after PUSH AX

View memory as

being 16 bits

wide since stack

operations are

always 16 bit or

32 bits.


5/28


Multiple Pushes

lastval

ue

????

????

????

????

????

????

????

????

high memory

low memory

SP

before

lastval

ue

ax

bxcx

????

????

????

????

????

high memory

SP

after all pushes

PUSH AX

PUSH BX

PUSH CX

low memory


6/28


Reading Data from X86 stack via POP

The POP operation retrieves a value from the stack:POP AX ; AX M[SP] , SP= SP+2

The pop AX instruction is equivalent to:

mov AX, [SP] ; read value from top of stack

add sp, 2 ; increment SP by 2 for word operation


7/28


Visualizing the POP operation

FF65

23AB

????

????

????

????

????

????

????

high memory

low memory

SP

before POP AX

FF65

23AB

????????

????

????

????

????

????

high memory

low memory

SP

AX = 23AB

after POP AX

View memory as

being 16 bits

wide since stack

operations are

always 16 bit or

32 bits.


8/28


Visualizing multiple POP operations

FF65

23AB

357F

D21B

38AC

23F4

????

????

????

high memory

low memory

SP

before

FF65

23AB

357FD21B

38AC

23F4

????

????

????

high memory

low memory

SP

AX = 38AC

BX = D21B

CX = 357F

after all POPs

pop AX

pop BX

pop CX


9/28


Stack Overflow, Underflow

If you keep pushing data on the stack without

taking data off the stack, then the stack caneventually grow larger than your allocated space

Can begin writing to memory area that your code is in or othernon-stack data

This is called stack OVERFLOW

If you take off more data than you placed on thestack, then stack pointer can increment past thestart of the stack. This is stack UNDERFLOW.

Bottom line: You should allocate sufficientmemory for your stack needs, and pop off thesame amount of data as pushed in.


10/28


Stack (summary)

Temporary storage

Segment and pointer SS:SP

Push and Pop (LIFO)

SP : top of the stack

After push SP is decremented


11/28


Addressing Modes

Operands in an instruction

Registers AX

Numbers immediate 12H Memory

Direct addressing [3965]

Register indirect [BX]

Based relative addressing mode [BX+6], [BP]-10

Indexed relative addressing mode [SI+5], [DI]-8

Based indexed addressing mode


12/28


Operand types

1) Register - Encoded in instruction

Fastest executing No bus access (in instr. queue) Short instruction length

2) Immediate - Constant encoded in instruction 8 or 16 bits No bus access (in instr. queue) Can only be source operand

3) Memory in memory, requires bus transfer Can require computation of address Address of operand DATA is Called

EFFECTIVE ADDRESS


13/28


Effective Address

Computed by EU

In General, Effective address =displacement + [base register]+ [index register]

(if any) (if any)

Any Combination of These 3 ValuesLeads to Several Different Addressing Modes

Displacement

8 or 16 bit Constant in the Instructionbase register Must be BX or BPindex register Must be SI or DI


14/28


Direct Addressing

mov [7000h], ax

mov es:[7000h], ax

opcode mod r/m displacement

effective address

ds:7000h ax

es:7000h ax

26 A3 00 70

A3 00 70

prefix byte- longer instruction- more fetch time


15/28


Register Indirect Addressingmov al, [bp] ;al gets 8 bits at SS:BP

mov ah, [bx] ;ah gets 8 bits at DS:BX

mov ax, [di] ;ax gets 16 bits at DS:SI

mov eax, [si] ;eax gets 32 bits at DS:SI

opcode mod r/m

BX

effective addressBP

SI

DI


16/28


Based Indirect Addressing

mov al, [bp+2] ;al gets 8 bits at SS:BP+2

mov ah, [bx-4] ;ah gets 8 bits at DS:BX-4

BX

effective address

BP+



17/28


Indexed Indirect Addressingmov ax, [si+1000h] ;ax gets 16 bits at DS:SI+1000h

mov eax, [si+300h] ;eax gets 32 bits at DS:SI+300h

Mov [di+100h], al ;DS:DI+100h gets 8 bits in al

DI

effective address

SI+



18/28


Based Indexed Indirect Addressing

mov ax, [bp+di] ;ax gets 16 bits at SS:BP+DI

mov ax, [di+bp] ;ax gets 16 bits at DS:BP+DI

mov eax, [bx+si+10h] ;eax gets 32 bits at DS:BX+SI+10h

mov cx, [bp+si-7] ;cx gets 16 bits at SS:BP+SI-7

DI

effective address

SI

+


BX

BP+


19/28


Addressing Mode Examplesmov al, bl ;8-bit register addressing

mov di, bp ;16-bit register addressing

mov eax, eax ;32-bit register addressingmov al, 12 ;8-bit immediate, al


20/28


More Addressing Mode Examplesmov al, [si] ;al


21/28


Instruction Format

opcode d w

mod reg r/m

optional

optional

optional

optional

07

low addr

high addr

Low Displacement or Immediate

High Displacement or Immediate

Low Immediate

High Immediate

opcode6-bit value that specifies instruction type

dis 1-bit value that specifies destinationd=0 for memory and d=1 for register

wis 1-bit value that specifies if destination is word or bytew=0 for byte and w=1 for word


22/28


Instruction Format (Cont.)

opcode d w

mod reg r/m

optional

optional

optional

optional

07

low addr

high addr



Low Immediate

High Immediate

modis 2-bit value that indicates addressing mode

(along with r/mvalue)

regis 3-bit value that specifies a (destination) register(see table to right) or opcode extension

r/mis 3-bit value that specifies operand location

(r/m means register/memory)

reg w=1 w=0

000 ax al

001 cx cl

010 dx dl

011 bx bl

100 sp ah

101 bp ch

110 si dh

111 di bh


23/28


Instruction Format (Cont.)

opcode d w

mod reg r/m

optional

optional

optional

optional

07

low addr

high addr



Low Immediate

High Immediate

Displacementmay be either 8 or 16 bits

- signed integer encoded into instruction- used in computation of operand address

Immediatemay be 8, 16 or 32 bits- signed integer- used as an actual operand


24/28


Instruction Format Example

opcode d w

mod reg r/m

optional

optional

optional

optional

07

low addr

high addr



Low Immediate

High Immediate

Consider the Instruction: mov ax, bxThe Assembler translates this into: 8B C3

opcode is: 100010 mov

d is: 1 destination is registerw is: 1 destination size = 1 wordmod is: 11 this indicates that r/m specifies a registerreg is: 000 destination register is ax

r/m is: 011 source register isbx


25/28


Assembler versus Machine Code

ADD AX, BX ;AX gets value AX+BX

SUB AX, BX ;AX gets value AX-BX

AND AX, BX ;AX gets bitwise AND of AX and BX

INC AX ;AX gets its original value plus 1

DEC BX ;BX gets its original value minus 1

MOV AX, BX ;AX gets values in BX

01 D8

29 D8

21 D840

4B

8B C3

01 D8

29 D8

21 D840

4B

8B C3

01D8

29

D8

21

D840

4B

8B

C3

a19fea19ff

a1a00

a1a01

a1a02

a1a03a1a04

a1a05

a1a06

a1a07

93ee:db1e93ee:db1f

93ee:db20

93ee:db21

93ee:db22

93ee:db2393ee:db24

93ee:db25

93ee:db26

93ee:db27logical

address

physical

memory

physical

address

ASSEMBLER

LINKER LOADER


26/28


I/O Port Addressing

x86 family has 65,536 I/O ports

Each port has address (like memory) Referred to as I/O memory space

I/O port is 1 byte or 2 bytes with 386+ also 4 bytes

Two addressing modes1) Immediate port address- Can only be 1 byte

- Can only be address ports 00h through ffh

2) Port address present in DX

- Can address all ports 0000h through ffffh Can only use DX for port addresses

Can only use AL,AX,EAX for port data


27/28


Flag Register

x x x x

O

F

D

F

I

F

T

F

S

F

Z

Fx

A

Fx

P

Fx

C

F

015

CF Carry Flag Arithmetic Carry/BorrowOF Overflow Flag Arithmetic OverflowZF Zero Flag Zero Result; EqualCompare

SF Sign Flag Negative Result; Non-Equal ComparePF Parity Flag Even Number of 1 bitsAF Auxiliary Carry Used with BCD Arithmetic

DF Direction Flag Auto-Increment/Decrement

used for stringoperationsIF Interrupt Flag Enables Interrupts

allows fetch-execute to beinterrupted

TF Trap Flag Allows Single-Step

for debugging; causes

interrupt after each op


28/28


Summary

Stack data structure

Operands

Addressing modes

IO ports

Flag

04 Addressing

Documents

Transcript of 04 Addressing