03 RA22123EN09GLS0 Bsc Architecture
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Transcript of 03 RA22123EN09GLS0 Bsc Architecture
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BSC architecture
RA22123EN09GLS0 2008 Nokia Siemens Networks
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Contents 1 Functions 3 1.1 Traffic channel switching 5 1.2 Signaling information processing 7 2 Modules 11 2.1 Switching network 14 2.2 Peripheral processors 16 2.3 Telephony processor 19 2.4 Administrative processor 19 2.5 Line termination 19 2.6 Hard disk 19 2.7 CPEX / ESAM 19 2.8 O&M interface IXLT 19 2.9 Clock unit 19 2.10 Packet control unit 19 2.11 Bus systems 19 3 BSC Connections 19 3.1 Local Maintenance Terminal 19 3.2 Operation and Maintenance Link 19 3.3 Gb interface 19 3.4 High speed Gb Interface 19 4 Rack configuration 19 4.1 Module combinations 19 4.2 Rack layout 19 4.3 Redundancy concept 19 4.4 Power supply 19 5 Exercises 19
BSC architecture
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BSC architecture
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BSC architecture
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1 Functions
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BSC architecture
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The Base Station Controller BSC is the "brain" of the Siemens Base Station SBS. The BSC is responsible for
Traffic channel switching, Signaling information processing, (Central) Operation & Maintenance handling and alarm monitoring. The BSC features interfaces to carry payload (and signaling) to
Base Transceiver Station Equipment BTSE, Transcoder and Rate Adapter Unit TRAU, Mobile Switching Center MSC, Serving GPRS Support Node SGSN as well as interfaces to provide Operation and Maintenance from
Operation and Maintenance System RC, Local Maintenance Terminal LMT. Note: With the LMT connected to BSC (local or remote), all network elements controlled from this BSC (all BTSE and TRAU) may be administered.
BTSE
LinkInterface
SN LinkInterface
BSCControl
LMTOMC
BSC
SGSN
BTSE TRAU
PCU
LinkInterface
BTSE
Fig. 1 BSC architecture
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BSC architecture
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1.1 Traffic channel switching The BSC switches
circuit-switched traffic (e.g. voice) coming from the MSC via the TRAU and packet-s1w0itched traffic (e.g. GPRS data) coming from the SGSN Both PCM30 and PCM24 lines are supported (by the same link interface modules).
BTSE
BTSE
TRAULinkInterfaceLink
Interface
SN-1BSC
SGSNLink
InterfaceLink
Interface
.
.
.
.
.
.
SN-0
Abisvia PCMB
Asubvia PCMS
Gbvia PCMG
PCM30/24PCM30/24
Abis
Fig. 2 Asub, Abis and Gb interfaces
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BSC architecture
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The switching of traffic channels is the task of the Switching Network SN operating with 16 kbit/s sub channels (e.g. 16 kbit/s = 13 kbit/s + 3 kbit/s for Full Rate speech). While the BSC is transparent for circuit-switched traffic, the (packet-switched) traffic coming from SGSN is adapted by the Packet Control Unit PCU to the 16 kbit/s sub channels used on Abis (e.g. 9.05 kbit/s for CS-1).
TRAU
BSC
SGSN
.
.
.
.
.
.
Asub
Abis
LinkInterface
LinkInterface
SN-1
LinkInterface
LinkInterface
SN-0
3 2 1 0 3 2 1 0
4x16 kbit/sTraffic Channels
4x16 kbit/sTraffic Channels
Gb
Permanent VirtualConnection PVCin Frame Relay
(64 kbit/schannelized)
3 2 1 0
4x16 kbit/sPacket Data
Channels
PacketControl Unit
Fig. 3 BSC traffic channel switching
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BSC architecture
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1.2 Signaling information processing The BSC (PCU) processes (external) signaling information coming from the core network:
CCSS#7 signaling between MSC and BSC (for circuit-switched traffic) and BSSGP related signaling between SGSN and PCU (for packet-switched traffic), as well as SBS (internal) signaling:
O&M information and traffic channel signaling to BTSE and TRAU (via LAPD protocol).
BTSE
BSC TRAU MSC
LAPDLAPD
4x16 kbit/s TCH
CCSS 764 kbit/s
CCSS 764 kbit/s
1x64 kbit/s TCH
Abis Asub A
SGSNGb
BSS GPRS Protocol(over Frame Relay)
PCU
Fig. 4 SBS external and internal signaling
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BSC architecture
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Signaling Time Slots The following types of signaling time slots are used:
O&M signaling on Abis for the control of the BTSE by the BSC using the LAPD protocol ("LPDLM"),
Traffic channel signaling to BTSE on Abis using the LAPD protocol ("LPDLR", LPDLM and LPDLR do not have to travel on the same time slot),
O&M signaling on Asub for the control of the TRAU by the BSC using the LAPD protocol ("LPDLS"),
Traffic channel signaling on A / Asub between BSC and MSC using CCSS#7 protocol ("SS7L").
For BTSplus max 12 LAPD time slots are available and maximum 8 PCMB links can interface BTSplus and BSC. The BSS GPRS Protocol BSSGP is carried on the same Permanent Virtual Circuit between BSC and SGSN that carries the packet data traffic (no dedicated signaling timeslot is required).
BTSE TRAU
PCMB PCMS
Abis AsubPCMA
A
MSC
SGSNPCMG
Gb
BSSGP
BSC
LPDLM&LPDLR LPDLS CCSS7
PCUUm
Fig. 5 Interfaces and signaling
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BSC architecture
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The signaling for circuit-switched traffic (CCSS#7) passes through the TRAU transparently (no transcoding) and is evaluated by the BSC. The BSS Application Part BSSAP comprises
signaling between MS and MSC (passing transparently through the BSC: call control and mobility management) as well as
BSS Management Application Part (for radio resource management, terminated on the BSC).
BTSE
BSC TRAU MSC
LAPDLAPD
4x16 kbit/s TCH
CCSS 764 kbit/s
CCSS 764 kbit/s
1x64 kbit/s TCH
Abis Asub A
Fig. 6 CCSS#7signaling
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BSC architecture
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Time slot pattern on PCMA Any sub slots on PCMS that are not subject to transcoding/rate adaptation by the TRAU cause time slots on PCMA to remain empty. Important links that are not transcoded carry:
LAPD signaling (LPDLS), CCSS#7 signaling, Operation and Maintenance Link OMAL (X25A, if used). Additionally, High-Speed Circuit-Switched Data (TRAU pooling) and Nailed-up Connections through the TRAU cause empty time slots on PCMA. The distribution of time slots on PCMA depends on the configuration chosen. Generally speaking, the system clusters the empty time slots "at the back" of the PCMA lines.
BTSE
BSC TRAU MSC
LAPD
CCSS 764 kbit/s
CCSS 764 kbit/s
Abis Asub A
Not used
LAPD
Fig. 7 CCSS7 and LAPD signaling
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BSC architecture
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2 Modules
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The following table includes the BSC/120modules:
Abbreviation Full Module Name
SNAP Switching Network Advance Performances
PPXX Peripheral Processor (all-purpose)
TDPC Telephony and Distributor Processor Circuit
MEMT Memory of the TDPC
MPCC Main Processor Control Circuit
UBEX Universal Bus Extender Board
STLP Superior Trunk Line Peripheral Board
IXLT Interface to LMT/RC
PLLH Phase Locked Loop High Performance
PWRD Power Distributor (Base Shelf)
ESAM Ethernet Switch and Alarm Module
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BSC architecture
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Line TerminationxTLP
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
PPXX
MEMT TDPC
Telephony Processors
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCC
to OMC
to LMT
PeripheralProcessors
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
BSSGP
PPXX
BSSGP
PPXX
. . .SS7
+LAPD
PPXX
SS7+LAPD
Fig. 8 BSC internal architecture
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BSC architecture
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2.1 Switching network The Switching Network SN comprises a single stage switching matrix which
switches, under the control of the Administrative Processor, the circuit-switched traffic channels between TRAU and BTSE,
switches, under the control of the Administrative Processor, the packet data channels between BTSE, SGSN and PCU ,
routes the signaling timeslots (LAPD and CCSS#7) to/from the peripheral processors (acting as PPXL) via semi permanent connections (nailed-up connections),
is protected by 1:1 redundancy (hot standby). The capacity of the switching matrix is 8 x 8 Mbit/s for SNAP.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
BTSE
BTSE
LPDLM/R
TRAU
SGSNLineTermination
LineTermination
LineTermination
LineTermination
LAPD
CCS7
SwitchingNetwork
TelephonyProcessor
Peripheral Processors
LPDLS
CCS7
BSC
BSSGPPCU
BSSGP
Fig. 9 Switching network
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BSC architecture
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2.2 Peripheral processors The general purpose Peripheral Processor card PPXX is used with appropriate SW load. This means for all purposes the same HW, namely PPXX module is used. The provision of different services (packet switched, LAPD/CCSS7 signaling) is obtained by loading these cards with different software. The Peripheral Processors of type PPXX are multifunctional boards
handling LAPD and SS7 signaling (PPXL, always located in base shelf) acting as Packet Control Unit (PPXU located always in extension shelf) Each PPXX is connected to the SNAP matrix via dedicated 8x8Mbit/s link.
Capacity Each PPXX can handle for processing up to 256 physical channels and is connected via 8Mbps link to SNAP. One PPXL provides 256 signaling channels for LAPD and CCSS#7. Out of this 256 signaling channels up to 16 can be configured as CCSS#7 links and the rest can be configured as LAPD links. One PPXX board configured as PPXU can process up to 256 16kbit/s GPRS channels. The throughput is 4 Mbps per board.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line TerminationxTLP
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
PPXL
MEMT TDPC
Telephony Processors
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCC
to OMC
to LMT
. . .
PeripheralProcessorsfor CCSS7 and LAPD
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
PPXL
Fig. 10 Peripheral processor for LAPD and SS7
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BSC architecture
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2.2.1 CCSS#7 signaling The Peripheral Processor for CCSS7, PPXX in PPXL operation (former PPCC):
handles CCSS7 MTP layer 2 for the signaling towards the MSC (A interface). The layer 2 is responsible for - error detection - error correction - recovery of a link failure.
PPXL boards support up to 16 CCSS#7 channels each.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line TerminationxTLP
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXL
CCSS 7
PPXL
MEMT TDPC
Telephony Processors
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCC
to OMC
to LMT
. . . PeripheralProcessors
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
Fig. 11 Peripheral processor for CCSS7
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BSC architecture
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2.2.2 LAPD signaling The Peripheral Processor for LAPD, PPXX as PPXL (former PPLD) is responsible for handling the level 2 LAPD protocol (used for signaling on the Abis and Asub interfaces):
O&M signaling between BSC and TRAU: LPDLS O&M signaling between BSC and BTSE : LPDLM Radio signaling between BSC and BTSE (TRX): LPDLR Each PPXL can manage as a maximum 256 physical channels or as the maximum 8Mbps of signaling throughput. This means the LAPD / CCSS#7 signaling capacity (per module throughput) is given by X+0.25*Y+Z
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line Termination
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXX
CCSS 7
PPXX
MEMT TDPC
Telephony Processor
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCC
to OMC
to LMT
. . . PeripheralProcessors
xTLP
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
Fig. 12 Peripheral processor for LAPD
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BSC architecture
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2.3 Telephony processor The Telephony Processor is composed of two circuit boards:
TDPC: Telephony and Distributor Processor Circuit, MEMT: Memory of the Telephony Processor which is a memory expansion for the
TDPC and behaves as a mailbox for MPCC - TDPC message interchange.
The Telephony Processor
handles all signaling functions above MTP layer 2 (except for measurement preprocessing, which is performed in the BTSE) and all application processes related to call control, radio resource management, and mobility management,
is connected via an internal bus (Telephony System Bus) to the PPXL (for LAPD and CCSS#7 signaling),
is protected by 1:1 redundancy (hot standby board).
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line Termination
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXX
CCSS 7
PPXX
MEMT TDPC
Telephony Processor
IXLT
AdministrativeProcessor
UBEX
MPCC
to OMC
to LMT
. . . PeriphalProcessors
xTLP
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
O&MInterface
Fig. 13 Telephony processor (TDPC, MEMT)
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BSC architecture
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2.4 Administrative processor The Administrative Processor is comprised of two boards:
MPCC: Main Processor Control Circuit, UBEX: Universal Bus Extender board which interfaces MPCC to switching
network, clock, peripheral processors, and line terminations. The administrative processor (the MPCC actually)
controls the connections of the Switching Network on the basis of the Telephony Processor messages,
handles traffic and performance measurements, is responsible for hardware configuration, is responsible for diagnostic and maintenance management, performs software download, is protected by 1:1 redundancy (hot standby boards) handles 5 external alarms handles IP based O-link between the BSC and RC as well as between BSC and
CBC (Cell Broadcast Center)
provides the connector to Ethernet 10/100 Base T for IP link.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line Termination
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXX
CCS S7
PPXX
MEMT TDPC
Telephony Processor
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCC
to OMC
to LMT
. . . PeripheralProcessors
xTLP
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
Fig. 14 Administrative processor (MPCC, UBEX)
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BSC architecture
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2.5 Line termination The Trunk Line Peripheral boards provide the connections to the
BTSE (PCMB), TRAU (PCMS) and SGSN (PCMG) via standard 2Mbit/s digital lines (coaxial or 4-wire copper). QTLP is used together with SNAP or SN16. STLP is used with SNAP only. QTLP/STLP are n:1 protected:
QTLP - 2:1 in base and 7:1 in extension shelf, hot standby and STLP - 3:1 in base and 7:1 in extension rack, hot standby.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line TerminationxLP
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXX
CCSS 7
PPXX
MEMT TDPC
Telephony Processor
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCC
to OMC
to LMT
. . . PeripheralProcessors
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
Fig. 15 Line termination QTLP or STLP (xTLP)
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BSC architecture
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Configuration QTLP/STLP is also called LICD in the BSC database. A QTLP features 4 ports with 2 terminals each. Thus, QTLP supports
8 PCMx lines (PCMB, PCMS, PCMG) in star configuration, 4 PCMB loops or equivalent combinations. A STLP features 6 ports with 2 terminals each. Thus, STLP supports
12 PCMx lines (PCMB, PCMS, PCMG) in star configuration, 6 PCMB loops or equivalent combinations. Due to these differences the BSC fully equipped with QTLP modules can support up to 72 PCM lines, while this number is increased to 120 PCM lines when STLP modules are used. A port is used in transparent mode when both terminal A and terminal B are used independently. In selection mode, only one of the two terminals (A or B) is used.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TRAU 1Port 0 AB
TRAU 2Port 1 AB
TRAU 4BTSE 2
Port 2A
B
BTSE 4Port 3
A
B
BTSE 6 Port 4
A
B
BTSE 7Port 5 AB
TRAU 3
BTSE 3
BTSE 5
Terminal A and BSTLP
BTSE 1
Fig. 16 Mixed configuration of STLP (ports 0 ... 4: transparent mode, port 5: selection mode)
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BSC architecture
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2.6 Hard disk The Hard Disk is used for storing all SBS software (incl. BTSE and TRAU software) and configuration data (BSC database) to allow a fast restart without download from the RC. The Hard Disk is updated every time the database is changed. For redundancy, data are written on both copies. BSC's redundant hard disks are located "on board" the MPCC modules.
History The Hard Disk was originally located on the module DK40 ("Disk 40 Mbytes"). The left DK40 module ("copy 0") is still present in case of the BSC/72 because it also carries the Alarm Circuit controlling the BSC Fuse and Alarm Panel. This function is transferred to new module CPEX in case of BSC/120.
DK 40
Line TerminationxTLP
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXX
CCSS 7
PPXX
MEMT TDPC
Telephony Processors
O&MInterface
IXLTDK 40
to OMC
to LMT
. . . PeripheralProcessors
AdministrativeProcessor
UBEX
MPCC
Hard Disk
xTLP
xTLP
xTLP
xTLP
xTLP
Fig. 17 Hard Disk
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BSC architecture
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Directories The Hard Disk contains a directory tree. For software and database download (e.g. in case of upgrade), the following directories are used:
SWH_DIR/RSUSWLH/n: for storing the software load "n", (e.g. n=0 for BSC, n=1 for BTSE, n=2 for TRAU etc).
SWH_DIR/RSUDB/m: for storing the database file "m", (note: binary database files are named DBFILE.DBA)
TRACE_CTR
TRACE_IMSI
SWH_DIR/RSUDB/0
SWH_DIR/RSUSWLH/2
SWH_DIR/RSUSWLH/1
SWH_DIR/RSUSWLH/0
REMINV
READY_MEAS
READY_CTR
BSC Event Log Files
Perform. Measurem. (active)
CTR Measurements (for upload)
Cell Traffic Records
IMSI Traces
And more . . .
BSC database
Remote Inventory Files
BSC software
BTSM software
TRAU software
Perform. Measurem. (for upload)
MEASURE_DIR
LOG
. . .
. . .
Fig. 18 System directories on Hard Disk
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BSC architecture
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2.7 CPEX / ESAM Each CPEX/ESAM board supports up to 16 external alarms in addition to the 5 already handled by the main processor board (MPCC). The CPEX can only be used in the BSC120. ESAM can be used in BSC72 and BSC120. The CPEX/ESAM board is placed in the slot former used for the DK40. The Control Panel supervision functions of the DK40 are taken over by the CPEX/ESAM in addition to its function regarding external alarms handling. CPEX/ESAM is connected to the administrative bus. The ESAM includes all functionalities of CPEX and in addition it is required in case of the Gb Interface realized with IP link. One ESAM supports the IP interfaces to all PPXX boards (maximum is 12) and 2 IP interfaces towards SGSN or external router.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line TerminationSTLP
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
LAP D
PPXX
CCS 7
PPXX
MEMT TDPC
Telephony Processors
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCCto LMT
. . . PeripheralProcessors
STLP
STLP
STLP
STLP
STLP
. . .
ESAM
BSSGP
PPXX
. . .
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
to SGSN
. . .
to Peripheral Processors
Fig. 19 Control panel and external alarms device (CPEX)
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BSC architecture
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2.8 O&M interface IXLT The Interface X.25 and Local Maintenance Terminal IXLT board connects the administrative processor to the operation and maintenance center RC (called Radio Commander since release BR6.0) and to the local maintenance terminal LMT. Operators, which currently have applied a X.25 network, now can replace their X.25 network by an IP network, which significantly speeds up the O-link. The IP based O-link is introduced in addition to the already supported X-25 link. The BSC supports either X.25 or IP. The BSC is equipped with two connectors to support either X.25 links or IP links in an exclusive way. In case of X.25 the cable will be connected to the already existing IXLT (Interface X.25 Local Terminal). In case of IP it will be connected to the MPCC board, but in all case the IXLT board is needed. IXLT is protected by a (cold) standby module.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line Termination
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXX
CCSS 7
PPXX
MEMT TDPC
Telephony Processor
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCC
to LMTV.2/V11
. . . PeripheralProcessors
xTLP
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
to RCX.25A orX.25D to RC
IP/TCP
Fig. 20 O&M interface on IXLT
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BSC architecture
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2.9 Clock unit The Phase Locked Loop High Performance PLLH clock:
is based on a high stability quartz oscillator that provides all of the system timing works in free running mode, or synchronized to external clock sources relies on two identical redundant boards PLLH working in master/slave
configuration.
-
BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line Termination
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXX
CCSS 7
PPXX
MEMT TDPC
Telephony Processor
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCCto LMT
. . . PeripheralProcessors
xTLP
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
Fig. 21 Clock PLLH
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BSC architecture
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2.10 Packet control unit The Packet Control Unit required for packet switched data handling (GPRS / EGPRS) is located in the BSC. The main PCU functions are
Radio channel management and Protocol conversion between standard BSS GPRS protocol BSSGP (over Frame
Relay, on Gb) and proprietary Abis protocol. While the Gb interface has multivendor capabilities, the Abis interface is proprietary using a PCU frame format (an extension of existing TRAU frames). The PCU frames have a uniform length of 320 Bit and are transferred every 20 ms via the Abis interface (16 kbit/s). Thus, the PCU performs statistical multiplexing and routing. The PCU load is automatically distributed between the available PPXX modules working as PPXU. If a PPXU fails, the GPRS/EGPRS load is automatically distributed between the remaining PPXU modules.
-
BSC architecture
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SGSN
BSC
PCU
PCU tasks Management of GPRS radio resources Protocol conversion (packet data interworking) Tasks comparable to classical BSC Remote (until now BTS tasks): PC, TA,...
Gb:standard interface
BTSE
Abis:proprietary
i/fi/f
Fig. 22 PCU functions
Cell A
Cell B
Cell C
Cell D
Cell E
Cell F
PPXU-0 PPXU-1 PPXU-2
GPRS traffic is automatically distributed among (working) PPXUwell balanced in case of failure, packet traffic is automatically redistributedamong the remaining PPXU (load sharing)
To SGSN
Fig. 23 Load sharing between PPXU
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BSC architecture
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2.11 Bus systems Three bus systems are implemented on the BSC backplane:
Telephony System Bus: Connects the peripheral processors (PPXX) with the TDPC.
Administrative System Bus: Connects the TDPC to the MPCC and the MPCC to the IXLT and CPEX.
Administrative Extended Bus: Used as an O&M connection between MPCC (via UBEX) and PPXX, SNXX, PLLH and XTLP.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line TerminationxTLP
Line Termination
Line TerminationSwitchingNetwork
SNAP
ClockPLLH
Line Termination
Line Termination
Line Termination
BSSGP
PPXX
BSSGP
PPXX
BSSGP
PPXX
LAP D
PPXX
CCSS 7
PPXX
MEMT TDPC
Telephony Processors
O&MInterface
IXLT
AdministrativeProcessor
UBEX
MPCC
to OMC
to LMT
. . .
TelephonySystem Bus
AdministrativeSystem Bus
AdministrativeExtended Bus
AdministrativeExtended Bus
xTLP
xTLP
xTLP
xTLP
xTLP
CPEX
Fig. 24 Bus systems
-
BSC architecture
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-
BSC architecture
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3 BSC Connections
-
BSC architecture
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3.1 Local Maintenance Terminal The proprietary interface between LMT and BSC (T interface) is based on X.21/V.11 using LAPB and HDLC protocol.
-
BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MSC
BTSE
BSC
LMT
IXLT
X.21/V.11
TRAU
SBS
Fig. 25 Connection BSC - LMT
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BSC architecture
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3.2 Operation and Maintenance Link The radio commander supports both X.25 networks and IP networks. So the system upgrade from X.25 networks to IP networks can be done smoothly and stepwise (BSC per BSC). The BCS connection to the RC is the O-link which can be realized by
a dedicated line through a X.25 packet data network PSDN , X.25D interface a 64 kbit/s time slot on PCMA/PCMS (nailed-up connection through the MSC),
X.25A interface
IP based O-link For redundancy two independent O-Links are supported (active-cold standby). The redundant OMAL always has to be of the same kind as the primary link.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IXLT-0
IXLT-1
Hub or Switch or Router
RC
CBC
LMT LAN
X
IP-0X.25 Dedicated
X.25 Dedicated
X.25 PCM Timeslot
X.25 PCM Timeslot
BSC
LMT V.11 64Kbit/sec
Standby MPCC-1
Active
MPCC-0
Test only
Fig. 26 IP based O-Link
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BSC architecture
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3.3 Gb interface
3.4 High speed Gb Interface The Gb interface can be realized by FR over E1/T1. The connection can be done in 4 different ways.
NUC through MSC to the SGSN NUC through MSC and then via Frame Relay network to the SGSN. a direct line and then via Frame Relay network to the SGSN a direct connection to the SGSN. The other opportunity is the realization of the Gb Interface over IP. Fast Ethernet (up to 100 Mbps) and Gigabit Ethernet (up to 1 Gbps) with IPv4 are supported. The standard is Ethernet II or IEEE802.3.
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BSC architecture
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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCUBSC Frame Relay
networkSGSN
MSC
E1/T1-Line
E1/T1-Line
E1/T1-Line
E1/T1-Line
1
2
3
4
TRAU
PCU SGSN
ESAM
R WAN R
Ethernet
Fig. 27 The different realization possibilities of the Gb interface
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BSC architecture
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BSC architecture
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4 Rack configuration
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BSC architecture
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4.1 Module combinations The following hardware configurations are supported:
BR9.0 QTLP STLP
SNAP SNAP
PPXX ("PPXL") PPXX ("PPXL")
PPXX ("PPXU") PPXX ("PPXU")
PWRS
Hardware Configuration Capacity (per BSC, fully equipped) QTLP / SNAP / PPXX 24 Mbit/s
STLP / SNAP / PPXX 48Mbit/s
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BSC architecture
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4.2 Rack layout The BSC consists of the Base and Expansion Subracks located in the same rack:
The Base Subrack represents the minimum configuration. The Expansion Subrack provides additional link interface modules QTLP/STLP
and the PCU for GPRS/EGPRS. There are different examples for BSC Rack Configuration shown:
The BSC equipped with the QTLP/SNAP/PPXX modules is the "High Capacity 1st Step 1" BSC or BSC72.
The BSC equipped with the STLP/SNAP/PPXX modules is the "High Capacity 2nd Step" BSC or BSC120.
All Hardware configurations can be used with the BR9.0 Software. The capacity depends on the modules that are used.
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BSC architecture
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4.2.1 BSC high capacity 1st step The Base Rack is full equipped with the mandatory modules. In the High Capacity 1st Step Configuration the Switching Network SNAP is used. The Line Trunk Cards are all QTLP. The Expansion Subrack has additional space for link modules and peripheral processors:
7 + 1 QTLP 6 PPXX 2 PWRS The Peripheral Processors in the Base Rack is 2 PPXL Modules, that handle the complete LAPD and CCSS7 signaling amount. The Peripheral Processors in the Expansion Subrack are optional 1 to 6 modules, that handle the packet switched traffic.
Notes The BSC72 supports 8 SS7 links with 2 PPXL boards in load sharing mode.
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BSC architecture
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Lamp Panel
QTLP8
QTLP7
QTLP6
PPXX7
PPXX6
PPXX5
QTLP5
QTLP4
QTLP3
PPXX4
PPXX3
PPXX2
QTLP2
QTLPS1
PWRS1
PWRS0
PLLH0
QTLP1
PPXX0
PLLH1
QTLP0
PWRS1
PWRS0
QTLPS0
PPXX1
DK400
IXLT0
UBEX0
SNAP0
TDPC0
MEMT0
MPCC0
MPCC1
MEMT1
TDPC1
SNAP1
UBEX1
IXLT1
Expansion
Fuse and AlarmPanel
Base
Fig. 28 BSC rack (BSC High Capacity 1st Step)
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BSC architecture
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4.2.2 BSC high capacity 2nd step The modules introduced with the BSC120 are: The Line Trunk Peripheral Boards type STLP (mandatory) The CPEX/ESAM module handling 16 additional External Alarms and performing
Control Panel supervision function
Power Supply modules used only in Base Subrack. The Expansion Subrack has additional space for link modules and peripheral processors:
7 + 1 STLP 12 PPXX The PPXX modules in the Expansion Rack are only used for GPRS/EGPRS. Superior Trunk Line Peripheral STLP boards support 6 Ports on each board with terminal A and B per port.
TIP For the Gb link via IP the modules ESAM and PPXX_V2 are required.
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BSC architecture
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ESAM
0
IXLT
0
UBEX
0
SNAP
0
TDPC
0
MEMT
0
MPCC
0
ESAM
1
IXLT
1
UBEX
1
SNAP
1
TDPC
1
MEMT
1
MPCC
1
PWR
1
PLLH
1
PWR
0
PLLH
0
STLP
1
STLP
0
STLPS0
STLP
2
PPXX
1
PPXX
0
STLP
5
STLP
4
STLP
3
STLPS1
STLP
9
STLP
8
STLP
7
STLP
6
PPXX
7
PPXX
6
PPXX
5
PPXX
4
PPXX
3
PPXX
2
PPXX
13
PPXX
12
PPXX
11
PPXX
10
PPXX
9
PPXX
8
Expansion Subrack
Base Subrack
Fuseand Alarm Panel
Fig. 29 BSC Rack (BSC High Capacity 2nd Step)
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BSC architecture
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4.3 Redundancy concept For reliability, certain modules are duplicated. There are the following opportunities for redundancy:
1:1 redundancy: one module is providing service, the other one is in spare module n:1 redundancy all modules are combined to a