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170 IEEE T R A N S A C T I O N S 3 N E L E C T R O N DEVICES, K Q C. ED-27 NO. 1, J A N U A R Y 1980

[8] A. Shintani, K. Suda, M. Suzuki, and K. Takami, Si02 p ar t i cu - [ I l l M. Zerbst, Z Angew. Phys., vol. 22, p. 30,1 966 .lates dispersed in CVD reactor, J. Electrochenz. SOC., vol, 124, [121 D.K. Schroder and H. C. Nathanson, On the separa tion of bulk191 W. W. Anderson, Tunnel curre nt limitations of narrow bandgap and surface components of lifetime using the pulsed MOS capaci-tor, Solid-state Electron., vol. 13, pp. 577-582, 1970 .infrared charge coupled devices, InfraredPhys., vol. 17, pp. [1 3] R.D. Thom,T. L. Koch, and W. J. Parrish, Indiumantimonide

[ l o ] R . D.Thom, F. J. Renda, W. J Parrish, and T. L. Koch, A infrared CCD linear imaging arrays with on s hi p preprocessifig,in Remore Sensing of Earth fr om Space: ole of Smart Sensors,monolithicnSb charge-coupled infrared imaging device, in R. A. Breckenridge, Ed., vol. 67 f Progress in Astrona utics ndProc. h t . Electroneviceseet., pp.01-504,1978. Aeronaurics, AIAA, 1979, pp. 411-423.

pp. 1771-1776,1977,147-164,1977.

Technology Development for lnSb Infrared imagersCHING-YEU W I , MEMBER, IEEE, KANG L. WANG, SENIOR MEMBER, IEEE, E. A. TAFT,JOHN M. SWAB, MEM BER,EEE, MARTIN D . GIBBONS, WILLIAM E. DAVERN,

AND DALE M B R O W , SENIOR MEMBER, IEEE

Abmtxt-InSbemiconductor technologyequired for infrared-dete ctor- arra y fabrications is described. High-quality MOS, MOSFET,and inear and two-dimens ional (2D) CIDevices have been success-fully fabricated. Interface-state densities of the MOS capacitors weredetermined to be less than 5 X 1OO cm e2 . eV-, respectively. Theseresults suggest that self-scanned m onolithic arrays could be fabricated.The performance of linear and 2D CID arrays were evaluated in termsof detectivity D) nd responsivity R). The average D of a 64-element line- array was measured to be 3.4 X 10 cm Hz1/*. W-which is 70 percent of that of background-limited-performance(BLIP) operation.The R was 1 X lo- V/photonwith 10-percentuniformity. The D and R were also obtained for a 32 X 32 2D rray.

T I. I N TRO D U CTI O NHE InSb infrared detector arrays for thedetection of3-5-pm radiation have received increasing atten tion overthe past few years. The types of detector arrays tha t havebeen investigated are CCD imagers [11, diode arrays [2 ], linearand two-dimensional (2D) CID arrays [3].Manuscript received June 20, 19 79; revised September 4 ,197 9. Thedesign and fabrication of the 64-ele men t line array was supported by

the Air Force Avionics Laboratory and the Air Force Weapons Labora-tory. The design and fabrication of the 16 X 64 two-dimensionalarraywas supported yhe Naval Research Laboratory under ContractC-Y. Wei, E. A. Taft, and D. M. Brown are with General Electric Cor-porate Research and Development, Schenectady, NY 12301.K. L. Wangwas with General Electric Corp orate d Research andDevelopment, Schenectady, NY 123 01. He is now with he Depart-me nt of Electrical Science and Engineering, University of California,Los Angeles, CA 90024.3. M Swab, M. D. Gibbons, and W. E. Davern arewithGeneralElectric Optoele ctronic Systems Operation, Syracuse, NY 13 201.

N00173-78-(2-0158.

This paper investigates the primary orbase technologiesrequired to fabricate InSb detectors in either linear-array struc-tures or 2D CID imagers. In addition, t presents results onInSb diode and MOSFET fabrication. The InSb MOSFET srequired for uture self-scanned monolithic focal-plane pro-cessors and on-chip amplifiers.The paper is divided into f our main sections. The first sec-tion describes the low-temperature chem ical vapor d eposition(CVD) Si 02 required for all phases of the work . The secondsection describes the fabrication and the characteristics ofInSb junctions and MOSFETs. The third section describes theMIS m easurements required t o characterize the electrical prop-erties of the Si0 2/In Sb interface. Finally, the fourth sectionoutlines the fabrication and measurement of operational linearand 2D C ID arrays.

11. LOW-TEMPERATUREVD OXIDEThe relatively low melting point of the compo und InSb leadsto concern about possible shifts in stoichiometry at elevatedtemperatures. This is especially true for surface layers where achange through evaporation or oxidation of one of the con-stituents relative to the other can take place. Dielectric filmsfor MIS devices are, therefo re, usually applied at the lowest

possible temperatures. We have shown the usual silicon tech -nology CVD reactor to be suitable for low-temperature filmsfrom the pyrolytic reaction of oxygen and silane [4]. Thegrowth rate data for several temperatures using a silane con-centration of 1 :1000 in a nitrog en carrier gas s shown nFig. 1. The most striking aspect of the curves is the sharp cut-off of growth with excess oxygen at all temperatures used. At0018-9383/80/0100-0170$00.75 1980 IEEE

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172 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-27, NO. 1 , JANUA.RY 1980

Fig. 3. Characteristicsof an insulatedgate ield-effect ransistoronInSb a t 7 8 K .

IV. MIS CAPACITORSMIS capacitors were fabricated on bothn- and p-type,(1 1 )B face InSb wafers. The carrier concentration was 5 X

l O I 4 at 77 K. The waferswere polished in nitric basedacid, rinsed in deionized water, and loaded in to the reacto r.CVD oxide of 120 0 was deposited on the InSb wafers atG200'C. After the deposition of the oxide film, a 15 0- 8 hinfilm of chromium, followed by a 5000-8 film of gold, wassputtered onto the wafers. MIS dots of 1.3 X 10-3-cm2 areawere then fabricated using standard photolithographictechniques.Interface state densities were measured using both the low-frequency capacitance technique [5] and the conductancetechnique [6 ]. In the low-frequency capacitance technique,the interface state densities were determined by comparing themeasured low-frequency capacitance curve with the theo-retical capacitance curve which assumes no interface states.The conductance technique requires the measurement ofcapacitance C,) and conductance (G,) curves at two inter-mediate frequencies between 500 Hz and 10 kHz. The equiva-lent parallel conductance ( Gp ) ,which results from the loss dueto the steady-state capture and emission of carriers by inter-face states, was derived from the measured C and G, t o o b-tain the interface state densities [6 ].The sensitivity of t he latter metho d is determined by theminimum detectable loss angle. Loss angles as small as 0.15'canbeeasily measured. For instance, a measurement on asimu lated s ample u sing a 1000-MS2 resistor in parallel with a38-pF capacitor produces a loss angle of 0.15'.This malllossangle indicates an instrumen tal sensitivity sufficient todetect in terface state densities of 10 cm-2 eV-' for an MIScapacitor of 1.3 X cm2 area and 12 00 -8 gate oxidethickness.Fig. 4 shows the capacitance and conductance curves of ann-type InSb MIS capacitor measured at various frequencies.The fact hat almost identical capacitance curveswere ob-tained at 1, 2 , and 5 Hz indicates tha t nearly all the interfacestates were in equilibrium during the measurements and a truequasi-equilibrium C-V curve was ob tained [5 ]. The interfacestate density as shown in Fig. 5 has a minimum of 5 X lolocm-2 eV-' in the upper half of the bandgap. This increasesto 5 X 10 1 cm-? eV-' in the lowerhalf of he bandgap.

30I iO h

0kHI1 0 I oVp (VOLTS1

Fig. 4. Capacitance and conductan ce curves for an MIS capacitor onn-type InSb at 7 7 K .10 28

6

am aa o B U R G L U N D S .TECHNI QUE

WROXIMATEDmm,mm TECHNIQUECONDUCTANCE

YI0;GAP E,c1 1 1 1 1 J

SURFACE P O T E N T IA L V O L T S )0. 0.15 0.2 0.25Fig. 5 . Calculated interface state densities from data as shown in Fig. 4.The interface state densities in the upper half of the bandgapmeasured by the conductance technique were 2 X 10" cm-?ev- ' .Some of the test devices showed n o detectable conductanceloss peak in depletion indicating interface state densities of

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WE1 e t al .: nSb INFRARED IMAGERS 1 1 3

TABLE ITEST RESULTSN THE THREE4-ELEMENT InSb CID LINE ARRAYSArr ay No.* Fil terntegra t ionys t e mesponsivity D*(cmHz'watt-')** FOV***(,urn ) (psec)Timeesponsivity (V/photon) StandardDevia t ion (ef f )

A 80 I ~ I O - ~ 0.1 1 3 . 4 ~ 1 0 ' ' 30'B 3.76-4.79 160 ~ x I O - ~ 0.04 2 . 5 ~ 1 0 ' ~ 44'C 4.85 160 ~ x I O - ~ 0.06 4 . 7 ~ 1 0 ' ~ 30

*Arrays A and C were eva lu a ted a t 78K and a r ray B w a s t e s t e d at 67K**This r epresents an a verage de te c t ivi ty of 64 e lements except for Ar ray A in which only 32 e lemen ts were tes ted.***This r epresents the e f fec t ive f ie ld of view which i s cor rec ted for the cold s top e f f ic iency.

Fig. 6. Photomicrograph of a 64 -element InSb CID line array.

using n-type InSb single crystal, doped in the low to mid10'4-cm -3 range. These materials had an etch pit density ofless than 100 cm-'. The wafers were chemically polished andcoated with a CVD oxide at 20OoC. The normal field oxidethicknesses were 6000 to 10000 A and the MIS capacitoroxides were 1200 to 1400 A thick.Chromium is used for the semitransparent gate metallizationand gold used for all lead busses. The transmission of the100-A-thick chromium layer is 50 t o 6 0percent after the low-temp erature CVD oxide has been deposited. This transmissionmeasureme nt was made using an IR spectrom eter.After the line array waferwas processed, the arrays wereprobed, diced, and a few chips per lot were selected for C-Vcharacterization. Fig. 6 shows the latest InSb CID line arraychips which has been fabricated for test. This is a 64-elementlinear array with the 65 th element being used for a test struc-ture. Three arrays were measured with a JFET preamplifier inthe dewar at 78 K . They were evaluated fordetectivity,responsivity, and no ise equivalent photon s using a com puter-automated test setup [3], [8 ] .Table I shows the results from the three arrays teste d. The

detectivity D " is defined as the minimum power th at a detec-tor c an see for a filter bandwidth (Ax) normalized to detectorswith 1 cm' area and amplifiers of 1-Hz bandw idth and is givenby [91

where A is the effective detection area of each element, f hebandwidth of the amplifier, Ps he power at the detector, V ,the signal voltage, and VN the noisevoltage.The measuredD* of 3.4 X 10 cm Hz'/' W-' a t 78 K for array A wasalso compared to the background-limited detectivity D(BLIP) which is given by [9]

The quantity h is the Planck constant, c the light velocity, QBthe photon flux from the background, and r the performanceefficiency which is the product of the quantum fficiency of adiscrete device and he eadou t efficiency of hestructure.The quantum efficiency was determined by the transmissionof gate m etal and peripheral edge collection area. The readoutefficiency depends on he substrate dopant level and gateoxide thickness. Thevalue of D & L I ~ ) as calculated to be4.9 X IO cm H Z ~ / ' W- or arrayA using A = 4.3 pm, r =48 percent, and QB = 4.7 X 1014 photons s-l cm-' for300 K. It is noted hat he average D * of 3.4 X 10" cmHz'/' W- measured on array A is approximately 70 percentof t he value of DTBLIp).No attempt was made to compare theBLIP operation for arrays B and C.The responsivity R is a m easure o f the signal outp ut of adetector in response to the radiation power impinging on thedetector. It is determined from the relation [8]

R E -NP (3)

where Np is the total num ber of signal pho tons arriving at thedetector during the integration time and V, is the amplifiedsignal oltage outp ut. The average responsivities obtainedwere 1 X 9 X and X V/pho ton for arraysA , B , and C, respectively. A responsivity plot for array B isillustrated in Fig. 7. It is noted that the standard deviation ofthe responsivity (u) for array B is only 4 percent.

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I3EE T R A N S A C T I O N S O N E L E C T R O N D E V I C E S , V O L . E D - 2 1 , N O . 1, J A N U A R Y 1980

TABLE I1MEASUREMENTSF 32 X 32 CID A RRA Y'S(peak)* N(RMS)** v5JvNesponsiviystem D*(cmHz'watt-')

V photon- 11.30v.7 V 1 5 0 1 . 3 ~ 1 0 - ~. 9 ~ 1 0 "*These were measured with the following expe:imental setup:Cold Shield = ~ 3 0 " OVBlackbody T empera tu re = 780KWatts on Detec tor (Pd) 2.86xlOYiWat tsQ Inc ident on Detec tor = 3.5~ 10 photon cm-2 ec- l&emGain = 138ElementArea = 2.55x10-5cm2Integration Time = 2.3 m s, Sampl ing ra t e = 445KH2, A f = 217 Hz**The quantities VS(peak) and VN(RMs) are th e peak signal voltage and th e root

mean square of the noise voltage, respectively.

Fig. 7. Responsivity plot of a 64-element InSb CID line array.

Ed. Two-DimensionalArraysThe 2D array processing is very similar to th at used for theline array. It requires eight levels of photoresist masking bu tuse $ the same dielectric and meta llization depo sitions. A32 X 32 2D CID InSb array has been fabricated. This arrayhas a p ixel size of 1.7 mils by 2.2 mils on 2.6-mils and 2 .8 -milscenters, respectively. Lloyd [9] describes the estsetup orthe 32 X 32 element array.Fior the characterization of this array , the frame integrationtjxne was set at 2.3 ms. This requires a samp ling rate o f 445kHz: in the first sample -and-ho ld circu it. The JFE T single-ended preamplifier voltage gain and he sampled signalgaintotalled 138 .For the D" measurement, a 780 K blackbody source and acoolled 4.12-pm narrow-bandpass filter with a 55-percenttran.smission and a 0.12-,am bandwidth were used. The fiiterand 2D array were both attached to the cold finger nside ad'ewar and the measurements were made at 77 K . The coldaperture had a diameter of0.5 cm and was 1 cm from thedietector. This field of view results in a background flux of

3 . 5 X 1013 photons s-l cm-2 incident on the detec tor. Theinput signal radiation through the filter from the blackbodysource was calculated to be 2.8 X lo-'' W.Table I1 summarizes the measured results on a 32 X 32 2Darray. The measured D* on this 2D array was2.9 X 10"cm *' Hz W-' and the 7 was 14 percent. This array wasmeasured in the charge-sharing mode [lo] (CSM) which pro-vided a high charge-transfer efficiency but increased the col-umn sense line capacitance and subsequently reduced the arrayresponsivity. Using 7 = 14 percent, Q = 3.5 X l O I 3 photons

Fig. 8. Photomicrograph of a 16 X 64 structure on InSb. The chip is0.317 X 0.177 in.s l cm-2 and h = 4.12 pm, the D* (B LP ) was calculated tobe 9.3 X 10 'l cm Hz"' W- l . Thevalue of he measurednoise equivalent charge (NEC) was 1576 carriers. The domi-nant noise in this measurement was due to the preamplifierand the second sample-hold circuitry. (A more detaileddescription of the noise analysis has been rep orted in [3] .Various 2D structures have been fabricated and evaluated forspecific applications. An example is shown in Fig. 8 ;a photo-micrograph ofa section of a recently processed 16 X 64structure.

VI. S U M M A R YMethods of processing and tests of components have beendescribed for devices on InS b. MIS capacitors of low inter-face state densities and high threshold stability were obtainedusing low-temperature CVD oxide. CID linear arrays havebeen shown to o perate successfully. Results on 2D arrayshave also been described. In addition, the successful fabrica-tion of p-n junc tions and MOSFET's as discussed here has

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