0 Context-Flow SOC Design Environment Rami Beidas Department of Electrical and Computer Engineering...
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1 Context-Flow SOC Design Context-Flow SOC Design Environment Environment Rami Beidas Rami Beidas Department of Electrical and Department of Electrical and Computer Engineering Computer Engineering University of Toronto University of Toronto rbeidas rbeidas @ @ eecg eecg . . toronto toronto . . edu edu
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2 Context-Flow Programming Model Motivated by coarse-grained parallelism abundant in multimedia and networking applications based on the concept of context Can be realized simply by two C library functions – cfNewContext, cfMalloc Directly supported by on-chip logics overlaid on top of the commercial on-chip fabrics (e.g.AMBA)
Transcript of 0 Context-Flow SOC Design Environment Rami Beidas Department of Electrical and Computer Engineering...
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Context-Flow SOC Design Context-Flow SOC Design EnvironmentEnvironment
Rami BeidasRami Beidas
Department of Electrical and Computer Department of Electrical and Computer EngineeringEngineering
University of TorontoUniversity of Toronto
rbeidasrbeidas@@eecgeecg..torontotoronto..eduedu
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MotivationMotivation
Functional complexities andFunctional complexities andcomputational requirementscomputational requirementsin projected SOCsin projected SOCs
The use of heterogeneous multiprocessor The use of heterogeneous multiprocessor architecture with on-chip interconnection networkarchitecture with on-chip interconnection network
Problems:Problems: Lack of programming modelLack of programming model Well-defined design flowWell-defined design flow
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Context-Flow Programming ModelContext-Flow Programming Model
Motivated by coarse-grainedMotivated by coarse-grainedparallelism abundant in multimediaparallelism abundant in multimediaand networking applicationsand networking applications
based on the concept of based on the concept of contextcontext Can be realized simply by two CCan be realized simply by two C
library functions – library functions – cfNewContextcfNewContext, , cfMalloccfMalloc Directly supported by on-chip logics overlaid on Directly supported by on-chip logics overlaid on
top of the commercial on-chip fabrics (e.g.AMBA)top of the commercial on-chip fabrics (e.g.AMBA)
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Towards Scalable ArchitectureTowards Scalable Architecture
Performance gain Performance gain demonstrated on a demonstrated on a number of real-life number of real-life applicationsapplications
For larger systems, a For larger systems, a two-layer approach is two-layer approach is usedused
Traffic-dependent upper Traffic-dependent upper layer communication layer communication architecturearchitecture
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MEM
MEM
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MEM
MEM
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PE PE PEPEPE
Tunnel
Average PE Utilization
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Towards Scalable SynthesisTowards Scalable Synthesis
Traditional HLS Traditional HLS algorithms vs. algorithms vs. complexity of target complexity of target applicationsapplications
Scalability of synthesis Scalability of synthesis algorithms at various algorithms at various HLS stagesHLS stages e.g. interprocedural e.g. interprocedural
register allocationregister allocation
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epic mpeg2d mpeg2e pgp rasta
BenchmarkNu
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Botton-UpGlobal
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Context-Flow SOC Design Context-Flow SOC Design EnvironmentEnvironment
RTL
PredefinedComponents
ArchSpecs
Appl inHLPL (C)
Integration
C to CF-C CF-C ScalableHLS
TraditionalRTL Flow
