© Copyright 2004 Dr. Phillip A. Laplante1

Kernel Architectures Polled Loop Synchronized Polled Loop State-Based Model Cyclic Executives Foreground/Background The task control block model

© Copyright 2004 Dr. Phillip A. Laplante2

Polled loop systems

for(;;) for(;;) {{ /* do forever *//* do forever */if (packet_here) if (packet_here) /* check flag *//* check flag */{{

process_data();process_data(); /* process data *//* process data */packet_here=0;packet_here=0;/* reset flag *//* reset flag */

}}}}

Hardware causes event

© Copyright 2004 Dr. Phillip A. Laplante3

Synchronized polled loops

Switch bounce phenomenon. The switch is closed at time t0, signaling the event, however, due to the ringing of the signal and the edge triggered logic several false events could be indicated

at times t1, and t2.

© Copyright 2004 Dr. Phillip A. Laplante4

Synchronized polled loops

for(;;)for(;;) {{ /* do forever /* do forever */*/

if(flag) if(flag) /* check flag /* check flag */*/{{ pause(20); pause(20); /* wait 20 ms /* wait 20 ms */*/ process_event(); /* process event */process_event(); /* process event */ flag=0; /* reset flag flag=0; /* reset flag */*/}}

}}

wait for switch to settle

© Copyright 2004 Dr. Phillip A. Laplante5

Cyclic executives

for(;;) for(;;) {{ /* do forever *//* do forever */ check_for_keypressed();check_for_keypressed(); move_aliens();move_aliens(); check_for_keypressed();check_for_keypressed(); check_for_collison()check_for_collison() check_for_keypressed();check_for_keypressed(); update_screen();update_screen();}}

}}

Cyclic executive for “Space Invaders.”

© Copyright 2004 Dr. Phillip A. Laplante6

Foreground/background systems

Foreground/background systems are the most common architecture for embedded applications. They involve a set of interrupt-driven or real-time processes called the foreground and a collection of non-interrupt driven processes called the background.

© Copyright 2004 Dr. Phillip A. Laplante7

The task control block model

A process state diagram as a partially defined finite state machine.