An integrated approach for designing and testing specific processors

CROSSTALK MINIMIZATION FOR COUPLED RLC INTERCONNECTS USING BIDIRECTIONAL BUFFER AND SHIELD INSERTION

ESTABLISHING A MOLECULAR COMMUNICATION CHANNEL FOR NANO NETWORKS

Cost effective test methodology using pmu for automated test equipment systems

HARDWARE EFFICIENT SCALING FREE VECTORING AND ROTATIONAL CORDIC FOR DSP APPLICATIONS

DESIGN OF THREE BIT ANALOG-TO-DIGITAL CONVERTER (ADC) USING SPATIAL WAVEFUNCTION SWITCHED (SWS) FETS

EVALUATION OF OPTICALLY ILLUMINATED MOSFET CHARACTERISTICS BY TCAD SIMULATION

A NEW LOW VOLTAGE P-MOS BULK DRIVEN CURRENT MIRROR CIRCUIT

Compact low power high slew-rate cmos buffer amplifier with power gating technique

Vlsics040307DESIGN AND IMPLEMENTATION OF CAR PARKING SYSTEM ON FPGA

Design of low power cmos logic circuits using gate diffusion input (gdi) technique

Low cost reversible signed comparator

CMOS LOW POWER CELL LIBRARY FOR DIGITAL DESIGN

Advanced atpg based on fan, testability measures and fault reduction

Multisim design and simulation of 2.2 g hz lna for wireless communication

A 20 gbs injection locked clock and data recovery circuit

POWER EFFICIENT CARRY PROPAGATE ADDER

Design and implementation of 4 t, 3t and 3t1d dram cell design on 32 nm technology

An operational amplifier with recycling folded cascode topology and adaptive biasing

Vlsics08