Bipolar Charge-Plasma Transistor: A Novel Three Terminal Device
Linearity and speed optimization in SOI LDMOS using gate engineering
Modeling and Simulation of Strained Silicon MOSFETs for Nanoscale Applications
Design of High-performance Schottky Structures using Technology CAD
New Silicon Carbide (SiC) Hetero-junction Darlington Transistor
Electrochemical Doulbe-Layer Capacitors Featuring Carbon Nanotubes
Approaches to Nanoscale MOSFET Compact Modeling using Surface Potential Based Models
Reflections on Teaching a Large Class
Estimation and Compensation of Process Induced Variations in Nanoscale Tunnel Field Effect Transistors (TFETs) for Improved Reliability
Compact Modeling of Partially Depleted Silicon-on-Insulator Drain-Extended MOSFET (DEMOS) including High-voltage and Floating Body Effects
Dielectric-Modulated Impact-Ionization MOS (DIMOS) Transistor as a Label-free Biosensor
Label free biosensor
Compact Analytical Model of Dual Material Gate Tunneling Field Effect Transistor using Interband Tunneling and Channel Transport
“Schottky Collector Bipolar Transistor without Impurity Doped Emitter and Base: Design and Performance
Sharing of Best Practices or Plagiarism?
A new SiC-emitter lateral NPM Schottky collector bipolar transistor on SOI for VLSI applications
A new Hetero-material Stepped Gate (HSG) SOI LDMOS for RF Power Amplifier Applications
A new SiGe Stepped Gate (SSG) Thin Film SOI LDMOS for enhanced breakdown voltage and reduced delay
New Silicon-Carbide Schottky-gate Bipolar Mode Field Effect Transistor (SiC SBMFET) Without PN Junction
Analytical Drain Current Model of Nanoscale Strained-Si/SiGe MOSFETs for Circuit Simulation
