ICRTEDC Conference Proceeding
A Hetero-Spacer-Dielectric Double-Gate Junctionless Transistor for Enhanced Analog Performance
Efficient Design of Differential Trans- Conductance Amplifier with Sub-Threshold Biasing Stabilizati
Binary Division Algorithms based on Vedic Mathematics: A Review
Layout Design Implementation of NOR Gate
A Review of Multi Resonant Slotted Micro Strip Patch Antenna (MPA) for IMT, WLAN &
Area Efficient 4-Bit Full Adder Design using CMOS 90 nm Technology
Design Analysis and Simulation of 25 TAP FIR Raised Cosine Filter
Blind Audio Source Separation (Bass): An Unsuperwised Approach
A Survey on Low Power VLSI Designs
A Flexible Scheme for Transmission Line Fault Identification Using Image Processing For a Secure
Semi-custom Layout Design and Simulation of CMOS NAND Gate
Smart System using Fuzzy, Neural and FPGA for Early Diagnosis of Renal Disease
T- Shape Antenna Design for Microwave Band Applications
Performance Analysis of Full Adder Based 2- Bit Comparator using Different Design Modules
OCR optimization for vehicle number plate Identification based on Template matching
An Implementation and Comparison of IO Expander on Zed Board and Spartan 3E for Low Cost & Area Effi
A Review Report on Existing Routing Protocols in Vehicular Ad Hoc Networks (VANETS)
Layout Design Comparison of CMOS and Gate
Gait Recognition using MDA, LDA, BPNN and SVM