l i a b l eh k C o m p u t i n gL a b o r a t o r y

Yield Enhancement for 3D-Stacked Memory by Redundancy

Sharing across Dies

Li Jiang, Rong Ye and Qiang XuPresenter: Qiang Xu

CUhk REliable Computing LaboratoryDepartment of Computer Science & Engineering

The Chinese University of Hong Kong

Outline Introduction

Motivation

Redundancy Sharing in 3D-Stacked Memory

Die Matching for Yield Enhancement

Conclusion

Why 3D-stacked Memory?

1980 1990 2000 Now

CPU-MemoryPerformance

GapRela

tive

Pe

rfor

man

ceMemory Wall

SmallDie SizeRouting Cost

LargeBandwidt

h

ReducedBus CapLatency

TSV as Bus

Memory Controller

DRAM Array

Peripheral Layer

3D-Stacked DRAM are Already Here …

2002 Tezzaron:1Gb,SDRAM

NEC:4Gb2006

4 Gbit density

Interposer

Peripherals 3 Gbps/pin

8 strataTSV

2009 SamSung:8GbPCB

TSV DRAM

I/O BufferRD/WR

DRAM Die

Logic Die

IMEC:DRAM+Logic

GATech+Tezzaron2010

Higher Bandwidth

Faster

Closer to Processor

TSV as Bus

Memory Controller

DRAM Array

Peripheral Layer

×

Memory Test: Fault Bitmap

Redundancy Analysis

Stack Self-Reparable Dies

To Guarantee Yield for 3D-Stacked Memory …

More self-reparable dies High redundancy cost!

12345

1 2 3 4 5

12345

1 2 3 4 5

1235

135

145

245

Solution

1R, 2C, Irreparable

Redundancy Analysis for Reparability

1R, 2C, Self-Reparable

12345

1 2 3 4 5

12345

1 2 3 4 5

1235

135

145

245

Solution

1234567

1 2 3 4 5 6

1234

12345

67

56

1R, 2C, Irreparable

0R, 3C, Reparable2R, 1C, Reparable

Redundancy Sharing for Yield Enhancement

1R, 2C, Self-ReparableWith the same amount of resources, memory yield can be improved by redundancy sharing!

Redundancy Sharing across Dies

Programmable Decoder

Bit-arraySpares Rows

TSVsL1

L2

Pre-fabricated multiplexor

Full sharing: NumTSV = NumSpare Row + NumSpare Col

Repair its own block.Use the rest to repair others

What if there are defective TSVs?

Bit-array

TSVsL1

L2

Spares Rows

Programmable Decoder Pre-fabricated multiplexor

Partial sharing : Less TSVs

Redundancy Sharing across Dies

A

B

C

D

1 2 Self-reparable matching: Yield = 25%

Aggressive matching: Yield = 0%

Effective matching: Yield = 75%

Conservative matching: Yield = 50%

Matching is Critical for the Final Yield

How to Conduct Die Matching?

Add edges if two dies are reparable with

redundancy sharing

Conductmaximum matchingalgorithm

Construct an

undirected graphwith each die as an vertex

How to Conduct Die Matching?

How do we know whether two dies are reparable after bonding? Run final repair algorithm between every pair Best yield, but time-consuming

We have to estimate whether two dies matched together can form a reparable stack efficiently

Fr: faulty bits suitable for row repairFc: faulty bits suitable for column repairFo: orthogonal faulty bits

1

2

3

4

6

7

8

95

Die Matching a.t. Reparability Condition

Die Matching a.t. Reparability Condition

Optimal Matched Dies

Matched Dies

Self-reparable Dies

Matching a.t. reparability condition is rather conservative

Irreparability Condition

Given a bipartite graph G = (V;E), the minimum number of vertices that cover all the edges is equal to the number of edges in any maximum bipartite matching of the graph

Given two memory blocks with redundancy R/C The maximum bipartite matching of Ga, Gb are |Ma| and |Mb|, the

stacked memory is considered to be “reparable” if

|Ma| +|Mb| ≤ Ra + Ca + Rb + Cb

1

2

3

4

6

7

8

95

7

8

9

1

2

3

4

6

5

Matched Edge UnMatched Edge

Die Matching a.t. Irreparability Condition

Reparability is NOT guaranteed due to redundancy configuration!

Die Matching a.t. Irreparability Condition

Optimal Matched Dies

Self-reparable Dies

Reparable Dies a.t. Irreparability Condition

Matched Dies a.t.Irreparability Condition

Matching a.t. irreparability condition is rather aggressive

Iterative matching a.t. tightened irreparability condition in each run

Iterative Die Matching

Optimal Matched Dies

Reparable Dies a.t. Irreparability Condition

Matched Dies a.t.Irreparability Condition

+ |Ma| +|Mb| ≤ Ra + Ca + Rb + Cb0

Iterative matching a.t. tightened irreparability condition in each run

Iterative Die Matching

+ |Ma| +|Mb| ≤ Ra + Ca + Rb + Cb1

Rest of Dies

Reparable Dies a.t. Irreparability Condition

Matched Dies a.t.Irreparability Condition

Iterative matching a.t. tightened irreparability condition in each run

Iterative Die Matching

+ |Ma| +|Mb| ≤ Ra + Ca + Rb + Cb2

Iterative matching a.t. tightened irreparability condition in each run

Iterative Die Matching

+ |Ma| +|Mb| ≤ Ra + Ca + Rb + Cbk

No more reparable dies found

Experiment Setup

1000 1Gb Memory, stacked to 2 Layer chips 4×4 memory blocks, 8k×8k bit-cells

Fault Injection Poisson distribution with λ = 2.130 Polya-Eggenberger distribution with λ=2.130

α = 2.382 (more clustered faults)α = 0.6232 (evenly-distributed faults)

random TSV faults with faulty rate as 0.1% six kinds of faults

Fault Single Cell Double Cell Single Row Single Col Double Row Double Colcase 1 40% 4% 20% 20% 8% 8%case 2 70% 4% 8% 8% 5% 5%

6*6 10*10 14*14 18*180

100

200

300

400

500

600

Self-reparableReparabilityMatched IrreparabilityIrreparabilityIterative

Experimental ResultsPoisson Distribution

6*6 10*10 14*14 18*180

100200300400500600

Case 1

Case 2

6*6 10*10 14*14 18*180

100200300400500600

Self RepairReparabilityMatched IrreparabilityIrreparabilityIterative

Experimental Results

Chart Title

Experimental ResultsPolya-Eggenberger Distribution

6*6 10*10 14*14 18*180

100200300400500600

α = 0.6232

6*6 10*10 14*14 18*180

100200300400500600

α = 2.38

Self RepairReparabilityMatched IrreparabilityIrreparabilityIterative

We propose to conduct redundancy sharing across vertical dies in 3D-Stacked Memory Significant yield enhancement Minor TSV and routing cost

We present novel solutions for selective die matching to maximize 3D-stacked memory yield

Summary

l i a b l eh k C o m p u t i n gL a b o r a t o r y

Thank you for your attention !