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Slide Slide 11Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Supplemental Slides:Supplemental Slides:
MIMO Testbed Development at MIMO Testbed Development at the MPRG Labthe MPRG LabRaqibul MostafaRaqibul MostafaJeffrey H. ReedJeffrey H. Reed
Slide Slide 22Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
OverviewOverview
Space Time Coding (STC) OverviewSpace Time Coding (STC) OverviewVirginia Tech Space Time Adaptive Radio Virginia Tech Space Time Adaptive Radio (VT(VT--STAR) description:STAR) description:
System Architecture, RF Specs, TX/RX system, System Architecture, RF Specs, TX/RX system, Interface, DSP Implementation, Indoor Interface, DSP Implementation, Indoor channel measurements channel measurements
SDRSDR--30003000
Slide Slide 33Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Space Time Coding (STC) OverviewSpace Time Coding (STC) Overview
Slide Slide 44Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
STC FundamentalsSTC Fundamentals
((nnTT , , nnRR) ) -- ( # of Tx. Ant., # of Rx. Ant.)( # of Tx. Ant., # of Rx. Ant.)
Rx dataSignal Processing Techniques
Rx
Rx
Rx
•••••
1
2
nR
Info data
Tx
Tx
Tx
Vector Encoder
•••••
ct1
ct2
ctnT
Fading Coefficients
ij
:
α
1
1,2,...,Tn
j i jt ij t t R
ir c ISI MAI j nα η
=
= ⋅ + + + =∑
Slide Slide 55Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
STC FundamentalsSTC Fundamentals
BackgroundBackgroundSpaceSpace--time codes were proposed by time codes were proposed by TarokhTarokh et. al. in the 1997 et. al. in the 1997 International Symposium on Information Theory (ISIT).International Symposium on Information Theory (ISIT).Capacity analysis of the MIMO channel was proposed by Capacity analysis of the MIMO channel was proposed by FoschiniFoschiniand and GansGans of Lucent Technologies in 1997.of Lucent Technologies in 1997.
Features of STCFeatures of STCMove diversity burden from mobile to base stationMove diversity burden from mobile to base stationDiversity advantageDiversity advantageCoding gainCoding gainIncreased bandwidth efficiencyIncreased bandwidth efficiency
Slide Slide 66Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
STBC OperationSTBC Operation
S*S*oo--S*S*11
Time Time t+Tt+T
SS11SSoo
Time tTime t
Transmit Transmit Antenna 2Antenna 2
Transmit Transmit Antenna 1Antenna 1
Space
Time
Combiner
Channel Estimation
Maximum Likelihood Detector
Channel Estimation
Space-Time Block Encoding
2222 22
jh e θα=
1212 12
jh e θα=
2121 21
jh e θα=
1111 11
jh e θα=
0s%
1s%
0s
1s1
2
1
2
( )20,min k
ki d s s⎡ ⎤= ⎣ ⎦%
22h12h
21h11h
Slide Slide 77Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
STBC PerformanceSTBC Performance
mutually uncorrelated mutually uncorrelated Rayleigh fading Rayleigh fading channels channels Channel flat for one Channel flat for one block of STBCblock of STBCperfect knowledge of perfect knowledge of channel state channel state information (CSI) at the information (CSI) at the receiver receiver Total Tx power sameTotal Tx power sameRx Signal power for Rx Signal power for MRRC 3 dB more than MRRC 3 dB more than CC--STBCSTBC
Slide Slide 88Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
VTVT--STAR: A 2STAR: A 2××2 MIMO Testbed2 MIMO Testbed
Slide Slide 99Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
IntroductionIntroduction
Objective:Objective:To build a testbed to demonstrate the utility of MIMO techniquesTo build a testbed to demonstrate the utility of MIMO techniquesand to provide with MIMO indoor channel measurementsand to provide with MIMO indoor channel measurements
Testbed development based on software defined radio Testbed development based on software defined radio (SDR) approach for flexibility and reconfigurability(SDR) approach for flexibility and reconfigurabilityDSP processing platform for both the transmitter and the DSP processing platform for both the transmitter and the receiverreceiverImplemented MIMO technique based on Space Time Implemented MIMO technique based on Space Time Block Code (STBC)Block Code (STBC)Other MIMO techniques also possible through DSP Other MIMO techniques also possible through DSP programmingprogramming
Slide Slide 1010Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
VTVT--STAR System ArchitectureSTAR System Architecture
RF Section
Data Conversion
DSP Core
Application Layer (Host)
DSK
Slide Slide 1111Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
RF SpecificationsRF Specifications
5050ΩΩTransmitter/Receiver Input/Output Transmitter/Receiver Input/Output ImpedanceImpedance
26dBm / 0 26dBm / 0 dBmdBmTransmit Power (Maximum/Nominal)Transmit Power (Maximum/Nominal)
Baseband I/Q, 140 mV Baseband I/Q, 140 mV RMSRMS
Receiver OutputReceiver Output
Baseband I/Q, 35 mV RMSBaseband I/Q, 35 mV RMSTransmitter InputTransmitter Input
60 dB60 dBSpuriousSpurious--Free Dynamic Range (SFDR)Free Dynamic Range (SFDR)
--50 50 dBmdBmMaximum Receiver Input PowerMaximum Receiver Input Power--110 110 dBmdBmReceiver Noise FloorReceiver Noise Floor
750 kHz750 kHzMaximum Signal BandwidthMaximum Signal Bandwidth2050 MHz2050 MHzCenter FrequencyCenter Frequency
ValueValueRF ParameterRF Parameter
Slide Slide 1212Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
MultiMulti--Channel RF TransmitterChannel RF Transmitter
Slide Slide 1313Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
MultiMulti--Channel RF ReceiverChannel RF Receiver
Slide Slide 1414Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Synchronization of 4 DAC Synchronization of 4 DAC EVMsEVMs
•CDC
•• XWE
• DSK J1 interface
•D11-D4•CLK•D11-D4•CLK•D11-D4 •CLK•D11-D4 •CLK
•XD31-XD24 •XD23-XD16 •XD15-XD8 •XD7-XD0
•DAC1•I1
•DAC2•Q1
•DAC3•I2
•DAC4•Q2
Slide Slide 1515Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
C6701 DSPC6701 DSP
32 bit Floating point DSP 32 bit Floating point DSP Advanced Advanced VelociTIVelociTI VLIW architectureVLIW architecture133 MHz133 MHz1064 1064 MFLOPsMFLOPs2 2 MACsMACs per cycle per cycle 32 general32 general--purpose registers purpose registers Eight highly independent functional unitsEight highly independent functional unitsIntegrated Development Environment (IDE) Integrated Development Environment (IDE) Code ComposerCode Composer
Slide Slide 1616Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
VTVT--STAR ReceiverSTAR Receiver
RF SECTION
RF SECTION
ADC
ADC
ADC
ADC
TI-C67 DSP
THS1206
I1
Q1
I2
Q2
I1
Q1
I2
Q2
Analog Baseband
Digital Baseband
CLOCK
λ/4 monopole antennas
on a Ground plane
RF Rx Front End
THS 1206 ADC boardMated to C67 DSP EVM
Host PC
Slide Slide 1717Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Transmitter: DSP ImplementationTransmitter: DSP ImplementationFlowchart
Slide Slide 1818Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Receiver: DSP ImplementationReceiver: DSP Implementation
Slide Slide 1919Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
DSP Host CommunicationDSP Host Communication
RealReal--time data exchange (RTDX)time data exchange (RTDX)bibi--directional realdirectional real--time transfer between DSP time transfer between DSP and the host PC and the host PC
Application Layer of radioApplication Layer of radioDisplay key parameters of physical layer in Display key parameters of physical layer in MATLABMATLABCollect data for offline postCollect data for offline post--processing processing Modify a video sequence on a video EmulatorModify a video sequence on a video Emulator
Slide Slide 2020Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Validation: Back to Back testingValidation: Back to Back testing
• The TX and RX subsystems were connected back-to-back: The DACs and the ADCs were directly connected• Channel estimates showed that direct components (h11 and h22) were much stronger than the cross components (h21 and h12): about 25 dB higher• This setup validates the system.
Slide Slide 2121Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Measurement set upMeasurement set up
•MPRG DSP LAB AREA LOS and NLOS dry-wood column partition
•Durham Hall 4th Floor Corridor
•Receiver
•Transmitter
•MPRG Student’s
Cubicle Area
Lab with desks Lab with desks workbenches and workbenches and metallic shelvesmetallic shelvesLine Of Sight & Line Of Sight & Non line of sight Non line of sight (NLOS) considered(NLOS) consideredTransmitter and Transmitter and receiver placed in receiver placed in fixed locations fixed locations before before measurementmeasurement
Slide Slide 2222Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Measured Channel capacityMeasured Channel capacity
2 4 6 8 10 12 140
0.02
0.04
0.06
0.08
0.1
0.12
0.14
PD
F
Capacity [bps/Hz]
SISO Channel: nT = 1; nR = 1 MISO Channel: nT = 2; nR = 1 SIMO Channel (SD): nT = 1; nR = 2 SIMO Channel (OC): nT = 1; nR = 2 MIMO Channel: nT = 2; nR = 2
0 10 20 30 40 50 60 70 802
4
6
8
10
12
14 VT-STAR Channel Capacity per path; nT = 2; nR = 2; Non-Line-of-Sight Measurements
Time [sec]
Cap
acity
[bps
/Hz]
Ch11
Ch12
Ch21
Ch22
CMIMO
HistogramChannel Capacity over time
A key result for flat Rayleigh fading channels (Foschini and Gans)(nT , nR): ( # of Tx. Ant., # of Rx. Ant.)H: Channel matrix of fade coefficients
†2log det
RnT
SNRC I H Hn
⎡ ⎤⎛ ⎞= + ⋅⎢ ⎥⎜ ⎟
⎝ ⎠⎣ ⎦
Slide Slide 2323Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
SDR 3000 Software Radio System SDR 3000 Software Radio System
Slide Slide 2424Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
IntroductionIntroduction
SDRSDR--3000 is a versatile wideband multi3000 is a versatile wideband multi--channel transceiver channel transceiver testbed:testbed:
RealReal--time implementation of communications systemstime implementation of communications systemsBaseband algorithm development and verificationBaseband algorithm development and verificationWideband MIMO algorithm demonstrationWideband MIMO algorithm demonstrationMIMO channel measurement and characterizationMIMO channel measurement and characterization
SDRSDR--3000 offers communications system design and 3000 offers communications system design and implementation using implementation using software defined radiosoftware defined radio (SDR) (SDR) conceptsconcepts
Slide Slide 2525Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
SDRSDR--3000 Basic Features3000 Basic Features
Combines Combines XilinxXilinx VertixVertix FPGA with MPC7410 G4s in a single systemFPGA with MPC7410 G4s in a single system
Supports 4 ADC at 80MHzSupports 4 ADC at 80MHz
Supports 4 DACs at 80/160MHzSupports 4 DACs at 80/160MHz
Support high density and/or high performance software defined raSupport high density and/or high performance software defined radios dios
SDR can support 10s of separate transmit and receive channels, eSDR can support 10s of separate transmit and receive channels, each with ach with independent air interface protocol. independent air interface protocol.
Multiple air interface supported by softwareMultiple air interface supported by software
Software Communications Architecture (SCA) compliant multiSoftware Communications Architecture (SCA) compliant multi--channel channel software radio transceiver systemsoftware radio transceiver system
Slide Slide 2626Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
SCA OverviewSCA Overview
Now a joint project of JTRS and SDR Forum Now a joint project of JTRS and SDR Forum –– most most participants are members of bothparticipants are members of both
An attempt to develop a “universal” SDR architecture An attempt to develop a “universal” SDR architecture (five identified domains)(five identified domains)
•• Emerging standard for software radio complianceEmerging standard for software radio compliance
Still a work in progress Still a work in progress -- Currently v2.2Currently v2.2
SCASCA-- Important step to enable widespread use of Important step to enable widespread use of software radiossoftware radios
Develops an object oriented approach to radio designDevelops an object oriented approach to radio designEnables independent vendors to develop software modules that Enables independent vendors to develop software modules that are compatible with each otherare compatible with each other
Slide Slide 2727Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
System DescriptionSystem Description
3 3 cPCIcPCI--based boardsbased boardsTM1TM1--3300: Analog I/O 3300: Analog I/O board supporting 2 board supporting 2 80MHz ADCs and DACs80MHz ADCs and DACsPROPRO--3100: High speed 3100: High speed processing board with 4 processing board with 4 user programmable user programmable XilinxXilinx VirtexVirtex--II II FPGAsFPGAs, , and 1 MPC7410 and 1 MPC7410 PowerPCPowerPCProPro--3500: Signal 3500: Signal processing board with 2 processing board with 2 G4 PowerPCs and 1 G4 PowerPCs and 1 MPC7410 PowerPC for MPC7410 PowerPC for controlling the boardcontrolling the board
Slide Slide 2828Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
SDRSDR--3000 Functional Block Diagram3000 Functional Block Diagram
Air Interface
High Frequency
Ana log
Intermed iate
Frequency
Digita l
Intermed iate
Frequency
Baseband Data,
Encoded
Chnnelizer
SDR-3000 T ransceiver Subsystem
Baseband processing
Stage 1 Stage 2 Stage 3 Stage 4 Stage 5
Single Board
Computer
Analog-to -DigitalConve rsion
DigitalDown Conversion
Signa lProcessingRF Analog-to -Digital
Conve rsionDigital
Down ConversionSigna l
ProcessingRF
Digital-to-AnalogConve rsion
DigitalUp Conversion
Signa lProcessingRF Digital-to-Analog
Conve rsionDigital
Up ConversionSigna l
ProcessingRF
Baseband Data,
Decoded
FPGA
PPC
PPC
PRO-3500
FPGA
PPC
PPC
PRO-3500
FPGAFPGAFPGAFPGAI/O
Framer
PRO-3100
FPGAFPGAFPGAFPGAI/O
Framer
PRO-3100
ADCADC
ADCADC
DACDAC
DACDAC
TM1-3300
ADCADC
ADCADC
DACDAC
DACDAC
ADCADC
ADCADC
DACDAC
DACDAC
TM1-3300
(From Sp ectrum signal Processin g)
Slide Slide 2929Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
SDRSDR--3000 Testbed Goals3000 Testbed Goals
Build a testbed based on SDR 3000 for MIMO testingBuild a testbed based on SDR 3000 for MIMO testing
Perform IF digital up and down conversion operations Perform IF digital up and down conversion operations within the PROwithin the PRO--3500.3500.
Signaling format: OFDM based physical layer.Signaling format: OFDM based physical layer.
TX RF frontTX RF front--end: VTSTAR transmitterend: VTSTAR transmitter
RX RF frontRX RF front--end: SIGNIA 9136 receiver end: SIGNIA 9136 receiver
Slide Slide 3030Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
SystemSystem
SDR 3000 based Base band and IF
Signia 9136 receiver
16.25 MHZIF
2.05 GHz RF
IF sampling frequency : 65 MHz ( 4 times over sampled )Bandwidth used : 17.56 MHz
SDR 3000 based Base band and IF
VTSTAR RF front end
16.25 MHZIF
2.05 GHz RF Transmit chain
Receive chain
Slide Slide 3131Ellingson, Ellingson, MostafaMostafa, & Reed , & Reed –– Sept 19, 2004Sept 19, 2004
Current statusCurrent status
Implemented 802.11a based OFDM physical layer Implemented 802.11a based OFDM physical layer baseband on PRObaseband on PRO--35003500
Validated on SDRValidated on SDR--3000 using TX/RX loop back3000 using TX/RX loop back
Digital up and down conversion from base band to IF Digital up and down conversion from base band to IF tested on SDRtested on SDR--3000 through loop back.3000 through loop back.
RF front end tested through loop back.RF front end tested through loop back.
IF to RF integration in progress.IF to RF integration in progress.