Post on 10-Feb-2016
description
• Refer example 2.4on page 64 ACA(Kai Hwang)
• Refer to fig 2.23 on page no 91 from ACA book (KAI HWANG)
• Different classes of Multistage Interconnection Networks(MINs) differ in switch module and in the kind of interstage pattern used.
• The patterns often include perfect shuffle,butterfly,crossbar,cube connection etc
Omega Network• A 2 2 switch can be configured for
– Straight-through– Crossover– Upper broadcast (upper input to both outputs)– Lower broadcast (lower input to both outputs)– (No output is a somewhat vacuous possibility as well)
• With four stages of eight 2 2 switches, and a static perfect shuffle for each of the four ISCs, a 16 by 16 Omega network can be constructed (but not all permutations are possible).
• In general , an n-input Omega network requires log 2 n stages of 2 2 switches and n / 2 switch modules.
Patterns
16 x 16 omega network
Recursive Construction
(Refer fig 2.25 on page 93 ACA kai hwang)• The first stage contains one NXN block and
second stage contains 2 (N/2)x (N/2) sub blocks labeled Co and C1.
• This construction can be recursively repeated to bub block until 2x2 switch is reached.
4 x 4 Baseline Network
• A crossbar network can be visualized as a single-stage switch network.
• Like a telephone switch board, the crosspoint switches provide dynamic connections between(source, destination) pairs.
• Each cross point switch can provide a dedicated connection path between a pair.
• The switch can be set on or off dynamically upon program demand.
Shared Memory Crossbar
• To build a shared-memory multiprocessor, one can use a crossbar network between the processors and memory modules (Fig. 2.26a).
• The C.mmp multiprocessor has implemented a 16 x 16 crossbar network which connects 16 PDP 11 processors to 16 memory modules, each of which has a capability of 1 million words of memory cells.
Shared Memory Crossbar Switch
Shared Memory Crossbar Switch
• Note that each memory module can satisfy only one processor request at a time.
• When multiple requests arrive at the same memory module simaltaneously,cross bar must resolve the conflicts.
Interprocess Communication Crossbar Switch
• This large crossbar was actually built in vector parallel processor.
• The PEs are the processor with attached memory.
• The CPs stand for control processor which are used to supervise entire system operation.
Interprocess Communication Crossbar Switch
End Of Module 5