Proposal for LST-based IFR barrel upgrade Roberto Calabrese Ferrara University Workshop on IFR...

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General overview The entire project is driven by the allowed space The intrinsic efficiency of a standard LST tube is about 90%. This is due to dead spaces in the LST tubes. Efficiency is too low for our purposes. Not enough space to put 2 standard layers.

Transcript of Proposal for LST-based IFR barrel upgrade Roberto Calabrese Ferrara University Workshop on IFR...

Proposal for LST-basedIFR barrel upgrade

Roberto Calabrese

Ferrara University

Workshop on IFR replacement, SLAC, 11/14/2002

Outline General Overview Layout geometry Performance Readout methodology Electronics Gas, HV, DAQ Costs Other presentations

General overview The entire project is driven by the allowed space

The intrinsic efficiency of a standard LST tube is about 90%.

This is due to dead spaces in the LST tubes.

Efficiency is too low for our purposes. Not enough space to put 2 standard layers.

Possibilities to improve efficiency(given the allowed space) Option 1: single-layer with a large cell (19x17 mm)

Readout of x and y coordinates from outside strips

Possibilities to improve efficiency Option 2: double-layer with a small cell (9x8mm)

Readout of x coordinate from wire and y coordinate from outside strips

Possibilities to improve efficiency Option 3: modified double-layer with a small cell (9x8mm)

Readout of x and y coordinates from outside strips

Detector layout: segmentation of a detector layer

Z strip readout

Layer of LST

Ф strip readout

Z strip signal collection PCB

Z strip signal collection PCB

Ф strip signal collection PCB(a similar one in the opposite corner)

PCB for cable connectors

PCB for cable connectors

Servizio Elettronico INFN Ferrara

Detector layout: details of strip signal collection PCB

Servizio Meccanico INFN Ferrara

Performance Expected efficiency about 96% Position resolution better than 3 mm (z)

for standard LST better than 9 mm ()

We do not need such a resolution and we can increase the strip width, thus decreasing the number of channels ( MC simulation)

Detector layout: questions How many strips?

resolution, cost, space

How many chambers/layer ?installation, cost

Detector layout: answer to the questions We are considering 4 cm z-strips and 4.3 cm -strips

(2 -strips (along the wire)/LST tube) 96 z-strips for each layer, total 6912 z-strips 74 -strips for the outer layer, total 4572 -strips

About 11500 channels of electronics

2 chambers/layer (remove only one corner block at the time), but the number of z-strips doubles (more cables, but same number of electronics channels) or we need to decouple z-strips from the chambers

Readout methodology Only digital readout of strips

Time measurements could be implemented: OR of 16 discriminated pulses Time resolution about 16 ns ( using BaBar reference clock) Implemented with FPGA

Electronics FEC gain depends on the shape of the signal

FEC ampli cannot be used

Existing FEC: to be modified if we want to use them (when?) the baseline is to use new electronics

Front end module design : block diagram of the NEW 96 channel (1 view of 1 layer) FEC

96x Amplifier-Discriminator

11us

Dig

ital O

neSh

ot

Shift/LoadCk_Chain Data Out

SHIFT REGISTER

96 x

Threshold

12us

Dig

ital O

neSh

ot

11us

Dig

ital O

neSh

ot

12us

Dig

ital O

neSh

otShift/Load To the Active Patch Panel

ahead of the FIFO Board

6 x6 x

6 x

Implemented in a single high performance FPGA (Field Programmable Gate Array)

Cost per channel inclusive of:

-components

-PCB

-crate&power supply

10 € / channel

Servizio Elettronico INFN Ferrara

Front end module design : schematic of the front end based on Off-The-Shelf components

Power dissipation: 250mW

Servizio Elettronico INFN Ferrara

Front end module design : analog simulations, effect of strip capacitance and impedance

Simulation of the amplifier/discriminatoroutput from a 4pC input signal(0.1mA * 40ns)Comparator threshold = 50mV

dielectric thickness 0.75mma) dielectric FOAM (εr=1)

b) dielectric PTE (εr=3.3)

c) dielectric FR4 (εr=4.8)

a) b)

c)

Servizio Elettronico INFN Ferrara

Gas system mass flow control system main gas transport pipe system (existing) final gas distribution and bubbling system.

We assume all the tubes in a layer with a single in/out Safe gas mixture, like Ar/Iso/CO2 (2.5/9.5/88) (SLD)

HV, DAQ

Each tube has a separate HV connection ( 2 for a double layer tube) Possibility to use a commercial HV system for LST available

from CAEN (SY546 mainframe + 12 channel boards A548),150 $/channel

DAQ No change, all signals are FEC-like

Costs: assumptions

double layer LST with 8mm cells; each layer with a separate HV; each ground returning separately through a measuring resistor 96 strips (40 mm strips) in the z direction; 2 strips per LST in the direction 2 chambers/layer (double the number of z strips signals) 12 active layers

Costs (I) Tubes:

30 K$ (setup) 450 K$ ( about 200 $/tube x 2280 double layer tubes)Total cost tubes 480K$

(using single layer tube this cost would be about 300K$) Strip readout planes

240 m2/layer x 6 layers x 50 $/m2 = 72 K$Signal collection (PCB’s) inside iron 18 K$Total cost readout planes 90 K$

Grand total chambers 570K$ (double layers); 390K$ (single layers)

Total cost of signal flat cables 146 K$ (outside iron) 15 K$ (inside iron)

Total cost of signal flat cable connectors 28 K$ Total cost of electronics 115 K$ Service panels 4 K$ Total cost of LV ground wire 5 K$ Total cost of LV plugs 4K$ TDC system 20K$ (optional)

Total electronics + cables 322 K$ (maximum); 171 K$ (minimum)

Costs (II)

Costs (III) Total cost of HV wire 23 K$ Total cost of HV banana plugs 9 K$ Total cost of HV power supply+distributors 170 K$ Total cost of mass flow control system 11 K$ Total cost bubbling system 4 K$ DAQ, cooling no expected cost

Total this page 217 K$

Grand total detector 780 K$ 1100 K$

Addressing the various issues R&D issues and status Changguo Lu

LST experience andproduction issues Mario Posocco

Installation issues Livio Piemontese