Post on 19-Jul-2020
Polymer Interconnects for Datacom and Sensing
Richard Penty, Ian White, Nikos Bamiedakis, Ying Hao, Fendi HashimRichard Penty, Ian White, Nikos Bamiedakis, Ying Hao, Fendi Hashim
Department of Engineering, University of Cambridge
Outline
• Introduction and Motivation
• Material and Fabrication Process
• Multimode Polymer Waveguide Components- Fundamental transmission studies- Waveguide bends and crossings- Y-splitters/combiners
2
- Y-splitters/combiners
• Integrated Polymer Waveguides / Optoelectronics- OE PCB Fabrication- Transceiver performance
• Non Communications Applications- Prototype gas sensor
• Conclusion
Optical Interconnects
J. Bautista, Optoelectronic Integrated Circuits Vii, pp. 1-8, 2005.
3
Optical interconnects offer significant advantages over their electrical counterparts:- large link bandwidth, reduced power consumption, EMI, thermal management
issues
Successful integration of photonics onto PCBs requires:`- suitable materials- cost-effective fabrication, assembly and packaging schemes compatible with existing manufacturing processes of standard PCBs
Siloxane materials engineered to exhibit suitable mechanical, thermal and optical properties:• are flexible• exhibit high processability
coating, adhesion to substrates, dicing• exhibit high thermal and environmental stability
withstands ~ 350 °C (solder reflow)
Siloxane Polymer Material
4
withstands ~ 350 °C (solder reflow)• low intrinsic loss at datacommunicationswavelengths: 0.03-0.05 dB/cm @ 850 nm
• low birefringence• offer refractive index tunability
� can be integrated with PCBs � offer high manufacturability
(photolithography or embossing techniques)
�are cost effective
Multimode Waveguide Components
• Allow relaxed alignment tolerances – compatible with machine assembly
• But need to have high optical performance (loss, lifetime, bandwidth etc)
• Fabricated by conventional photolithographic techniques on various substrates: silicon, glass , FR4
• Cross section of 50×20 µm2 or 50×50 µm2
• Index step difference ∆n ≈ 0.02
substrate
bottom cladding n ~ 1.5
top cladding n ~ 1.5
coren ~ 1.52
20um
50um
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• Index step difference ∆n ≈ 0.02• Typical pitch of 250 µm to match ribbon fibre and
VCSEL and photodiode array spacing
Components designed and fabricated:- straight waveguides up to 125 mm- 1.4 m long spiral waveguides- crossing guides- bent waveguides (90o bends, S-bends)- Y-splitters/combiners- couplers
Fundamental Transmission Properties - 1
Transmission properties investigated under varying launches: SMF and MMF inputs
• Propagation loss 0.04-0.06 dB/cm @ 850 nm, 0.4 dB/cm @ 1310 nm
• Coupling loss ~ 0.5 dB for SMF inputs, ~1.5 – 2 dB for MMF input
• Relaxed alignment tolerances± 20 µm for -1 dB and ± 25 µm for -3 dB for SMF launch± 13 µm for -1 dB and ± 20 µm for -3 dB for 50 µm MMF
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± 13 µm for -1 dB and ± 20 µm for -3 dB for 50 µm MMF
0
0.5
1
1.5
2
2.5
3
3.5
4
0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6Wavelength (µm)
Pro
paga
tion
loss
coe
ffici
ent (
dB/c
m)
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
-35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35
Input offset (µm)
No
rma
lise
d R
ece
ive
d P
ow
er
(dB
)....
SMFSMF, Simulation50 um MMF50 um MMF, Simulation
N. Bamiedakis, et al., IEEE Journal of Quantum Electronics, vol.45, pp. 415-424, 2009.
Fundamental Transmission Properties - 2
Mode mixing in straight waveguides assessed by far field measurements and near field images under restricted launch (SMF input)
� very small effect for lengths up to 100 mm
Crosstalk performance assessed with arrays of parallel guides with varying pitch and under SMF and MMF launches
Very low crosstalk observed for both input types even for the longest parallel guides (125 mm) and closely spaced (100 µm):
< - 40 dB for SMF and < - 25 dB for a 50 µm MMF
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< - 40 dB for SMF and < - 25 dB for a 50 µm MMF
-50
-40
-30
-20
-10
0
-300 -250 -200 -150 -100 -50 0X-axis offset (µm)
Nor
mal
ise
d re
ceiv
ed p
ower
(dB
)..
SMF50 µm MMF
WG
WG
0
0.2
0.4
0.6
0.8
1
-9 -6 -3 0 3 6 9
Angle (deg)
No
rma
lised
inte
nsi
ty a
t fa
r fie
ld…..
55 mm71 mm88 mm99 mm
Waveguide Crossings
• offer high routing flexibility• maximise usable on-board area• increase achievable interconnection density
Lowest reported loss: 0.006 dB/crossing for SMF, ~0.01 dB for MMFExcellent crosstalk performance: < - 25 dB even for 100 crossings
8
0
1
2
3
4
5
6
10 20 30 40 50 60 70 80 90 100Number of Crossings
Inse
rtion
Los
s (d
B)
SMF 50 µm MMF 62.5 µm MMF
slope: 0.006 dB/crossing
slope: 0.01 dB/crossing
slope: 0.012 dB/crossing
-50
-45
-40
-35
-30
-25
0 10 20 30 40 50 60 70 80 90 100Number of Crossings
Cro
ssta
lk in
adj
acen
t pa
ralle
l wa
vegu
ide
(dB
)..
SMF 50 µm MMF
Excellent crosstalk performance: < - 25 dB even for 100 crossings
Polymer Backplane: Design Strategy
passive routingRequirements: scalable architecture
low loss & low crosstalk
Backplane
Line cards
Exploit existing technology� ribbon fiber and connectors� VCSEL arrays @ 850 nm
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� VCSEL arrays @ 850 nm� photo-diode arrays
Mount Tx/Rx arrays on line cards� incremental costs as cards added� dedicated link from each VCSEL in
transmit array to every other card� address appropriate Tx in array on-card
Backplane architecture� passive shuffle scheme� dedicated point-to-point links� strict non-blocking� card connections at board edge
���� no mid-board or out-of-plane
connectors
10 Card Optical Backplane
Tx
Tx
Tx
Tx
Rx Rx Rx Rx Rx
Tx
Tx
Tx
2.25 U
(10 cm)
Card interfaces (10 waveguides each) J. Beals, et al., Applied Physics A, vol. 95, pp. 983-988, 2009.
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Rx Rx Rx Rx Rx
Tx
Tx
Tx
Tx
Schematic of 10-card backplane layout
• 100 waveguides• single 90°°°° bend per waveguide• 90 crossings or less per waveguide
Terabit capacity enabled by 100 waveguides, each @ 10 Gb/s in multicast mode
Input TypeInsertion
LossWorst-case Crosstalk
50 µm MMF 2 to 8 dB < -35 dB
SMF 1 to 4 dB < -45 dB
Data Transmission
Link 1 Back to Back 1 Link 2 Back to Back 2
Bit
Err
or
Rat
e
10-3
10-6
0.2 dB penalty for a bit-error-rate of 10-9
Real Gigabit Ethernet Traffic Across Backplane
10 Gb/s link transmission
• links with highest loss and greatest crosstalk• full line-rate data transmission • no dropped packets
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-16 -15 -14 -13 -12 -11
Received Power (dBm)
Bit
Err
or
Rat
e
10-9
10-12
(back to back) (received)20 ps/div 20 ps/div
Dell PowerEdge 2850 servers for GbE tests
Optical Backplanes: Widespread Industry Interest
• numerous demonstrations of simple point-to-point on-board polymer links• appealing commercial application space
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Intel optical chip-to-chip linkMohammed et al, Intel Tech. J. 8 (2004)
IBM Terabus OptocardSchares et al, IEEE J. Sel. Top. Q. Elect. 12 (2007)
Daimler ChryslerMoisel et al, Opt. Eng. 39 (2000)
Asperation Perlos Co/Vtt ElectronicsImmonen et al, IEEE Trans. Elect. Pack. Manuf. 28 (2005)Fujitsu Labs optical backplane
Glebov et al, Opt. Eng. 46 (2007)
Fraunhofer/Siemens et alSchroder et al, Opt Int. Circ. VIII, Proc.SPIE 6124 (2006)
Optical coupling achieved either by: - out-of-plane coupling using beam-turning elements + simplifies assembly and electrical connection of active devices - requires additional fabrication steps
� Cost and fabrication issues arise
- end-fired coupling
Optical Coupling Schemes
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- end-fired coupling+ eliminates the need for additional optical structures - requires embedding the OE devices in the board and efficiently routing
the electrical signal from the board surface to the devices
typically, pin-based assembly (MT-ferrules) used for alignment- not space-efficient unless employed at board-edge - not compatible with pick-and-place assembly
and/or flexible PCBs to route electrical signals - minimum bending radius - increased number of electrical interfaces
`Papakonstantinou I. et al, ECTC, 1769-1775, 2008
Integration Concept
�simplify optical layer / eliminate the need for beam-turning elements or micro-lenses � end-fired optical coupling schemes
�minimise the number of different types of electrical substrates (flex PCBs/FR4) and electrical interfaces � use one substrate
�allow compatibility with pick-and-place assembly�remove space restrictions: allow electro-optic interface anywhere on the
Motivation: Produce a low complexity/low cost OE PCB
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�remove space restrictions: allow electro-optic interface anywhere on the board
waveguide
FR4
metal tracks and electrical components
electrical via
mounted connector with VCSEL/PD
connector slot
electrical layer
optical layer
light output/input
waveguide
FR4
electrical via
connector with VCSEL/PD
connector slot
mounted active device (VCSEL or PD)
Waveguide PCB Integration
electronic componentsthrough-board
I/O signal SMA pin connectors
Board design based on low-cost single-layered double-sided FR4 substrate �
Top side: electronic components and power planeBottom side: ground plane and optical waveguides
Through-board slots produced to allow endfire optical coupling
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FR4
electrical layer
optical layer
through-board connector slot
power plane
ground plane
ground vias
I/O signal SMA connectors
waveguide facets
power plane
polymer layers
pin connectors
N. Bamiedakis, et al., Photonics West, San Francisco, 2010.
upper solder mask
OE PCB Fabrication
(i) produce electrical layout on FR4 (plated vias and uniform bottom solder mask)
(ii) fabricate waveguides on the bottom board surface
(iii) attach the electronic components using solder reflow process,
(iv) mill through-board slots to expose waveguide facets.
electronic componentelectronic component
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FR4
bottom solder mask
ground trackplated-through viaground plane
signal track
FR4
upper solder mask
bottom cladding waveguide core top cladding
bottom cladding waveguide core top cladding
electronic componentelectronic component
through-board trenchthrough-board trench
electrical layer
optical layer
• Electro-optic connectors to:• accommodate active OE devices • interface electrical with optical layer
• L-Connector shape and size• allows pick-and-place assembly (no pins)• can be positioned anywhere on the board• allows electrical connection to the back of the connector
Electro-Optic L-Connectors
• allows electrical connection to the back of the connector• L – shape facilitates vertical and angular alignment: inside surface reference
planes
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signal vias
active components
1.6 mm
0.4 mm
5 mm copper tracks
7 mmFR4
waveguide core top cladding
electronic component
plated-through via
optoelectronic component
through-board connector
FR4ground plane
light I/O
bottom solder maskbottom cladding
upper solder mask
Optical Transceiver
• Proof-of-principle demonstrator
• Integrates Tx and Rx electronic modules with polymer Y-splitter on a 1-mm single-layered FR4 board
I/O data SMAVoltage
regulators
front view
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Y-splitterOE PCB
PDLD
Rx
module
Tx
module
planar view
Tolerancing
Y-splitter insertion losses ~ 6.6 and 6.5 dB for VCSEL and PD arms � Input/output coupling losses ~ 3.5 dB and 2 dB
Main loss component: facet quality (Milled – not polished) � optimisation of milling process (tool type, spindle speed, feed rate)
Alignment tolerances:
VCSELOE PCB
x,y and z offset
x10
Broad area detector
Y-splitter
connector slot
Y-splitter
OE PCB
PD 50 µm MMFVCSEL
x,y and z offset
connector slot
19
-4
-3
-2
-1
0
-40 -30 -20 -10 0 10 20 30 40XY-axis offset (µm)
Nor
mal
ised
rec
eive
d po
wer
(dB
)….
X-axis
Y-axis
-4
-3
-2
-1
0
-40 -30 -20 -10 0 10 20 30 40XY-axis offset (µm)
Nor
mal
ised
rec
eive
d p
ower
(dB
) ..
X-axis
Y-axis
-4
-3
-2
-1
0
0 50 100 150 200Z-axis offset (µm)
Nor
mal
ised
Rec
eive
d P
ower
(dB
)
PD arm
LD arm
Alignment tolerances:VCSEL arm: ∆x= ± 8 µm, ∆y= ± 15 µm, ∆z= 70 µmPD arm : ∆x, ∆y= ± 25 µm, ∆z= 120 µm - 1 dB points
VCSEL PD ∆z
connector slot
Optical Transceiver Performance
High-speed receiver
Pattern generator
VCSEL
Y-splitter
OE PCB
BER Tester
RF amplifier
10x10x10x10x
VOAaPD
Transmit mode
Receive mode10 Gb/s
10 Gb/s
20
10x10x 10x10x
VOAVCSEL
Pattern generator
BER Tester
VCSEL
Y-splitter
OE PCB
PD
aReceive mode
Error-free operation (BER < 10-12) achieved for both directions at 10 Gb/s
-16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6
Received optical power at point a (dBm)
Tx module
Rx module
Bit
Err
or R
ate
10-9
10-6
10-3
10-12
Parallel Optical Interconnects
• Integration of 1x4 VCSEL and PD arrays with on-board optical waveguides
Tx e
lect
roni
cs
Rx electronics
OE PCB
- improve RF performance of L-connectors for device arrays
1x4 VCSEL Array
5.6
mm
-60-50-40-30-20-10
010
Nor
mal
ised
Rec
eive
d P
owe
r (d
Be)
S21 Comparison
Exp - CH1 Exp - CH2Model - CH1Model - CH2
CH1
CH2
-60-50-40-30-20-10
010
Nor
mal
ised
Rec
eive
d P
owe
r (d
Be)
S21 Comparison
Exp - CH1 Exp - CH2Model - CH1Model - CH2
CH1
CH2
Tx e
lect
roni
cs
Tx driver Rx driver -14 -12 -10 -8 -6
Received Power (dBm)
10 Gb/s Transmission
PRBS7 TxPRBS7 Rx
Bit
Err
or
Rat
e
10-3
10-12
10-9
10-6
10 Gb/s
Tx
Rx
10.6 mm0 2 4 6 8 10 12 14N
orm
alis
ed R
ecei
ved
Pow
er
Frequency (GHz)
0 2 4 6 8 10 12 14Nor
mal
ised
Rec
eive
d P
owe
r
Frequency (GHz)
Design and test of Tx and Rx electronic circuits for 1x4 parallel links� intial layouts on low-cost FR4 substrates with L-connectors
Conclusions
• Polymer siloxane materials satisfy necessary requirements for low-cost and large-scale integration onto PCBs
• A wide range of useful multimode waveguide components demonstrated with excellent transmission properties
• Automatic assembly compatible integration technique for multi-layer PCB board developed
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PCB board developed
• Prototype transceiver and on-board links successfully developed for 10Gb/s operation
• Applications in gas and bio sensing being developed
• Initial early studies towards printed waveguides
Multimode Siloxane Waveguides : � a promising technology for use in high-speed short-reach optical
interconnection applications