Post on 31-Dec-2015
description
My attempt to multi-thread an audio talk-though program using batches of dataM. Smith
Electrical and Computer EngineeringUniversity of Calgary, Smithmr @ ucalgary.ca
Laboratory 5 – Done in “C and C++” Stage 1 – 30%
Develop and investigate a multi-tasking system where the threads are free-running. Thread tasks are “Sleep(time_task)”
Develop and investigate a multi-tasking system where the threads communicate through semaphores to control order of operation
Stage 2 – 55% Demonstrate and investigate turning an “audio – talk-through
program” into a multi-threaded system – one point processed per interrupt
Stage 3 – 15% Demonstrate a batch processing system as a multi-threaded system
Options Use SHARC ADSP-21061 boards (40 MHz) – existing audio-libraries – have not
attempted Use Blackfin ADSP-BF533 boards (600 MHz) – existing audio-libraries – have been
successful at home, but not here Use Blackfin ADSP-BF533 boards (600 MHz) – using very simple, no frills, audio-talk
though library – surprising simple with 1 to 32 points being processed. Fails with 33 points. Code logic issue, not a timing issue as I can waste 25000 cycles per block at 32 points
Implementing a multi-thread system-- Laboratory 5 – Part B conceptsCollect 1 pts @44 kHz array1
Collect 1 pts @44 kHz array2
Collect 1 pts @44 kHz array3
Collect 1 pts @44 kHz array1
Collect 1 pts @44 kHz array2
Move array1 array4SimulateComplex
Move array2 array5SimulateComplex
Move array3 array6SimulateComplex
Move array1 array4SimulateComplex
Transmit N pts @44 kHz array4
Transmit N pts @44 kHz array5
Transmit N pts @44 kHz array6
Laboratory 5 – Done in “C and C++” Stage 1 – 30%
Develop and investigate a multi-tasking system where the threads are free-running. Thread tasks are “Sleep(time_task)”
Develop and investigate a multi-tasking system where the threads communicate through semaphores to control order of operation
Stage 2 – 55% Demonstrate and investigate turning an “audio – talk-through
program” into a multi-threaded system – one point processed per interrupt
Stage 3 – 15% Demonstrate a batch processing system as a multi-threaded system
Options Use SHARC ADSP-21061 boards (40 MHz) – existing audio-libraries – have not
attempted Use Blackfin ADSP-BF533 boards (600 MHz) – existing audio-libraries – have been
successful at home, but not here Use Blackfin ADSP-BF533 boards (600 MHz) – using very simple, no frills, audio-talk
though library – surprising simple with 1 to 32 points being processed. Fails with 33 points. Code logic issue, not a timing issue as I can waste 25000 cycles per block at 32 points
Implementing a multi-thread system-- Laboratory 5 conceptsCollect N pts @44 kHz array1
Collect N pts @44 kHz array2
Collect N pts @44 kHz array3
Collect N pts @44 kHz array1
Collect N pts @44 kHz array2
Move array1 array4SimulateComplex
Move array2 array5SimulateComplex
Move array3 array6SimulateComplex
Move array1 array4SimulateComplex
Transmit N pts @44 kHz array4
Transmit N pts @44 kHz array5
Transmit N pts @44 kHz array6
Nett Result
Not working as expected – equal priority (5) on each task
We are obviously missing samples
Changing Priorities
Priorities
ReadThread 3 -- obviously the most criticalProcessThread 5WriteThread 5
Different Priorities
Priorities
ReadThread 3 -- obviously the most criticalProcessThread 5WriteThread 4
No idle time available – Optimize the code
Priorities
ReadThread 3 ProcessThread 5WriteThread 5
Priorities
ReadThread 3 ProcessThread 5WriteThread 4
Implementing a multi-thread system-- Laboratory 5Collect N pts @44 kHz array1
Collect N pts @44 kHz array2
Collect N pts @44 kHz array3
Collect N pts @44 kHz array1
Collect N pts @44 kHz array2
Move array1 array4SimulateComplex
Move array2 array5SimulateComplex
Move array3 array6SimulateComplex
Move array1 array4SimulateComplex
Transmit N pts @44 kHz array4
Transmit N pts @44 kHz array5
Transmit N pts @44 kHz array6
Problem – NOT coding what we intendedCollect N pts @44 kHz array1
Collect N pts @44 kHz array2
Collect N pts @44 kHz array3
Collect N pts @44 kHz array1
Collect N pts @44 kHz array2
Move array1 array4SimulateComplex
Move array2 array5SimulateComplex
Move array3 array6SimulateComplex
Move array1 array4SimulateComplex
Transmit N pts @44 kHz array4
Transmit N pts @44 kHz array5
Transmit N pts @44 kHz array6
Tried a number of things
Worked out which semaphore was blockingDifferent prioritiesDifferent TIC times
Better – but obviously missing cycles – particularly write
Final Test Result
Seems to behaving as expectedHowever – when changed MAXIMUM COUNT FOR READ / WRITE ISR Semaphores – status history changes This could indicate that missing some interrupts Could mean nothing – interrupts asynchronous to timer TICs
Could handle 800 waste “times” every 32 samples – plenty of time 50000 cycles +
Inner loop =2 * BUFFERLENGTHOuter loop = Wastetime * (3 + INNER)Total = 13 + Inner loop
BUFFER = 32, waste time = 800Cycles around 800 * 64 = 50000+
68K Blackfin SHARCD0 (8) R0 (16) R0A0 (6) P0 (with a bit of MIPS) (6) I0 (4) I0 (16)
Real life test -- small buffers
Absolutely nothing
However 4 audio connections in 6 audio connections out
Got the correct connections Set buffer = 1 – worked first time Set buffer = 32 – worked first time
Larger buffers BUFFERSIZE – 64 – out of bsz memory error Fix .LDF file – manually (GUI window works how?)
MEMORY{ mem_VDK_strt { TYPE(RAM) START(0xFFA00000) END(0xFFA00003) WIDTH(8) } mem_l1_code { TYPE(RAM) START(0xFFA00004) END(0xFFA0FFFF) WIDTH(8) } mem_l1_code_cache { TYPE(RAM) START(0xFFA10000) END(0xFFA13FFF) WIDTH(8) } mem_EVT_all { TYPE(RAM) START(0xFF900000) END(0xFF900003) WIDTH(8) } mem_EVT_NMI { TYPE(RAM) START(0xFF900004) END(0xFF900007) WIDTH(8) } mem_EVT_EVX { TYPE(RAM) START(0xFF900008) END(0xFF90000B) WIDTH(8) } mem_EVT_IRPTEN { TYPE(RAM) START(0xFF90000C) END(0xFF90000F) WIDTH(8) } mem_EVT_IVHW { TYPE(RAM) START(0xFF900010) END(0xFF900013) WIDTH(8) } mem_EVT_IVTMR { TYPE(RAM) START(0xFF900014) END(0xFF900017) WIDTH(8) } mem_EVT_IVG7 { TYPE(RAM) START(0xFF900018) END(0xFF90001B) WIDTH(8) } mem_EVT_IVG8 { TYPE(RAM) START(0xFF90001C) END(0xFF90001F) WIDTH(8) } mem_EVT_IVG9 { TYPE(RAM) START(0xFF900020) END(0xFF900023) WIDTH(8) } mem_EVT_IVG10 { TYPE(RAM) START(0xFF900024) END(0xFF900027) WIDTH(8) } mem_EVT_IVG11 { TYPE(RAM) START(0xFF900028) END(0xFF90002B) WIDTH(8) } mem_EVT_IVG12 { TYPE(RAM) START(0xFF90002C) END(0xFF90002F) WIDTH(8) } mem_EVT_IVG13 { TYPE(RAM) START(0xFF900030) END(0xFF900033) WIDTH(8) } mem_EVT_IVG14 { TYPE(RAM) START(0xFF900034) END(0xFF900037) WIDTH(8) } mem_EVT_IVG15 { TYPE(RAM) START(0xFF900038) END(0xFF90003B) WIDTH(8) } mem_sysstack { TYPE(RAM) START(0xFF90003C) END(0xFF90083B) WIDTH(8) } mem_l1_data_b { TYPE(RAM) START(0xFF90083C) END(0xFF903FFF) WIDTH(8) } mem_l1_data_b_cache { TYPE(RAM) START(0xFF904000) END(0xFF907FFF) WIDTH(8) }
Memory issues – on 64 point data batches Still did not work
Did I change the memory map correctly? No – seems okay as works with 32 – but perhaps having
caching issue Went back to old memory map
Went to configure external SDRAM and use that Modified only 1 array – left channel
Left channel fails – right channel works Spending too much time in context switching
Group ReadThread and WriteThread code together Does not even work with 32 !!!!!!
Am convinced that there is a logical issue associated with the semaphore handling.
Bonus – 20% bonus
If you can get all parts of Lab. 5 running and then solve this issue of why fails at 64 points (even when not wasting cycles) – 20% bonus on this lab. marks and either a mention or a “co-author-ship” on one of the Circuit Cellar articles
May even be worth some money if I manage to sell the articles