Multiprocessor Systems

Objective

● Why Multiprocessors ? ● Basic Multiprocessor Architectures ● Multiprocessor Systems ● Crossbar Architecture ● Multistage Switching Networks ● Speedup in Multiprocessor Systems(MS) ● Performance characteristics of MS ● Limitations on Speedup of MS ● Multicore and Multithreading ● Summary

Semiconductor Transistor

Basic Multiprocessor Architecture

Multiprocessor Systems

•Loosely coupled

•Latency – milliseconds

•Closely coupled

•Multicomputer

•Latency – microseconds

•Tightly coupled

•Multiprocessor

•Latency – nanoseconds

Bus based architecture

•Bus contention limits the number of CPUs

• Lower bus contention

• Caches syn required

• Compiler places data and text in private or

shared memory

Crossbar

Can support a large number of CPUs Non-blocking network Cost/performance effective up to about 100 CPU – growing as n2

Multistage Switching Networks

● Lower cost, longer latency ● For N CPUs and N memories – log

2 n stages of n/2 switches

Speedup

Single Core

Multicore

Multithreading

Summary

● There are many forms of multiprocessor systems ● The system software to support them involves

substantial additional complexity over single processor systems

● The core OS must be carefully designed to fully

utilize the multiple resources ● Programming model support is essential to help

application developers

References: 1. Jeff Miller, Rolf Ulrich , Bettina Rolke: On the optimality of serial and

parallel processing in the psychological refractory period paradigm: Effects of the distribution of stimulus onset asynchronies, Cognitive Psychology 2009.

2. Jaejin Lee, Jung-Ho Park, Honggyu Kima, Changhee Jung, Daeseob Lima, SangYong Hana: Adaptive execution techniques of parallel programs for multiprocessors. In: Journal of Parallel and Distributed Computing, 2010

3. Ibrahim H. Önyüksel.: Throughput Analysis of Multiple-Bus Multiprocessor Systems with Simultaneous Possession of Common Resources.

In: Simulation May 1993. 4. Rajesh Sudarsan, Calvin J. Ribbens: Design and performance of a scheduling framework for resizable parallel applications. In: Parallel Computing January 2010. 5. ScienceDirect - Journal of Parallel and Distributed Computing #69 2009. 6. IBM Announcement Letters.