Microprocessors And Microcontrollers

By: Dr. Attiya Baqai

Semester : 4th , 5th (TL, ES) Assistant Professor,

Course Code : ES256 , ES313 Department of

Electronics, MUET.

AVR Interrupts concepts

◉ Interrupts

◉ Polling

◉ ISR (Interrupt Service Routine) or Interrupt handler

◉ Interrupt Vector Table

Interrupt Vector Table for ATmega32 AVR

Interrupt Vector Table for ATmega32 AVR

Steps in excecuting an Interrupt

◉ Finishes the current instruction. Stack← PC+1

◉ Jumps to Interrupt Vector Table. ISR ← IVR

◉ Executes ISR till RETI.

◉ PC ← Stack, continue main program.

Redirecting AVR from Interrupt vector Table at power up

Registers

◉ SREG (Status Register)-Enabling Global Interrupts

◉ GICR (General Interrupt Control Register)-For masking External Interrupts

◉ MCUCR (MCU Control Register)-Used to set Activating Logic/Edge of INT01

◉ MCUCSR (MCU Control & Status Register)-Used to set Activating Logic/Edge of INT2

◉ GIFR (General Interrupt Flag Register)-Used to check the status of Interrupt

Enabling Interrupts

◉On RESET, all interrupts are DISABLED (masked).

◉To use them, they MUST be ENABLED.

◉Make D7 in SREG as HIGH to Enable Interrupts

External Hardware Interrupts

ATMega32 Pin Diagram (40 PIN DIP)

External Hardware Interrupts

◉ INT0, INT1, INT 2

◉

Example-10-5

Eg 10-5

Edge triggered vs level triggered

SM1 SM0SM2MCUCR SE ISC00ISC01ISC10ISC11

LDI R20,0x02 ;falling

OUT MCUCR,R20

Interrupt Sense Control Bits

INT2

- JTRFMCUCSR JTD PORFEXTRFBORFWDRFISC2

External Interrupt Status

◉ When an Edge Triggered Interrupt is activated, corresponding INTFx flag will be set to ONE.

◉The program will jump to ISR associated with that Interrupt.

More Interrupt concepts

◉ Interrupt priority.

◉ Interrupt inside an interrupt

◉ Interrupt latency

Any questions ?

Thanks!