J.M. KaramPresident & CEO

MEMSCAP

Phone: +33 4 76 52 55 80Fax: +33 4 76 52 55 81

Email: Jean-Michel.Karam@memscap.com

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Specifications Architecture Optimization Schematic Capture

BehavioralSimulation

Design Centering

AutomaticLayout Generation

DRCEtching Verification

Cross-Section Viewing3D Viewing

FEM/BEM

Process Variations

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Specifications Architecture Optimization FEM/BEMAnalysis

BehavioralModeling

BehavioralSimulation

Layout Generation

DRCEtching Verification

Cross-Section Viewing3D Viewing

DesignCentering

Full SystemFunctionality

Process Variations

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Schematic Capture(e.g. DA)

Schematic Capture(e.g. DA)

Mixed-TechnologySimulator

(e.g. Continuum/Eldo)

Mixed-TechnologySimulator

(e.g. Continuum/Eldo)

Place&Route[Layout Tool]

(e.g. IC Station)

Place&Route[Layout Tool]

(e.g. IC Station)

MEMSHDL-A/

VHDL-AMSLibrary

MEMSHDL-A/

VHDL-AMSLibrary

LayoutGenerators

LayoutGenerators

TechnologyFiles

TechnologyFiles

FEM to HDL-ATranslator

FEM to HDL-ATranslator

DRCDRC

Cross-SectionViewer

Cross-SectionViewer

EtchingVerification

EtchingVerification

ResultInterface

ResultInterface

Field Solvers(FEM, etc.)

ANSYS

DeviceDesigner

SystemDesigner

Optimization &Manufacturing

Yield ManagementTools

Layout to 3D Solid-Model

Layout to 3D Solid-Model

MaterialData Base

MaterialData Base

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• Generic : VULCAINTM

• Customizable by the User to the targeted process technology• Seamless Design Flow: from Front-End to Back-End• Anisotropic & Sacrificial Etching Simulation• Multi-Segment, Multi-Angle Cross-Section Viewer• Layout to/from 3D Solid-Model Generator • EDDTM-Mesh : FEM to HDL-A Translator

• Foundry Modules :• KANAGATM [MCNC/Cronos]

More than 75 Device Generators !

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MEMS HDL-A ModelSchematic Symbol Layout Generator

Building BlockLevel

Device Level

Generic FEM Validated Characterized

Level 2

Level 1

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• Algorithms : Monte Carlo & Surface Response Methods

• Customizable for any MEMS Process• Extract Data from Process of

Critical Monitors• Build Statistical Model

• Behavioral Simulation • Considering Process Variations• Design Centering

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• Ensure Schematic Driven Layout

Generators• Coupled to System Level Model

• Improve Productivity at Layout

Custom Design

• Device Generators • Functions (Non-Manhattan Shapes)• Building Blocks• Device Level

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Anisotropic Etching Simulation Sacrificial Etching Simulation

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Layout Area Selection Layout FEM 3D Viewer (VRML, etc.)

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