Hiep Hong CS 147 Spring 2009 1 Intel Core 2 Duo. CPU Chronology 2.

Post on 23-Dec-2015

219 views 0 download

Tags:

Transcript of Hiep Hong CS 147 Spring 2009 1 Intel Core 2 Duo. CPU Chronology 2.

Hiep HongCS 147Spring 2009

1

Intel Core 2 Duo

CPU Chronology

2

CPU Chronology

Intel 4004 108 KHz 2300 transistors

Intel 8008 500-800 KHz 3500 transistors

Intel 8080 2 MHz 4500 transistors

3

Pre-Intel 8086:

CPU Chronology

4

CPU Chronology

5

CPU Chronology

6

Dual-Core or Core 2 Duo

Core 2 Duo is a brand name by Intel. Dual-Core is a generic description

meaning two separate physical cores in one chip package.

Example: Pentium Dual Core, Core Duo and Core 2 Duo.

7

Intel Core 2 Duo

8

Intel Core 2 Duo 64 bit computing. x86-64 instruction set. The second generation of dual-core

processors from Intel. Two independent processor cores. Share up to 6MB of L2 cache. Developed with a new Architecture

called Core Microarchitacture.

9

Inside Intel Core 2 Duo Die

10

Intel Core 2 Duo

11

Sequence of processing

12

Core Microarchitecture

13

Core Microarchitecture

Advanced smart cache. Macro-fusion. Advanced digital media boost. Memory disambiguation. Advanced power gating.

14

Core Microarchitecture

Advanced smart cache. Macro-fusion. Advanced digital media boost. Memory disambiguation. Advanced power gating.

15

Advanced smart cache

16

Advanced smart cache continued

If one core has minimal cache requirements, the other core can dynamically increase its share of L2 cache

Reduce cache misses. Improve performance.

17

Core Microarchitecture

Advanced smart cache. Macro-fusion. Advanced digital media boost. Memory disambiguation. Advanced power gating.

18

Macro-Fusion

19

Macro-Fusion continued

20

Macro-Fusion continued

Enable common pair of instructions to be combined into a single instruction during decoding.

Reduce the total of executed instructions.

Allow processor to execute more instructions in less time.

Increase performance.

21

Macro-Fusion continued

Without macro-fusion With macro-fusion

1 load eax, [mem1]

2 cmp eax, [mem2]

3 jne target

1 load eax, [mem1]

2 cmp eax, [mem2] + jne target

22

Core Microarchitecture

Advanced smart cache. Macro-fusion. Advanced digital media boost. Memory disambiguation. Advanced power gating.

23

Advanced Digital Media Boost

Improve performance when executing Streaming SIMD Extension (SSE, SSE2, SEE3) instructions.

Accelerate video, speech, image, speech and image, photo processing, encryption, financial, engineering and scientific applications.

24

Advanced Digital Media Boost

128-bit Streaming SIMD Extension (SSE, SSE2, SEE3) instructions.

25

Core Microarchitecture

Advanced smart cache. Macro-fusion. Advanced digital media boost. Memory disambiguation. Advanced power gating.

26

Memory Disambiguation

Accelerate the execution of memory-related instructions.

Load data for instructions about to be executed before all previous store instructions were executed.

Memory-related instructions that can be executed out of order.

27

Memory Disambiguation continued

28

Memory Disambiguation continued

29

Core Microarchitecture

Advanced smart cache. Macro-fusion. Advanced Digital Media Boost. Memory disambiguation. Advanced power gating.

30

Advanced Power Gating

31

Advanced Power Gating continued

32

Newer and better!

33

References

http://www.intel.com http://wikipedia.org http://www.zdnet.com

34