Post on 22-Jul-2020
PB: H48142-207PBA:H48125-800
SERIAL NUMBERWEEE MAC ADDRESS LABEL
GALILEO GEN2INTEL QUARK X1000
FAB H
CR-1 : @GALILEO_LIB.GALILEO(SCH_1):PAGE1
Wed May 21 10:12:25 2014
HILLSBORO OR 971242111 NE 25TH AVENUE
H38681 2.0
SHEET 1 OF 28
GALILEO Gen2DESIGN TITLE PAGE
EMPTYWEEE_LABEL_9X5MM
1375X250_TARGET1500X500_TARGET
LB1 LB3LB6V1LABELLABEL
INTEL CORPORATION
TITLE DOCUMENT NUMBER
6
1
REV
DD
2 1348 57
8
A
B
67
A
245
C
B
C
3
CR-2 : @GALILEO_LIB.GALILEO(SCH_1):PAGE2
VOLTAGE REGULATORS
VOLTAGE REGULATORS
UART 1 & JTAG
SPI: ADC&FLASH
LAN
DESIGN TITLE PAGE
TABLE OF CONTENTS
DISCLAIMER
SYSTEM BLOCK DIAGRAM
QUARK GPIO
QUARK MISC
QUARK POWER
QUARK DECOUPLING
SDRAM 1
MICRO SD CONNECTOR
MINI PCIE CONNECTOR
SDRAM TERMINATION
SDRAM 2
QUARK DDR3 & PCIE
USB CONNECTORS
QUARK STRAPS
EXTERNAL IO MUXING 1
EXTERNAL IO MUXING 2
LVL B BUFFER
LVL C BUFFER
AMUX & EXTERNAL IO
VOLTAGE REGULATORS
POWER BUTTONS & MISC
Thu Mar 03 10:58:31 2011
11
10
9
8
7
6
5
4
3
2
1
25
24
20
19
18
17
16
15
14
13
12
21
22
23
26
27
28
GALILEO Gen2H38681
2.0 SHEET 2 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
TABLE OF CONTENTS
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
SHEET NAMESHEET NUMBERSHEET NAME
TABLE OF CONTENTSSHEET NUMBER
CR-3 : @GALILEO_LIB.GALILEO(SCH_1):PAGE3
GALILEO Gen2H38681
2.0 SHEET 3 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
DISCLAIMER
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
CR-4 : @GALILEO_LIB.GALILEO(SCH_1):PAGE4
GALILEO Gen2H38681
2.0 SHEET 4 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
SYSTEM BLOCK DIAGRAM
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
ONLY 1 PCIE IS USED
INTERNAL REFCLK USED ON PCIE
CR-5 : @GALILEO_LIB.GALILEO(SCH_1):PAGE5
H38681
2.0 SHEET 5 OF 28
HILLSBORO OR 971242111 NE 25TH AVENUE
GALILEO Gen2
V1P5_S0
0402LF7.5K
CH1%
15
1%CH
1%CH
274
34
32.4 1%CH0402LF
0402LF
0402LF
VREF
V1P5_S0
1%CH0402LF
7.5K
16V10%
X7R
10%16VX7R
0.1UF
0402LF
0.1UF
0402LF
EMPTY
EMPTY
0
0
10
131211
14
5
8
67
9
4
0
321
1
01
0
EMPTY
EMPTY
CH5%10K
0402LF
00
0402LF
QUARK DDR3 & PCIE
BGA393
210
13
1514
12
8
109
11
7
3456
210
IC
1K
0402LF
1%CH
1/16W
V1P5_S3
1K
0402LF1/16W
CH1%
R2A8
R3L6
R3L5
R3L7
R2A10
C3A3
C3A4
R2B1
R3L8
R3L9
R3L10R3L14
U2A5
R4L1R4L2
13B3< 13B3<
10B6< 11B6< 12A8<>
10C3<> 11C3<>
13B3>
13B3>
10C3<> 11C3<>
10C3<> 11C3<>
10A6< 11B6<
10C3< 11C3<
10B6< 11C6< 12D7<>
10C3<> 11C3< 12D7<>
10B6< 11B6< 12A8<> 10B6< 11B6< 12B8<> 10A6< 11B6< 12A8<>
10B6< 10C3< 11B6< 12C3<
10B6< 11B6< 12A8<>
5A7> 6A6> 5A7> 6A6>
10B6< 10D3< 11B6< 12D3<
10B6< 11B6< 12A8<>
5B7< 6A6>
5B7< 6A6>
PCIE_IRCOMP
RSVD_4
PCIE0_TX0_P_CPCIE0_RX0_NPCIE0_RX0_P
M_ODT<0>
PCIE_RBIAS
RSVD_0
M_DQ<15..0>
PCIE0_TX0_N
PCIE0_TX0_P
M_DQS<1..0>
M_DQS_N<1..0>
M_DRAMRST_N
DDR3_DM0DDR3_DM1
DDR3_ODTPUDDR3_DQPUDDR3_CMDPU
RSVD_3
RSVD_1
RSVD_2
RSVD_6RSVD_5
PCIE0_TX0_N_C
M_BS<2..0>
M_MA<15..0>
M_CAS_NM_RAS_NM_WE_N
M_CK_N<0>
M_CS_N<0>
DDR_PWROKDDR_ISYSPWRGOOD
M_CK<0>
M_CKE<0>
DDR_ISYSPWRGOOD
DDR_PWROK
AJ3 AJ1
AH25AK25
AN22
AR11
AR22AP21
AJ30
AT21
AL12AG30
AN24
AN20
AP7
AN31
AN15
AR20
AP31
AR15
AN17
AR29
AR17
AK7
AL11
AP14
AP16
AN6
AK11
AT14
AD1
AL15
AH2
AH15
AD3AN1
AG6
AP26
AR9
AH4AK4
AJ6
AL30
AT26
AP10
AM2
AH7
AH12
AH29
AR13
AT5
AK2
AK12
AR6
AN5
AT31
AT3
AN11
AT10
AT32
AR24
AP4
AP12
AT34AR35
AN29AR27
AE10
AL19
AA10AE2
AK23
AE4
AH23
AM29
AK19
AL25
AK17
AH19
AL17
AP28
1 2
1
2
1
2
BI
BI
BI
BI
BI
OUTOUT
ININ
1 OF 5
DDR3
PCIE
QUARK_X1000_R1P2
PCIE_RBIAS PCIE_IRCOMP
DDR3_ISYSPWRGOODDDR3_IDRAM_PWROK
DDR3_MA<1>
DDR3_DQ<15>
DDR3_MA<2>DDR3_MA<3>
DDR3_CK<0>
DDR3_MA<4>
DDR3_DM<0>DDR3_CK<1>
DDR3_MA<10>
DDR3_MA<5>
DDR3_DM<1>
DDR3_CSB<0>
DDR3_MA<11>
DDR3_MA<6>
DDR3_CSB<1>
DDR3_MA<12>
DDR3_MA<7>
DDR3_MA<13>
DDR3_MA<8>
DDR3_DQS<0>
DDR3_DQ<0>
DDR3_MA<14>
DDR3_MA<9>
DDR3_DQS<1>
DDR3_DQ<1>
DDR3_MA<15>
PCIE_PETN_0
DDR3_DQ<2>
PCIE_PETN_1
DDR3_DQ<3>
PCIE_PETP_0PCIE_PERN_0
DDR3_DQ<4>
DDR3_BS<0>
DDR3_DQ<10>
PCIE_PETP_1PCIE_PERN_1
DDR3_DQ<5>
DDR3_CKB<0>
DDR3_BS<1>
DDR3_DQ<11>
PCIE_PERP_0
DDR3_DQSB<0>
DDR3_DQ<6>
DDR3_CKB<1>
DDR3_BS<2>
DDR3_DQ<12>
PCIE_PERP_1
DDR3_DQ<7>
DDR3_DQSB<1>
DDR3_DQ<13>
DDR3_ODT<0>
DDR3_DQ<8>
DDR3_CKE<0>
DDR3_DQ<14>
DDR3_ODT<1>
DDR3_MA<0>
DDR3_DQ<9>
DDR3_CKE<1>
RESERVEDRESERVED
DDR3_CASBDDR3_RASB
RESERVED
DDR3_ODTPU
RESERVEDPCIE_REFCLKP
DDR3_CMDPU
PCIE_REFCLKN
DDR3_DQPUDDR3_VREF
RESERVED
DDR3_DRAMRSTB
RESERVEDRESERVED
RESERVED
DDR3_WEB
OUT
OUT
OUT
OUT
ININ
BI
BI
BI
BI
BI
OUTOUTOUTBI
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
ON-BOARD ADC
REF0_OUTCLK 100MHZ
CAD NOTE:
1: INTERNAL CLOCK
NOT USED
RTC_EXT_CLK_EN_B
25MHZ - NOT USEDTO BE LENGTH MATCHED
0: EXTERNAL CLOCK FROM RTCX1/RTXC2
GPE_N NOT USED (INTERNAL PU)
TRACE TO CRYSTAL HAS
CAD NOTE:PLACE NEAR QUARK
CR-6 : @GALILEO_LIB.GALILEO(SCH_1):PAGE6
HILLSBORO OR 971242111 NE 25TH AVENUE
H38681 2.0
SHEET 6 OF 28
GALILEO Gen2
CHCH33.2
CH
CHCHCH1K
IC
BGA393
CH
CH
33.2
1K CH1K1K CH1K CH1K CH1K CH1K CH1K CH
1K1K
1K
5%
0402LF
10%1UF
X5R6.3V
V3P3_S5
0402LFEMPTY
49.91%
18PF
0402LF
5%COG50V
49.91%CH
G91801-001
25.000MHZ
5%CH
1M
XTAL
0402LF
18PF5%50VCOG
0402LF
49.949.91% 1%
CHCH
49.91%CH
1/16W0402LF
V1P5_S5
2.2K5%
1/16W
CH0402LF0402LF
CH5%2.2K
1/16W
V3P3_S0
TP
EMPTY
CH
TP
0
110
CH5%10K
CH
0402LF
EMPTY
000402LF
0
7.5K
0402LF
1%CH
QUARK GPIO
CH
CH
CH
33.2
33.2
33.2
33.2
1/16W0402LF
10M5%CH
XTAL
32.768KHZ
COG5%
COG
V3P3_RTC
V3P3_RTC
CH5%10K
0402LF
6.3V10%1UF
0402LFX5R
0402LF
10%16V0.1UF
X7R0402LF
18PF
0402LF18PF
10K
0402LFCH5%
EMPTY1%1K
0402LF
R2B29
R39
U2A5
R2M5
TP2A2
R3M2
R2B7R3M13R3M5R3M8
R3M10R3M14R2B20R2B21
R12
TP8TP6
TP7TP5
TP4
C2L1
R2L21
R3L2
C3L6
R3L13
Y3L1
C3L5
R2A14R2A13R2A12
R2A11
TP2
R3A15
TP1
TP2A1
R3A13
R3A24
R3L11
R3L3
R2A5
R3L12
R2B11
R2B9
R2B8
R3M6
R2B14
R2A9Y2A1
C2A6
R2L9
C3L8C3L13
C3A10
R2L11
R2L10
16A4> 16A5> 16A5< 16B4> 16A5>
13B2<> 20A2<> 20B4<>
6A6< 28B6> 26D3< 26B3< 27C6< 28B7< 6A6< 26A8< 28B8< 28C5<
6A6< 28A6> 26D5< 26B5< 28A8<
13B8> 19A3> 28D7>
20B5>
23C2<> 23C7<
18A1>
18C6<
18D6< 19B1> 18C1>
13C3<
6C7<> 23B1< 23B7<
18C6< 19A6>
13C3<
13A7< 13B6< 13A6< 13B6<
6A6< 25D3>
5A7> 5B7< 5A7> 5B7<
6A6< 28A5>
19D4> 21C6<
13B2< 20A2< 20B4<>
21B8< 22C2> 21C8< 22D2> 6C7< 23B1< 23B7<
21B6< 22B2>
17B8<
18B4< 19D5>
18A4< 19D7>
19D3> 21D3<
21B6< 22B2> 21A8< 22C2>
21D3< 22A2>
21B3< 23C7< 23D2<>
18A5<
7B7< 23C7< 23D2<>
21D8< 22D2>
21A6< 22A2>
6A6> 26A8< 28B8< 28C5< 6A6< 28B6>
6B6< 28A5>
6A6< 28A6>
6B6< 25D3>
JTAG_TCKJTAG_TDIJTAG_TDOJTAG_TMSJTAG_TRST_N
I2C_SDA
TP0TP1
RSVD_7RSVD_8
REF1_PREF1_N
RTC32K_CLK_SEL
PG_V1P0_S0S0_3V3_ENS0_1V5_ENS0_1V0_EN
S3_PGOODS3_3V3_ENS3_1V5_EN
WAKE_NEC_PWRBTN_NRESET_N
EXP2_INT_REXP2_INT
MUX8_I0_RLVL_C_A2_RMUX5_I0_RMUX3_I0_R
LVL_C_A2
SPI0_MOSI_RSPI0_MISO
CKSYS25OUT
RSVD_9
OSC_COMP
VCCRTCEXT
SPI0_SCK_R
SPI1_SCK_R
LSPI_CS_N_R
LSPI_MOSI_RLSPI_MISO
CLN_XTAL_OUT
FLEX0_CLK
REFCLK0_P
FLEX1_CLKFLEX2_CLK
CLN_XTAL_IN
RMII_REF_CLK_R
SPI1_MOSI_RSPI1_MISO
LSPI_SCK_R
REFCLK0_N
RSVD_10
GPIO3_RMUX6_I0_R
SPI0_CS_N_R
WIFI_DISABLE_NPCIE_RESET_N
MUX2_I0_RMUX1_I0_RSPI1_MISO_RMUX0_I0_RLVL_C_A1_RMUX7_I0_R
S5_PGOOD
DDR_PWROKDDR_ISYSPWRGOOD
S0_PGOOD
PRDY_BPREQ_B
SPI1_MOSI
RTCRST_N
I2C_SCL
MUX2_I0MUX1_I0SPI1_MISO
MUX6_I0
RTCX1
RMII_REF_CLK_OUT
EXT_REFCLK_HPLL
SPI0_SCK
SPI0_MOSI
SPI1_SCK
MUX5_I0MUX3_I0
MUX8_I0
LVL_C_A1
SPI0_CS_N
UART0_RXD
MUX0_I0
MUX7_I0
RTCX2
S0_1V0_ENPG_V1P0_S0
S0_PGOOD
S3_PGOOD
S5_PGOOD
11
11
1
AG35AG33
W7
J6
V7
AF11
AJ33
W3
J11
N4
AE32
N2
AH34
C7
B4
E4F2
AM33
AK32AN35
M3
B1
K3K1
B6
AB1
J2
R1
G3
AC4
F4
V4
M8
V2A5
H30
AE34
U3
AA2
T4
J30
AH32AK34
AM35
D6
L4
V5
A2
M6
H6
AD11
R35
J15
R33
G15
N34
E15
N32
J12E12G11
W33V34V32U33T34T32
G7
R3T2
L2
D2
J4
A4
J7E11
AT2AR1
E7B2
2
2
22
1
1
2
1
2
11
2
1
2
2
2
1
2
2
22
2
OUTOUTIN
OUT
IN
IN
OUT
ININ
ININ
T_POINT1T_POINT1
T_POINT1
T_POINT1
T_POINT1
BI
IN
INOUT
BI
OUT
T_POINT1 T_POINT1
BIBI
BIBIBIBIBIBI
BI
OUT
OUT
OUT
BI
BI
IN
IN
IN
IN
QUARK_X1000_R1P2
2 OF 5
SP
I
I2C
GP
IOR
TCP
WR
MG
MT
DFX
CR
U/P
LL
SPI0_MOSISPI0_MISO
CKSYS25OUT
REF1_OUTCLK_P
HPLL_REFCLK_P
RESERVED
SPI1_SS_B
OSC_COMP
IVCCRTCEXT
TDI
SPI0_SCK
TMSSPI1_SCK
I2C_CLK
GPE_B
S0_3V3_ENS0_1V5_EN
LSPI_SS_BLSPI_MOSILSPI_MISO
TCK
RESERVED
S3_3V3_ENS3_1V5_EN
I2C_DATA
XTAL_OUT
RTCX1
TDO
RTCX2
PAD_BYPASS_CLK
S0_1V0_EN
FLEX0_CLK
REF0_OUTCLK_P
FLEX1_CLKWAKE_B
VSSSENSE
SPI0_SS_B
FLEX2_CLK
XTAL_IN
RMII_REF_CLK_OUT
VNNSENSE
SPI1_MOSISPI1_MISO
LSPI_SCK
RESET_BTN
TRST_B
HPLL_REFCLK_N
RESERVED
REF0_OUTCLK_N
REF1_OUTCLK_N
RESERVED
GPIO<3>
GPIO_SUS<5>
GPIO<2>
GPIO_SUS<4>
GPIO<1>
GPIO_SUS<3>
GPIO<0>
GPIO_SUS<2>GPIO_SUS<1>GPIO_SUS<0>GPIO<9>GPIO<8>GPIO<7>GPIO<6>GPIO<5>GPIO<4>
S5_PG
ODRAM_PWROKOSYSPWRGOOD
PWR_BTN
S0_1P0_PG
S3_PG
S0_PGRTCRST_BRTC_EXT_CLK_EN_B
RESERVEDRESERVED
PRDY_BPREQ_B
OUT
BIBI
OUTOUT
ININ
IN
OUT
OUTOUT
OUTOUTOUT
OUT
INTEL CORPORATION
TITLE DOCUMENT NUMBER
6
1
REV
DD
2 1348 57
8
A
B
67
A
245
C
B
C
3
NOT USED, LEAVE FLOATING
ONLY USED FOR STRAPS
NOT USED (INTERNAL PU)
TXD OUTPUT FROM QUARK
LEAVE FLOATING PER USB TEAM INPUTINTERNAL CLOCKS USED FOR USB
AS POSSIBLE TO SOC.PLACE USB CAPS AS CLOSECAD NOTE:
CR-7 : @GALILEO_LIB.GALILEO(SCH_1):PAGE7
GALILEO Gen2H38681
2.0 SHEET 7 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
CH00 CH
0201LF
EMPTY
0201LF
25V5%
0201LF
25V
0
18PF5%
18PF
EMPTY
18PF5%
25V
EMPTY
18PF5%
CH0 CH
V3P3_S0
0402LF1/16W
10K5%CH
0
BGA393
IC
1%
0402LFCH
1/16W
8.06K
0402LFCH
33.2
22.61%CH0402LF1/16W
CHCHCH
CHCH
33.233.2
33.233.2
QUARK MISC
23
10
CH33.2
1%10K
R77R79
R78R76
C51 C54
C52 C53
R3B4R2B28
U2A5
R3L4
R2M12
R2B2
R2M14R2M8
R2M7R2M11
R2L4
R3A20
19D1>
17B5>
15C6<> 15C6<>
15A6<> 15B6<>
17C4<
13B3<> 13B3<>
6B7< 23C7< 23D2<>
17C1>
21B1>
21A6<
16C5< 21C3<
16C5<
14A5<
14C6<>
14C6>
16C5>
17C1> 17C1>
19B4>
15C5>
15C8<
17C4< 19B7>
17C4< 17C7> 17C2<> 17C6<>
17C4< 19B6> 14C6<>
14C6< 19A7>
7D4<> 7D4<>
7C4<> 7C4<>
7D3< 7D3<
7D3< 7D3<
USBH2_DP
RMII_S0_TX_ENRMII_S0_TXD1RMII_S0_TXD0
USBH2_DP_R
RMII_S1_TXD0
RMII_REFCLK
RMII_S0_TX_EN_R
USBH2_DN_R
USBH2_DP_RUSBH2_DN_R
USBH0_DN_RUSBH0_DP_R
USBH0_DP_RUSBH0_DN_R
USBH0_DNUSBH0_DP
USBH2_DN
USB_OC1_N
RSVD_11
USBH1_DNUSBH1_DP
RSVD_12
PD_CLK14
CLN_SD_CLK_R
TS_IREF_N
UART0_RXD
RMII_S0_RX_DV
UART1_RXD
UART0_TXD
UART1_TXD
USBCOMP
UART1_RTS_N
SD_LED
CLN_SD_CMDRMII_S0_MDIO_RRMII_S0_MDC_R
CLN_SD_CD_N
UART1_CTS_N
RMII_S0_TXD1_RRMII_S0_TXD0_R
RMII_S0_RXD1RMII_S0_RXD0
RMII_S1_TXD1
USB_OC0_N
USB_PWR_EN0
RMII_S0_MDCRMII_S0_MDIO
CLN_SD_DAT<3..0>
CLN_SD_CLK
B11
G19
D9
M31
P30
W29
J19
C16
M29
V29W9
B9
C14
P29
C10
AA34W30
J34
C18
V30
AC34
W35
AC32
K33
AD33
C12
D11
C21
E17
B22B17D17
E19
AD29AC27AA32
AD28
AB33
D22A21
B13D13
C28B27
B20
D27
D20
A26C26B24
B15
D24
D15
C23
AC7AC5
M33M35
L32L34
G35J32
F34G33
AA4W5
G17
2
1
2OUT
OUT
OUT
OUTBI
IN
BIBI
INOUT
OUT
BI
BIBI
BIBI
INOUT
IN
IN
QUARK_X1000_R1P2
3 OF 5
TSLE
GA
CY
SD
IOU
AR
T
US
BE
THE
RN
ET
MAC1_MDC
SD_WP
CLK14
USBD_DN
USBH1_DN
SIU0_DTR_B
SD_CLK
RMII_REF_CLK
USBD_DPUSBH0_DNTS_IREF_N
THRM_B
MAC1_RXDV
USBH1_DP
SMI_B
SIU0_RXDSIU0_RTS_B
OUSBCOMP_P18
MAC0_RXDV
USBH0_DP
SIU1_RXD
SIU0_TXD
SIU1_TXD
IUSBCOMP_N18
SIU1_RTS_B
MAC1_TXEN
MAC1_MDIO
MAC0_TXEN
SD_LED
SD_CMDMAC0_MDIOMAC0_MDC
SD_CD_B
SIU0_CTS_BSIU0_DCD_BSIU0_DSR_BSIU0_RI_B
SIU1_CTS_B
MAC0_TXDATA<1>MAC0_TXDATA<0>
MAC1_RXDATA<1>MAC1_RXDATA<0>
SD_DATA<7>SD_DATA<6>
MAC0_RXDATA<1>
SD_DATA<5>
MAC0_RXDATA<0>
SD_DATA<4>SD_DATA<3>SD_DATA<2>
MAC1_TXDATA<1>
SD_DATA<1>
MAC1_TXDATA<0>
SD_DATA<0>
TS_TDATS_TDC
USB_CLK96NUSB_CLK96P
RESERVEDRESERVED
USB0_OC_BUSB1_OC_B
USBH0_PWR_ENUSBH1_PWR_EN
RESERVEDRESERVED
SD_PWR
IN
OUT
INININ
OUTOUT
OUTOUT
BI
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
0201LF
STITCHING CAPS FOR SIGNAL REFERENCE TRANSITION
CAD NOTE
STITCHING CAPS FOR SPLIT PLANESPLACE AS CLOSE AS POSSIBLE TO SIGNAL VIAS
CR-8 : @GALILEO_LIB.GALILEO(SCH_1):PAGE8
GALILEO Gen2H38681
2.0 SHEET 8 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
V1P0_S5
V1P0_S5
0402LF
0.5A
V1P8_S3_IVR
V1P0_S0
V1P8_S5_IVR
V1P8_S0_IVR
V3P3_S0
V3P3_S5
V3P3_RTC
V1P0_S3_IVR
V1P05_S0_IVR
V3P3_S3
V3P3_S0
V1P0_S0
V3P3_S3V3P3_S5
BGA393
V1P0_S0
10
6.3V1UF10%
0402LFX5R
V1P5_S3
IC
1UF
100.5A
10%X5R0402LF6.3V
10%0.01UF
0402LFX7R50V50V
X7R0402LF
0.01UF10%
0.01UF10%50VX7R0402LF
0.01UF
0402LF
10%50VX7R
10%50VX7R0402LF
0.01UF50V0402LF
0.01UF10%X7R
0.01UF
0402LF50V10%X7R
QUARK POWER
10%
0402LFX7R50V0.01UF
10%0.1UF
0402LFX7R16V
0.1UF
0402LF
10%16VX7R
0402LF16V0.1UF10%X7R
V1P5_S5
0402LFX7R
0.1UF10%16V16V
10%0.1UF
X7R0402LF
V1P5_S3
0402LF
0.1UF10%X7R16V
V3P3_S0
0.1UF16VX7R0402LF
10%X7R16V10%
0402LF
0.1UF
V1P05_S0_IVR
10%1UF
6.3V
V1P0_S3_IVR
X5R
V1P5_S5
V1P5_S0
V1P8_S3_IVR
V3P3_S5
V1P8_S0_IVR
10%0.1UF
V1P5_S5
V1P8_S5_IVR
16V
X7R10%0.1UF16V0402LF0402LF
0.1UF
V5_ALW_ONVBUS1
10%X7R16V
0402LFX7R16V10%0.1UF
V3P3_S5X7R
0402LF16V0.1UF
X7R10%10%
0402LFX7R16V0.1UF
0402LFV3P3_S0
X7R16V0.1UF10%
0402LF
10%16VX7R0402LF
0.1UF
V3P3_S3
TP20
TP3
TP19
TP18
TP21
TP22
TP11
TP9
TP10
TP12
TP14
TP16
TP17
TP15TP13
U2A5
FB3L1
C3L14
C3M3
FB3M1
C2B12C3B17C2B13C4B6C3B16C3A21C3A20C2A7
C3A24C3A23C2A9C2A8C1B1C3M13C4A3C3B18
C3L21
C2A10
C2M10C3M12C3A22C1M14C1M13C4B7C1L3
V1P0_S0_FLT
V1P0_S5_IVR
V1P5_S3_LC
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
T11
AT12
T13
K11
AT16AT18
E1
V16
AD5
R10
T18
P18
V18
V13
K13
V11
AD31
T24
P7
P16
M18
P24
P11
K16
K14
M14
P22
K18
P5
T14
AB18AB20
Y14
AB14
Y18
AD14
P14
K24
F30
K22
V14
P20
AA26
R26
T20
AB24AD24
AT28
AT23
AB13
K20
AD13
Y20Y16V20
21
21
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
T_POINT1
QUARK_X1000_R1P2
4 OF 5
VCCAICLKCB_1P0
VCCDDR_1P5
VCC1P0_S5
OVOUT_1P8_S5
VCCDDR_1P5VCCDDR_1P5
VCCRTC3P3
VCC1P0_S0
VCC1P5_S0VCCAICLKSFR_1P5
VCCAVISA_1P0
OVOUT_1P8_S0
VNN
VCCAICLKSSC1_1P0
VCC1P8_S5
VCCAICLKDBUFF_1P0
VCCSFRPLLDDR_1P5
VCCFHVSOC_1P05
VCCAICLKSE_3P3
VSSA_USB
OVOUT_1P8_S3
OVOUT_1P05_S0
VCCDICLKDIG_1P0VCC3P3_USB_S3
VCC3P3_S3
OVOUT_1P0_S3
VCCAUSB_1P8
VCC1P8_S3
VCC3P3_S5
OVOUT_1P0_S5
VNNVNN
VCCAPCIE_1P0
VCCADDR_1P0
VNN
VCCADLLDDR_1P0VCC1P0_S3
OVOUT_1P8_SLDO
VCC3P3_A
VCCAA_1P8
VCC1P0_S0
VCC1P8_S0
VCC3P3_S0
VCCFSOC_1P05
VCC1P8_S0
VCC3P3_S0VCC3P3_S0
VCCCLKDDR_1P5
VCCDDR_1P5
VCCACLKDDR_1P0
VCCAUSB_1P8_S3
VCCPLLDDR_1P0
VNNVNNVNN
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
RECOMMENDATION FROM PD STUDY
RECOMMENDATION FROM PD STUDY
RECOMMENDATION FROM PD STUDY
CR-9 : @GALILEO_LIB.GALILEO(SCH_1):PAGE9
GALILEO Gen2H38681
2.0 SHEET 9 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
0201LF16V10%1000PF
X7RX7R
D70538-0010201LF16V10%1000PF 10%
6.3V0201LFX5R
1UF
BGA393
IC
QUARK DECOUPLING
V3P3_S3
0402LFX7R
0.01UF10%50V
1UF20%4VX5R0201LF
C83410-012
4VX5R0201LF
1UF20%
V1P5_S5
0201LF4VX5R
1UF20%
0201LF
1UF20%X5R4V
0201LF
1UF20%X5R4V
0402LF50V10%X7R
1000PF
0402LF
1000PF10%50VX7RX7R
0402LF
10%1000PF50V
0402LF
1000PF10%50VX7R
1000PF
0402LF
10%X7R50V50V
10%
0402LF
1000PF
X7R
10%1UF6.3VX5R
V1P8_S3_IVR
0603LFX5R
2.2UF10%6.3V
20%1UF4VX5R0201LF0201LF
20%1UF4VX5R
1UF
X5R0201LF
20%4V
2.2UF
0603LF6.3V10%X5R
0402LF
6.3V10%X5R0603LF
2.2UF
A36096-1080402LF
10UF20%4VX5R
20%22UF
0603LFX5R6.3V
0402LF
2.2UF6.3VX5R0603LF
10%
10%X5R
1UF6.3V
X7R0402LFA36096-046
1000PF10%50V
602433-081
20%22UF
0603LFX5R6.3V
V3P3_S0
V3P3_S5
V1P5_S3
V1P0_S0
C3L27C3L25 C3L11
C3L18
U2A5
C3L19
C3L28C3L29C3L24C3L26C3L20
C3M5C3M6C3M7C3M8C3L30C3M2
C3L10
C3L12
C3L15C3L17
C3L16C3M4
C3L22C2B2
C3L23
C3L9
C3M1
C3B10
Y22
M5
U1
AN9
A14
AH17
AD8
AB11
T16
M16
V27
A16
AP2
AJ35
AD16
AB16
T22
M13
A18
AP33
AK15
AN13
AD35
U35
A23
M22
G1
AT7
AK29
AE26
AB35
A31
M28
G12
AN27
AF20
AF13
AB3
J25
AP18
AL6
AC2
AL23
AF22
AC9
AM1
AF24
AC29
AG1
AC30AD18
V9V22
P9AD20P13
F6
P27
K35
H17
AM4
A7
M1
B33
AM7
AG3
A10
M11
D5
AM32
AH11
A12
AD6
W1W27Y11Y13
AP23
C1
E35E32D33D31D29
C35
B31
B29
A32
A28A34
B35F32
M26E25J23
M24Y24G25
AF16G23M20
AD22AF14AB22V24E23G29AF18J29E29
2
1
1
22
11
2
2
1
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
QUARK_X1000_R1P2
5 OF 5
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSVSS
VSSVSS
VSSVSSVSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSVSSVSSVSS
VSS
VSS
VSSVSSVSSVSSVSS
VSSVSS
VSS
VSS
VSSVSS
VSSVSSNCNCNCNCNCNCNCNCNC
NCNCNCNCNCNCNCNCNC
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
PLACE 0.1UF DECOUPLING AS CLOSE AS POSSIBLE TO DRAM POWER PINSCAD NOTE:
DESIGN NOTE:
2GBIT(256MBIT X 8) AND 4GBIT (512MBIT X8) DEVICESA14, A15 ALLOW FOOTPRINT COMPATIBILITY WITH
SDRAM 1
CR-10 : @GALILEO_LIB.GALILEO(SCH_1):PAGE10
GALILEO Gen2HILLSBORO OR 971242111 NE 25TH AVENUE
2.0 SHEET 10 OF 28
H38681
25V.25PFCOG0402LF
1PF
V1P5_S3
0.1UF16V0402LF
V1P5_S3
6.3VX5R
22UF20%
0805LF
0.1UF10%16VX7R0402LF 0402LF
10%0.1UF
X7R16V
VREF
VREF
V1P5_S3
0402LF16VX7R10%0.1UF
0402LF
ICG83568-001
SDRAM 1
240CH1%
012
15141312111098
67
543210
0
21
43
567
10%16VX7R0402LF
10%X7R16V0402LF
0.1UF
X7R
0.1UF10% 10%
X5R6.3V2.2UF
0603LF C4M1
C4M3
C1A19
C4M4 C1A22
C1A23
R4M1
U1B5
C1A15 C1A25 C1A24
5D7<> 11C3< 12D7<>
5D3<>
5C3>
5C3<> 5C3<>
5C7<> 10B6< 11B6< 12C3<
5C7<> 10B6< 11B6< 12D3<
5D7> 11B6< 12B8<>
5D7> 11B6< 12A8<>
5D7> 11B6< 12A8<>
5B7<> 11B6< 12A8<>
5C7<> 10D3< 11B6< 12D3<
5C7<> 10C3< 11B6< 12C3<
5C7<> 11B6< 12A8<>
5C7<> 11B6< 12A8<>
5D7<>11C6< 12D7<>
5C3<> 11B6<
M_MA<15:0>
M_DQ<7:0>
DDR3_DM0
M_DQS_N<0>M_DQS<0>
M_CK_N<0>
M_CK<0>
M_RAS_N
M_WE_N
M_CAS_N
M_CS_N<0>
M_CK<0>
M_CK_N<0>
M_CKE<0>
M_ODT<0>
M_BS<2..0>
M_DRAMRST_N
ZQ_1
2
1
2
1
1
2
2
H1F9
H9J7N7
J1J9L1L9N1N9
A3F1
N2
H3
F3
G3
G7
H2
F7
H8
G9
J2
G1
K8J3
E1
K9M1M9
J8
K1G8G2D7A9
M7K7N3
A1A8B1D8F2F8
B2B8C9
D1D9
H7
K3L7L3K2L8L2M8M2N8M3
B3C7C2C8E3E8D2E7
2
E9E2C1
A2
B9
2
1 1
B7
C3D3
A7 IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
BI
BIBI
BI
MT41K128M8
NC_H9NC_N7
ZQ A12/BC_NA13A11
A10/APA9A8A7A6A5A4A3A2A1A0
NC_H1
CKE
CS_N
ODT
NC_F9NC_F1
VDDQ
VSSVSS
VDDVDD
VSSVSS
VDDVDD
NC_J7VSSVSS
VDDVDD
VSSVSS
VDDQ
VSSQ
VSS
VDD
VSSQVSSQ
VDDQVDDQ
VSSQ
CK_NCK
DQS_NDQS
VREFDQVREFCA
NF/TDQS_NDM/TDQS
RESET_NWE_N
CAS_NRAS_N
BA<2>BA<1>BA<0>
DQ<7>DQ<6>DQ<5>DQ<4>DQ<3>DQ<2>DQ<1>DQ<0>
VSSQ
VSS
VDD
VSS
NC_A3
VDD
VSS
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
A14, A15 ALLOW FOOTPRINT COMPATIBILITY WITH
SDRAM 2
CAD:PLACE 0.1UF DECOUPLING AS CLOSE AS POSSIBLE TO DRAM PINS
2GBIT(256MBIT X 8) AND 4GBIT (512MBIT X8) DEVICES
DESIGN NOTE:
CR-11 : @GALILEO_LIB.GALILEO(SCH_1):PAGE11
GALILEO Gen2
2111 NE 25TH AVENUEHILLSBORO OR 97124 H38681
SHEET 11 OF 282.0
VREF
X7R10%0.1UF
0402LF16V
V1P5_S3
0.1UF
0402LFX7R16V10%
VREF
X7R0402LF
0.1UF16V10%
0402LF240
IC
CH1%
012
X7R16V10%0.1UF
0402LF16VX7R0402LF
0.1UF10%
V1P5_S3
10%0.1UF
0402LFX7R16V
G83568-001
10
15
11
1312
14
98
SDRAM 2
76543
12
0
8910111213
1514
2.2UF6.3VX5R0603LF
10%
C1A21
C1A13 C1A20
R4L19
C1A16
U1A1
C4M2 C4L3 C1A14
5D3<>
5D7<> 10C3<> 12D7<>
5C3<> 5C3<>
5C3>
5D7> 10A6< 12A8<>
5C3<> 10A6<
5D7> 10B6< 12B8<>
5D7> 10B6< 12A8<>
5B7<> 10B6< 12A8<>
5C7<> 10B6< 10C3< 12C3<
5C7<> 10B6< 10D3< 12D3<
5C7<> 10B6< 12A8<>
5C7<> 10B6< 12A8<>
5D7<> 10B6< 12D7<>
M_DQ<15:8>
M_MA<15:0>
M_DQS_N<1>M_DQS<1>DDR3_DM1
M_WE_N
M_DRAMRST_N
M_RAS_N
M_CAS_N
M_CS_N<0>
M_CK_N<0>
M_CK<0>
M_CKE<0>
M_ODT<0>
ZQ_2
M_BS<2..0>
2
1
2
A3F1F9H1H9J7N7
G3
F7
G7
G9
H2
G1
F3
N2
H3
H8
J2K8J3
A2A9D7G2G8K1K9M1M9
J8
E1
E9
1
2
B9C1E2
2
1
F2F8J1J9L1L9N1N9
D8
N8M3H7M7K7N3
A1A8B1
B2B8C9
D1D9
K3L7L3K2L8L2M8M2
B3C7C2C8E3E8D2E7
D3C3
B7A7 IN
IN
BI
BIBI
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
MT41K128M8
NC_H9NC_N7
ZQ A12/BC_NA13A11
A10/APA9A8A7A6A5A4A3A2A1A0
NC_H1
CKE
CS_N
ODT
NC_F9NC_F1
VDDQ
VSSVSS
VDDVDD
VSSVSS
VDDVDD
NC_J7VSSVSS
VDDVDD
VSSVSS
VDDQ
VSSQ
VSS
VDD
VSSQVSSQ
VDDQVDDQ
VSSQ
CK_NCK
DQS_NDQS
VREFDQVREFCA
NF/TDQS_NDM/TDQS
RESET_NWE_N
CAS_NRAS_N
BA<2>BA<1>BA<0>
DQ<7>DQ<6>DQ<5>DQ<4>DQ<3>DQ<2>DQ<1>DQ<0>
VSSQ
VSS
VDD
VSS
NC_A3
VDD
VSS
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
TERMINATION RESISTORSDITRIBUTE DECOUPLING AMONGCAD:
CR-12 : @GALILEO_LIB.GALILEO(SCH_1):PAGE12
GALILEO Gen2H38681
2.0 SHEET 12 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
VTT
0.1UF
10%0.1UF
X7R16V0402LF
CH1%
CH1%
0402LF
0402LF
30.1
30.1
0402LFX7R10%16V
SDRAM TERMINATION
VTT
2
VTT1%CH
36.5
36.50402LF
36.51
0
36.515
36.5
36.5
36.5
14
12
13
36.5
36.5
36.5
11
10
9
36.5
36.5
36.5
36.5
7
8
5
6
X7R0402LF16V10%0.1UF0.1UF
0402LF16VX7R10%
1%G73524-001
36.5
36.5
36.5
4
2
3
36.5
36.5
36.5
1
0
36.5
36.5
36.5
36.5
36.5
0402LF16VX7R
0.1UF10%
0402LF16VX7R
0.1UF10%
0.1UF
0402LF
VTT
16VX7R10%
C1A5
C4L2
R4L11
R4L10
R1A20
R1A19
R4L21
R1A18
R4L7
R4L22
R4L23
R4L14
R4L20
R4L8
R4L17
R4L18
R1A2
R1A3
C1A9C1A6
R1A5
R4L6
R1A4
R4L12
R4L16
R4L5
R4L13
R4L15
R4L3
R4L4
R1A6
C1A10C1A8C1A7
5C7<> 10B6< 10C3< 11B6<
5C7<> 10B6< 10D3< 11B6<
5D7<> 10B6< 11C6<
5D7<> 10C3<> 11C3<
5D7> 10B6< 11B6<
5D7> 10B6< 11B6<
5B7<> 10B6< 11B6<
5C7<> 10B6< 11B6<
5C7<> 10B6< 11B6<
5D7> 10A6< 11B6<
M_CK_N<0>
M_CK<0> M_CK_CAP
M_BS<2:0>
M_MA<15..0>
M_RAS_N
M_CAS_N
M_CS_N<0>
M_ODT<0>
M_CKE<0>
M_WE_N
1
2IN
IN
BI
BI
BI
BI
BI
BI
BI
BI
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
IS NOT SUPPORTED ON GALILEODYNAMIC CLK MANAGMENT OUTPUT
RESERVED PINS, NO CONNECT
PCIE SLOT 0
NOT SUPPORTED BY QUARKUSER IDENTITY MODULE (EXTENSION OF SIM)
CR-13 : @GALILEO_LIB.GALILEO(SCH_1):PAGE13
GALILEO Gen2H38681
2.0 SHEET 13 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
FULL_MINI_CARD
1/16W
1K5%
1/16W
CH0402LF
V3P3_S3V3P3_S3
0402LFCH5%1K
MINI PCIE CONNECTOR
EMPTY0402LF0EMPTY
00402LF
KIT_PARTS=(LATCH: QTY=1)
V1P5_S0
16VX7R0402LF
0.1UF10%
0.1UF10%
0402LFX7R16V
CONN
0402LF1/16W
1%1K
CH10%0.1UF
X7R0402LF16V
A36096-030
CONN
CONN
0.1UF10%
0402LF16VX7R
0805LF
22UF
V3P3_S3
20%6.3VX5R
C59768-003
R52R27
MH4
R3A3R3A4
J2L1
C3A26C3A25
MH1
R2A1C3A7
MH2
C3A2C3A1
6B2> 6B2>
5B2> 5A2>
5B7< 5B7<
6D2<> 20A2<> 20B4<> 6D2<> 20A2< 20B4<>
7D3<> 7D3<>
6C7<> 13A6<
6C7<> 13A7<
6B6<
6C7<> 13B6< 6C7<> 13B6<
REFCLK0_PREFCLK0_N
PCIE0_TX0_PPCIE0_TX0_N
PCIE0_RX0_PPCIE0_RX0_N
WIFI_DISABLE_NPCIE_RESET_N
I2C_SDAI2C_SCL
USBH1_DN
SLT0_SDASLT0_SCL
USBH1_DP
PCIE_RESET_N
WIFI_DISABLE_N
WAKE_N
1311
1210
148
4
16
159
2121
2325
3133
4442
46
3836
3230
1821262729
40373534
4350
6
1
2
53
7
431
1
6543
56
1
43
56
222
3924
4828
5241
20
22
171945474951
MP2MP1
ININ
MTG_HOLE_4VMTG_HOLE_4V
MTG_HOLE_4V
IN
INBIBI
BI
OUTOUTOUT
ININ
IN
REFCLK+REFCLK-
PERN0PERP0
PETP0PETN0
LED_WWAN_NLED_WLAN_NLED_WPAN_N
USB_D+USB_D-
RESERVED/UIM_C4 RESERVED/UIM_C8
+1.5V
+3.3VAUX
COEX2
CLKREQ_N
WAKE_N
+3.3VAUX+3.3VAUX
+1.5V+1.5V
+3.3VAUX
W_DISABLE_N
MP1
RESERVED
RESERVED
RESERVED
RESERVED
+3.3VAUX
MP2
UIM_CLKUIM_DATA
UIM_RESETUIM_PWRUIM_VPP
SMB_DATASMB_CLK
GND GND
GND
GND GND
GND GND
GND
GND GND
GND
PERST_N
COEX1GND GND GND
KEY
MPCIE_52P_LATCH_KIT
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
MICRO SD CONNECTOR
SILKSCREEN:
CAD NOTE:PLACE SD LED CLOSE TO THE SDIO CONN
SD ACTIVITY
CR-14 : @GALILEO_LIB.GALILEO(SCH_1):PAGE14
2.0
H38681
SHEET 14 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
GALILEO Gen2
V3P3_S0
TP
TP
33.2 CH
33.2 CH33.2 CH
33.2 CH33.2 CH33.2 CH
G46739-001
IC
IC
MICRO SD CONNECTOR
CONN
V3P3_S0
IC
IC
1%1KCH0402LF
V3P3_S0
0402LF
1UF
X5R6.3V10%
0402LF
V3P3_S0
1UF10%X5R6.3V
E16297-001GREEN
TP25
TP24
R2L5
R2L8R2L7
R2L12R2L6R2L13
U1L1
J4A2
U1L2
U1L3
U1L4
R1L10
C1L2C1L1
DS4A2
7B8<
7B7<> 7B7<>
7B8<> 7B7<> 7B7<>
7B8> 19A7>
7B8>
CLN_SD_DAT2_R
CLN_SD_CMD_R
CLN_SD_CD_N CLN_SD_CD_N_R
CLN_SD_DAT<1> CLN_SD_DAT1_RCLN_SD_DAT<0> CLN_SD_DAT0_R
CLN_SD_CMDCLN_SD_DAT<3> CLN_SD_DAT3_RCLN_SD_DAT<2>
CLN_SD_CLK
SD_LED
LED_SD
B2
5
B1
A1
B1
6
4
G2G1
1
87
32
109
A1
A2
B2
A2
B1
A1
G4G3
A2
B2
B1
A1
B2
A2
2
1
2
1
2
12
T_POINT1
T_POINT1
CH2
VP
CH1
VN
CM1230_02
CH2
VP
CH1
VN
CM1230_02
CH2
VP
CH1
VN
CM1230_02
CH2
VP
CH1
VN
CM1230_02
BIBI
BIBI
OUT
BI
IN
CONN_SDCARD_8P_PP
CARD_DET_SWCARD_DET_SW
G1
DAT1
CMDVDD
G3G4G2
DAT0VSSCLK
CD/DAT3DAT2
IN
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
TYPE A CONN
PLACE CHOKE AND DIODES CLOSE TO USB CONN
PLACE CHOKE AND DIODES CLOSE TO USB CONN
CAD NOTE:
POSSIBLE TO U3B1 PIN5PLACE C2B11 AS CLOSE AS
NOTE:TYPE B CONN
USB HOST
USB CLIENT
CAD NOTE:
NOTE:
CAD NOTE:
CR-15 : @GALILEO_LIB.GALILEO(SCH_1):PAGE15
GALILEO Gen2H38681
2.0 SHEET 15 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
CONN
D23040-001
LEDGREEN
G58911-001HDR
470PF10%50V
0402LF
10K
1/16W
CH5%
10%X7R0402LF16V0.1UF
V5_ALW_ON
V5_ALW_ON
IC
USB CONNECTORS
IC
SOT23LF
E58210-001
0402LF
5%CH
1/16W
V3P3_S0
10K
90OHM
INDE53905-001
V5_ALW_ON
ICD30400-001
E53905-001
90OHM
IND
0402LF1K
CH1%
1210LF
100UF
X5R6.3V20%
VBUS1
VCC_USB1
6.3VX5R0805LF 0603LF
X7R20%47UF
J2B3DS3B1
J3B2
C3B14
R3B3
C2B11
U2B3
U3B1
R2B15
L3M1
U2B2
L3M2
R3B12
C2M7 C3M11
7C3>
7D1<>
7D1<>
7C3<
7D1<>
7D1<>
USBH0_DP_CHUSBH0_DN_CH
LED_VBUS1
USBH2_DP_CHUSBH2_DN_CH
USB_PWR_EN0
USBH2_DN
USBH2_DP
USB_OC0_N
USBH0_DN
USBH0_DP
123
MH1
4
MH2
MT1MT2MT3MT4MT5
1
4
32
MT65
22
1
2
1
B2
A2 B1
A1
1
4
4
5 1
3
2
2
1
1
4
3
2
A2
B2
A1
B1
3
2
1
CONN4_D23040001
BI
BI
BI
BI
CHOKE_4P
CHOKE_4P
MICRO_USB_5P_SMT
MTMTMTMTMTMT
GNDIDD+D-VCC
CH2
VP
CH1
VN
CM1230_02
CH2
VP
CH1
VN
CM1230_02
TPS2051BDBVR
EN
INOC_N
GND
OUT
OUTIN
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
CAD NOTE:PLACE CONNECTOR ON SOLDER-SIDE.
CR-16 : @GALILEO_LIB.GALILEO(SCH_1):PAGE16
GALILEO Gen2H38681
2.0 SHEET 16 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
1/16W
22K5%0402LF~
240
V3P3_S5
1%
V3P3_S5
00
0402LF1/20W
EMPTY
H32748-001
CONN
BAT15
240240
DIO
1%1%
1%240
UART 1 & JTAG
1%33.2
1%33.2
1%1K
CH0402LF1/16W
1K1%EMPTY0402LF1/16W
0402LF
1K1%EMPTY
1/16W
1/16W0402LFEMPTY
1K1%
0.1UF
0402LF
V3P3_S5
X7R10%16V
V3P3_S5
HDR
R81
R80
R42
J2
R41
CR1
R43
R1L5
R1L7
R1L3R1L1R2L1
R1L2
C4A1
R40
J3
6C2< 6C2<
6C2>
7A7<
21B3<
6C2<
6C2<
7A7> 21C3<
7A7>
UART1_RXD_MUX_R
UART1_RTS_N_R
UART1_CTS_N_R
JTAG_TRST_NJTAG_TDIJTAG_TDOJTAG_TCK_RJTAG_TMS_R
UART1_CTS_N
UART1_RXD_MUXUART1_TXD_R
JTAG_TMS
JTAG_TCK
UART1_TXD
UART1_RTS_N
97
35
1
108642
1
2
1
32
456
SOT23C
OUT
OUT
IN
OUTOUT
conn_2x5_shrd_male
10987654321
1X6HDR
IN
OUTINOUT
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
PIN3 SILK= +3.3V
PLACE NEAR ETHERNET PORT.
PLACE CAPACITORS CLOSE TO PFBOUT(PIN23)
MMZ2012R102A1K-OHM 0.5A
RMII PHY
LED SIGNALS HAVE INTERNAL PU
CAD NOTE:
CAD NOTE:
CAD NOTE:
PLACE CAPACITORS C1M3 & C1M5 CLOSE TO PFBIN(PIN18&37)
PIN1 SILK= +5V
CAD NOTE:LENGHT MATCH CLOCK SPLIT. TRACE BETWEEN PIN 1 OF RESISTORS SHOULD BE SHORT
CAD NOTE:PLACE RESISTOR ANDCAPAS CLOSE TO RMII PHY
DESIGN NOTE:
U16 IS DESIGNED FOR SILVERTEL AG9712S COMPONENT.
CR-17 : @GALILEO_LIB.GALILEO(SCH_1):PAGE17
GALILEO Gen2H38681
2.0 SHEET 17 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
10MMLF1206LF1/2W
EMPTY EMPTY
AGND_VCC
16V
0
EMPTY5%
0402LF1/16W
X7R0402LF
CONN
esd_diodeSMAJ58CA
SMAJ58CAesd_diode
H31881-001
IC
0402LF 0402LF
V3P3_S0V3P3_S5HDR
10%0.1UF
5%
FB
CH0402LF
V3P3_S0
4.7K
1/16W
5%
10%0.1UFVIN_POE
V3P3_S0
0402LF110 1%
CH
CHCH
V3P3_S0
AGND_VCC
0805LFG63888-001
10UF16V10%TANT
CH00
0603LF
V3P3_S0_A
X7R
0.1UF
0402LF
5%2.2K0402LF CH
33.2
33.233.2
X5R10%1UF
0402LF
AGND_VCC
0.1UF
X7R10%
V3P3_S0_A
0402LF
X7R0402LF
1%CH
0402LF
0.1UF10%X7R
1UF10%X5R0402LF
V5_ALW_ON
VSHLD_S5
4.87K0402LF
0.1UF10%
0402LFX7R
10%X7R
0.1UF
0402LF
1%
1%0402LF
22.6
22.6
2.2K5%CH
1/16W0402LF
V3P3_S0_A
1.5K1%1%
1.5K
CH CH
1/16W0402LF
1/16W0402LF
X7R10%0.1UF
0402LF0402LF
49.91%CH
49.91%CH
0.1UF
0402LFX7R10%
CH1%49.949.9
0402LFCH1%
CH0402LF
5%
1/16W
4.7K
V3P3_S0
V3P3_S0
LAN
EMPTY
TBD
CH
0402LF0
470UF20%
0402LF5%0
620
FB
10%
FB
FB
FB
110 1%
R44
FB4
J4B1
D1
D2
U4B1
R1M7
J1A6
C1M2
FB2
FB3
FB1
R2M15
R2M9
R2M10R2M13
C4B5
R1M6
C1M4
FB1M1
R1
C1M8C1M7
R4B4
C1M10C1M6
C1M5C1M3
R3A6
R3A7
R1M3R4B3R4B2
C1M1R1M8C1M9R1M9R1M10
R4B1
U16
C44
R45 R46
R47
C1M12
R1M2
R1M117C2<>
17A3<> 17C6<>
17D6>
7B2> 17C7> 7B2<> 17C6<>
17C5<
17A3<> 17B8<> 17A3<> 17B7<>
7C2> 19B7>
7C2> 7B2> 19B6>
17A3<> 17B7<>
17C7>
17B7<>17C5<>
17B7<>
17C2<> 17C6<>
17B8<>17C5<>
7B2< 7B2<
7B2<
17A3<> 17C2<>
17A3<> 17C2<>
6A2>
17C2>
7C3<
17C2<
7B2<> 17C2<>
7B2> 17C4<
17C4<
17A3<> 17C5<>
17A3<> 17C5<>
17A8<>
17C2<
17C2<
17A4<
17B6< 17A1< 17A1<
17A4<
17A8<> 17A4< 17A4<
17C4<
17A8<>
17A8<>
RMII_I_X1
RMII_S0_TDN
RMII_S0_TDN
RMII_VC4_R
RMII_VC1_R
RMII_S0_RDP
RMII_S0_RDN
RMII_VC2_R
RMII_S0_TDP
LED_RJ45_C1
LED_SPEED
LED_LINK
RMII_VC3_R LED_RJ45_C2
RMII_S0_CT1
RMII_S0_RDN
RMII_VC3
RMII_S0_RXD1_RRMII_S0_RXD0_R
ETH_BLINKRMII_S0_RX_DV_R
RMII_I_X1
RMII_S0_MDC RMII_S0_MDIO
LED_LINKLED_SPEED
PHY_RBIASRMII_S0_PFB
RMII_S0_TDP RMII_S0_RDP
RMII_S0_TXD1
RMII_S0_TX_ENRMII_S0_TXD0
RMII_S0_TDN
RMII_S0_RST_N
RMII_S0_RXD1RMII_S0_RXD0
RMII_S0_RX_DV
RMII_S0_RDN
RMII_S0_RDP
RMII_REF_CLK_OUT
VPOE_ADJ
RMII_VC2
RMII_VC3
RMII_VC1
RMII_VC1RMII_VC4
RMII_S0_PFB
RMII_REFCLK
RMII_S0_RX_DV_R
RMII_S0_MDIO
RMII_S0_MDC
RMII_S0_RST_N
RMII_S0_TDP
RMII_VC4
RMII_VC2
45
107
1
3
6
8
9
2
2
1112
L39
L4
L2
L1
6
1
8
5
4
7
10
3
12
12
8
10
3332
9
38373635
1
3456
2618
23
11
39
12
19
21
4029
22
41
7
14
13
15
16
17
20
25
2728
34
30
2
24
31
2
1
2
21
2
1
22
2
2
1
2
1
2
2
2 2
2
21
1
11
2 2
2
22
22
1
2
2
321
BI
BI
BI
BI
SINGATRON_2TJ582_010111H
YE
LLO
W
J1
J6
J8
MH2
J3
J4
J2
J7
J5
GR
EE
N
D1-
VC4
VC1
D2+
D2-
VC2
D1+
GND
VC3
MH1
CT
1X3HDR
IN
OUT
OUTOUT
BI
OUT
BIBI
BIBI
IN
IN
IN
ININ
IN
dp83848j
THPADIOGND
RXD_3/PHYAD4RXD_2/PHYAD3RXD_1/PHYAD2RXD_0/PHYAD1
COL/PHYADO
RX_ER/MDIX_EN
CRS/CRS_DV/LED_CFGRX_DV/MII_MODE
RX_CLK
PFBIN2
DGND
X1X2
IOVDD33
MDC MDIO
LED_LINK/AN0LED_SPEED/AN1
RBIASPFBOUT
AGND
PFBIN1
TD+
AGND
RD+
RESERVEDRESERVEDRESERVED
TXD_3TXD_2TXD_1
TX_EN
IOVDD
TXD_0
RD-TD-
RESET_NTX_CLK
AVDD33
VB2CP1
NCGND
VA1
VB1
CP2
VDC
ADJ
VA2
OUT
IN
BI
BI
BI
BI
OUTBI
OUT
OUT
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
LSPI_CS_N HAS INTERNAL 20K PU IN QUARK
CAD NOTE:
BIOS STORAGEFLASH
PLACE DECOUPLING CAPACITORS AS CLOSE AS POSSIBLE TO ADC
CR-18 : @GALILEO_LIB.GALILEO(SCH_1):PAGE18
GALILEO Gen2
2111 NE 25TH AVENUEHILLSBORO OR 97124
2.0
H38681
SHEET 18 OF 28
.28A120FB
10%X5R10V
10%10V
0.001UF
0402LF
10K5%CH
X5R
1UF
0402LF10V20%
HDRA91836-079
V3P3_S0
DIO
BAT54C
33.20402LF CH
1%
V3P3_S0
33.2 1%CH
X7R0402LF
0402LF CH33.2 1%
X5R0603LF
16V 6.3V10%0.1UF
10%4.7UF
10%0.001UF
10V10%
0.001UF10V
0.001UF
0402LF
10%10V
0.001UF10%X5R
16V10%
0402LFX7R
0402LFX5R
1UF10V20%
0.1UF10%16VX7R
0402LF
SPI: ADC&FLASH
33.2 CH
5%CH
4.7K
0402LFCH5%
0402LF
4.7K
ICH10285-001
0402LF1%CH
0402LF
0402LFX5R
0402LFX5R
0402LFX5R
0402LFX5R
10V
33.2
0402LF
0.001UF
22
2222222222
IC
H31902-001
0.1UF
V5_ALW_ON
FB5
C39
R2B30C5
J1B2
CR3M1
R2B18
R2B6
R2B5
C4M5 C4M6
C40 C41 C42 C43
C2B1
C3M9 C3M10
R3M15 R4M2
U2B4
R2B10
C38
R1A11
R1A7
R1A10R1A13R1A16
U11
R1A1
R3M11
24C8>
6C6>
6C6> 19B1>
6D7<
6C6<
6C6> 19A6>
24C8>
20B5> 24B2<>
20B5> 24B2<> 20B5> 24B2<>
20B5> 24B2<>
6D7> 19D7> 6B7>
6D7> 19D5>
V5_ALW_ON_FIL
AVIN5
VCC_DEDIPROG
LSPI_CS_N_R
LSPI_MOSI_R
SPI0_MISO
AT25_HOLD_N
LSPI_MOSI
LSPI_CS_N
AT25_WP_N
LSPI_SCK
LSPI_MISO_R LSPI_MISO
LSPI_SCK_R
VCC_FLASH
AVIN4
ANALOG_A0_RANALOG_A0
ANALOG_A2ANALOG_A1
ANALOG_A3
AVIN5_RAVIN4_RANALOG_A3_R
SPI0_MISO_R
SPI0_MOSISPI0_CS_N
SPI0_SCK
ANALOG_A2_RANALOG_A1_R
2
1
531
68
42
1
2
1 2
1 2
2
1
2
2
3
2 2
7 4
5
6
3
1
2
1 1
1 2
8
1110
876
312
5
14
13
16
4
1
2
9
15
adc108s102
SCLK
CS_N
VA
AGND
IN0IN1IN2IN3IN4IN5IN6IN7 DGND
VD
DIN
DOUT
SOT23C
OUT
ININININININ
2X4HDR7
IN
ININ
IN
IN
W25Q64FV_8P
HOLD_NCLKDICS_NWP_N
GND
DO
VCC
IN
OUT
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
BIT1
000 - QUARK SKU SETTINGS
(LOW) PUNIT BASE ADDRESS
BIT0
(LOW) POWER BUTTON NOT USED
BIT0(LOW) SINGLE RANK DDR3 SDRAM
BIT2
(LOW) MEMORY DOWN CONFIG
BIT1 BIT000 - REMOVABLE CARD SLOT FOR SDIO
01 - 1GBIT SDRAM
SHORT TO GND TO ENTERDESIGN NOTE:
BIT1
SILK=FWR
RECOVERY MODE.
(HIGH) X8 DDR SDRAM
CR-19 : @GALILEO_LIB.GALILEO(SCH_1):PAGE19
GALILEO Gen2H38681
2.0 SHEET 19 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
0402LF
CH
10K
0402LF1/16W
1%10K
CH0402LF1/16W
0402LF
1%10K
CH
1/16W
EMPTY
10K1%
1/16W0402LF
V3P3_S0
0402LF
0402LF
10K
1/16W
CH1%
10K1%
1/16W
EMPTY
10K
1/16W
1%CH
V3P3_S0
10K
1/16W0402LFEMPTY1%
10K1%
1/16W0402LFCH
0402LF
EMPTY0402LF1/16W
V3P3_S0
10K1%
1%100K
QUARK STRAPS
0402LF1/16W
10K1%CH
10K
CH
1/16W0402LF
1%
1%CH
V3P3_S0
1/16W0402LF
100K1%CH
1/16W0402LF
10K
CH1%
TP23
R3A17
R2B4
R3M7
R2B12
R2B17
R3A14
R3M9
R2B19
R4B8
R4B5
R3A10R2B13
R2B16
R4B6
R1L11
7C2> 17C4<
6D7> 18A4<
7B4>
6C6> 18D6<
6C7> 21D3< 6D7> 21C6<
7B4>
6D7> 18B4<
7B2> 17C4<
6B6< 6C6> 18C6< 7B8> 14C6<
RMII_S0_TXD1
SPI0_MOSI
RMII_S1_TXD0
LSPI_MOSI_R
SPI1_SCKSPI1_MOSI
RMII_S1_TXD1
SPI0_SCK
RMII_S0_TXD0
EC_PWRBTN_NLSPI_SCK_RCLN_SD_CLK OUT OUT
OUT
OUTOUT
OUT
OUT
OUT
OUTOUT
OUT
OUT
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
EXP2
EXP0
EXP1
CR-20 : @GALILEO_LIB.GALILEO(SCH_1):PAGE20
GALILEO Gen2H38681
2.0 SHEET 20 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
H47895-001
PCAL9535AHF
IC
H47895-001
PCAL9535AHF
IC
H47895-001
PCAL9535AHF
IC
VSHLD_S5
VSHLD_S5
CH
CH
5%CH
22K
5%22K
5%
VSHLD_S5
CH5%22K
22K
CH5%
VSHLD_S5
22K
5%CH
22K
22K
CH5%
22K
CH5%
1/16W
CH
4.7K5%
0402LF
0402LF
V3P3_S0
CH0 CH
0
VSHLD_S5
H29123-001
IC
0.1UF16V10%X7R0402LF
VSHLD_S5
VSHLD_S5
EMPTY
EXTERNAL IO MUXING 1
5%EMPTY
4.7K
0402LF1/16W
X7R16V0.1UF
22K
0402LF22K
22K
22K0402LF
0402LF22K
22K
10%16V0402LF
0.1UF
FET
FET
X7R
V3P3_S0
V3P3_S5
10K
CH0402LF1/16W
5%10%0.1UF
16VX7R
5%
0402LF
10%
0402LF
4.7K
0402LF
0402LF
0.1UF10%16VX7R0402LF
IC
H31877-001
0402LF
05%CH
1/16W0402LF
CH
1/16W
5%22K
0402LF
22K5%CH
1/16W0402LF
VSHLD_S5
22K
1/16W
CH5%
0402LF
CH5%22K
VSHLD_S5
22K
CH5%
22K
CH5%
22K
CH5%
22K
CH5%
22K5%CH
22K
CH5%
22K5%EMPTY
22K5%EMPTY
22K5%EMPTY
5%22K
1/16W0402LFCH
VSHLD_S5
CH5%
0603LF
1.8K
1/10W
CH5%
0603LF
1.8K
1/10W
U2
U1
U3
R51
R67 R72
R69
R71
R61
R64
R59
R4
R26
R10
U4
C6R3
C3R36
R37
R34
C4
C1
Q1L2
Q1L1
R35
C12 R33
R8
U8
R2
R38
R7
R32R31
R62
R63
R60
R57
R50
R66
R68
R70
R65R75
R74
R73
R6R5
20A7< 21D3< 20A7< 21A6< 20A7< 21B6< 23B5< 20A7< 23B2<> 23C5<
20A4< 24C3<>
20A5< 24C3<> 23D5<
20A7< 23C2<> 23C5< 23D5< 20A7< 23C2<> 23C5< 23D5< 20A7< 23C5< 23D2<>
20A5< 24C6<
22B6< 20C7< 22A3<> 22B7< 22A6< 20C7< 22A3<> 22B7< 22A6< 20C7< 22B3<> 22B7< 22A6< 20C7< 22B3<> 22B7< 22D6< 20C7< 22C3<> 22C7< 22D6< 20C7< 22C3<> 22C7< 22D6< 20C7< 22C3<> 22C7< 22D6<
20B2<> 20B8< 20C6< 20D3< 24C6<>
20C7< 22C7< 22D3<>
20A5< 24A5<> 24A6<> 6B7<
18A7< 24B2<>
22C4<> 24C3<> 23C3<> 24C3<>
21C3<
21D8< 21D8< 21C8< 21C8<
21B8< 21B8< 21A8< 21A8<
21C6< 21A6< 21B6<
21B3< 24C8< 24C8<
24C8<>
18A7< 24B2<>
18A7< 24B2<>
18A7< 24B2<>
20B2<> 20B8<> 20C6<> 20D3<> 24C6<>
6D2<> 13B2< 20A2< 20B8< 20C6< 20D3< 20D8<> 24C6<>
21C6<
6D2<> 13B2<> 20A2<>
24C8<>
20B8<> 20C6<> 20D3<> 20D8<> 24C6<>
20A5<
20A4<
20A5<
20B2<> 20B8<> 20D3<> 20D8<> 24C6<>
20B2<> 20B8< 20D3< 20D8<> 24C6<>
20B2<> 20C6<> 20D3<> 20D8<> 24C6<>
20B2<> 20C6< 20D3< 20D8<> 24C6<>
20D6> 22C3<> 22C7< 20D6> 22C3<> 22C7<
20C6> 22A3<> 22B7<
20C6> 22A3<> 22B7<
20C6> 22B3<> 22B7<
20D6> 22B3<> 22B7<
20D6> 22C3<> 22C7< 20D6> 22C7< 22D3<>
20C4<>
20B2<> 20B8< 20C6< 20D8<> 24C6<> 20B2<> 20B8<> 20C6<> 20D8<> 24C6<>
6D2<> 13B2<> 20B4<> 6D2<> 13B2< 20B4<>
20C4<>
20C3> 24C3<>
20C4<>
20C3> 24C3<>
20B5> 24A5<> 24A6<>
20B5> 24C6<
20C4> 23C5< 23D2<>
20C4> 23C2<> 23C5< 20C4> 23C2<> 23C5<
20C3> 23B2<> 23C5<
20C3> 21D3< 20C3> 21A6< 20C3> 21B6<
SW_RESET_N_SHLDMUX8_SELMUX7_SELMUX5_SELLVL_C_PU5LVL_C_OE5_NIO8_PU
IO8IO7_PU
IO7LVL_C_PU2LVL_C_OE2_NLVL_C_PU1LVL_C_OE1_NLVL_C_PU0
LVL_I2C_SDALVL_I2C_SCL
LVL_C_OE0_N
MUX_IO3MUX_IO2
AMUX1_INAMUX2_NO2_R
AMUX2_NO1_R
ANALOG_A3R
ANALOG_A2R
ANALOG_A1R
ANALOG_A0R
LVL_I2C_SDALVL_I2C_SCL
LVL_B_PU7LVL_B_OE7_NLVL_B_PU6LVL_B_OE6_NLVL_B_PU5LVL_B_OE5_NLVL_B_PU4LVL_B_OE4_NLVL_B_PU3LVL_B_OE3_NLVL_B_PU2LVL_B_OE2_NLVL_B_PU1LVL_B_OE1_NLVL_B_PU0
LVL_I2C_SCL
LVL_B_OE0_N
LVL_B_OE2_NLVL_B_OE3_N
LVL_B_OE7_NLVL_B_OE6_NLVL_B_OE5_NLVL_B_OE4_N
LVL_B_OE1_NLVL_B_OE0_N
RESET_N_SHLDEXP2_INT
SW_RESET_N_SHLD
ANALOG_A2
IO3IO2
MUX9_SEL
MUX0_SELMUX0_I1MUX1_SELMUX1_I1
MUX2_SELMUX2_I1MUX3_SELMUX3_I1
MUX4_I1MUX6_SELMUX6_I1
MUX10_SELAMUX2_IN1AMUX2_IN2
LVL_I2C_SCLLVL_I2C_SDA
EXP0_INT
AMUX2_NO1
ANALOG_A3
ANALOG_A1
ANALOG_A0
LVL_I2C_SDA
I2C_SCL LVL_I2C_SCL
MUX4_SEL
I2C_SDA
AMUX2_NO2
EXP1_INT
LVL_I2C_SDA
I2C_SDAI2C_SCL
IO8_PU
IO8
IO7_PU
IO7
RESET_N_SHLD
AMUX1_IN
LVL_C_OE0_N
LVL_C_OE2_NLVL_C_OE1_N
LVL_C_OE5_N
MUX8_SELMUX7_SELMUX5_SEL
18
2423
21
1716151413121110
9
8765432
22
2019
1
25
18
2423
21
1716151413121110
9
8765432
22
2019
1
25
18
2423
21
1716151413121110
9
8765432
22
2019
1
25
3
12
7
456
89
25
20
2324
22
1314
17
15
16
1819
27
2121
28
29
10
26
11
74
21
8
6
39
5
OUTOUT
OUT
OUT
cat24c08hu4i
SCL
WP
NCNC
A2 VSSSDA
VCC
THPAD
BI
BI
BI
BI
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUTOUT
BIOUTOUTOUTOUTOUT
OUTOUTOUTOUT
OUTOUTOUT
OUT
OUTOUTOUT
OUT
OUTOUTOUTOUT
OUTOUTOUT
OUT
OUTOUT
OUT
OUTOUT
OUTOUT
OUTOUTOUTOUTOUTOUTOUT
OUT
pca9685VDD
OE_N
A3A4
LED0LED1LED2LED3
LED4LED5LED6LED7
VSS
LED8LED9
LED10LED11
LED12LED13LED14LED15
A5
EXTCLK
SCLSDA
AOA1A2
THPAD
OUTOUT
A0
A2A1
VDD
P1_7P1_6P1_5P1_4P1_3P1_2P1_1P1_0
VSS
P0_7P0_6P0_5P0_4P0_3P0_2P0_1
INT_N
SDASCL
P0_0
THPAD
A0
A2A1
VDD
P1_7P1_6P1_5P1_4P1_3P1_2P1_1P1_0
VSS
P0_7P0_6P0_5P0_4P0_3P0_2P0_1
INT_N
SDASCL
P0_0
THPAD
A0
A2A1
VDD
P1_7P1_6P1_5P1_4P1_3P1_2P1_1P1_0
VSS
P0_7P0_6P0_5P0_4P0_3P0_2P0_1
INT_N
SDASCL
P0_0
THPAD
BI
BI
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
MUX1
MUX5
MUX4
MUX6
MUX7
MUX9
MUX8
MUX3
MUX2
MUX0
MUX10
CR-21 : @GALILEO_LIB.GALILEO(SCH_1):PAGE21
GALILEO Gen2H38681
2.0 SHEET 21 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
IC0402LF
0402LF
0.1UF
0402LFX7R
EXTERNAL IO MUXING 2
V3P3_S0
0402LF
X7R16V
V3P3_S5
REV=1
X7R16V10%0.1UF
0402LF
V3P3_S5
0.1UF10%
IC
REV=1
IC
REV=1
16V10%
IC
V3P3_S5
X7R10%0.1UF16V0402LF
V3P3_S5
IC
10%0.1UF16VX7R0402LF
V3P3_S5
IC
10%0.1UF16VX7R
V3P3_S5
IC
10%0.1UF16VX7R0402LF
IC
V3P3_S5
REV=1
REV=1
REV=1
16VX7R0402LF
10%0.1UF
0.1UF10%16VX7R
0.1UF10%16V
REV=1
REV=1
X7R0402LF
16V0402LF
10%0.1UF
X7R
V3P3_S5
V3P3_S5
V3P3_S5
IC
REV=1
REV=1
IC
IC
REV=1
U20
U13
C27
U23
C25
C26
U24
U25
C20
C22
C23
C24
U9
U19C14
C15
C16
U21
U22
C17
U10
U14
7A7<
22C8<
22B8<
20C1>
6C7<> 23C7< 23D2<>
16C5>
20C1>
7A7> 16C5<
20D1>
6C7<> 22C2>
20D1>
20D1>
6C7<> 22C2>
20D1>
6C7<> 22A2>
6C7> 19D3>
20A7< 20C3>
22B8<
22B8<
22B8<
20D1>
6C7<> 22D2>
20C1>
20D1>
6D7> 19D4>
6C7<> 22B2>
20A7< 20C3>
22C8<
22C8<
20C1>
6B7<> 22B2>
20C1>
20A7< 20C3>
6B7<> 22A2>
7B7>
22C8<
20D1>
6C7<> 22D2>
20D1>
20D1>
21D6>
21C5<
21C3<
21B4>
UART1_RXD
MUX9_Y
MUX8_Y
MUX10_SEL
LVL_C_A1
UART1_RXD_MUX
MUX9_SEL
UART1_TXD
MUX0_Y
MUX5_Y
MUX3_SEL
MUX3_I0
MUX3_I1
MUX2_SEL
MUX2_I0
MUX2_I1
MUX8_I0
SPI1_SCK
MUX8_SEL
MUX4_Y
MUX6_Y
MUX7_Y
MUX0_Y
MUX0_I1
MUX0_I0
MUX4_I1
MUX5_Y
MUX4_SEL
SPI1_MOSI
MUX5_I0
MUX5_SEL
MUX1_Y
MUX2_Y
MUX6_I1
MUX6_I0
MUX6_SEL
MUX7_SEL
MUX7_I0
UART0_TXD
MUX3_Y
MUX1_I1
MUX1_I0
MUX1_SEL
MUX0_SEL
6
1
3
3
2
5
5
43
1
2
5
4
6
2
5
4
6
3
1
5
4
2
4
2
5
2
4
5
2
4
5
4
1
3
6
1
3
1
6
1
3
6
1
3
6
2
5
4
2
6
1
3
6
5
4
26
3
1
5
4
2
1
3
6
IN
ININ
OUT
OUT
OUT
I1
74LVC1G157
VCC
I0 Y
GNDS
IN
IN
IN
IN
OUT
IN
I1
74LVC1G157
VCC
I0 Y
GNDS
IN
IN
I1
74LVC1G157
VCC
I0 Y
GNDSIN
OUT
OUT
I1
74LVC1G157
VCC
I0 Y
GNDS
IN
IN
I1
74LVC1G157
VCC
I0 Y
GNDS
I1
74LVC1G157
VCC
I0 Y
GNDS
IN
IN
IN
I1
74LVC1G157
VCC
I0 Y
GNDS
IN
IN
IN
I1
74LVC1G157
VCC
I0 Y
GNDS
IN
IN
ININ
OUT
OUT
I1
74LVC1G157
VCC
I0 Y
GNDS
IN
IN
IN
OUTIN
I1
74LVC1G157
VCC
I0 Y
GNDS
I1
74LVC1G157
VCC
I0 Y
GNDS
IN
IN
IN
IN
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
CR-22 : @GALILEO_LIB.GALILEO(SCH_1):PAGE22
GALILEO Gen2H38681
2.0 SHEET 22 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
H31894-001
IC
V3P3_S0
V3P3_S0
74LVC126A
0402LF
74LVC126A
C88413-002VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
74LVC126AIC
0.1UF
C88413-002
IC
C88413-002
IC
IC74LVC126A
C88413-002
IC74LVC126A
C88413-002
IC74LVC126A
C88413-002
74LVC126AIC
C88413-002
IC74LVC126A
C88413-002
X7R0402LF
0.1UF16V10%
V5_ALW_ON
0402LFX7R16V10%0.1UF
H29265-001
1/16W
22K5%CH0402LF
1/16W0402LF
5%CH
22K
X7R16V
VSHLD_S5
10%0.1UF
IC
H29265-001
IC 1/16W0402LF
1/16W
CHCH5%22K 22K
5%
0402LF
X7R0402LF
0402LF1/16W
CH
22K5% 5%
0402LF1/16W
22K
CH
10%16V0.1UF
0402LF 0402LFCHCH
5%22K
5%22K
X7R
LVL B BUFFER
16V10%
0402LF 1/16W 1/16W
U17
EU3
EU3
EU3
EU3
EU2
EU2
EU2
EU2
C28
C30 R18 R20
C29
U15
U18
R17 R21
R23 R25
C32
R22 R24
C31
21C1> 21C6> 21B6> 21A6> 21C3> 21B3> 21A3> 21D1>
20C6>
20C6> 20C6>
20C6>
23B7<
20C6> 20C7< 22A3<>
20C7< 20D6> 22C3<>
20C7< 20D6> 22B3<>
20C6> 20C7< 22B3<>
20C6> 20C7< 22A3<>
20C7< 20D6> 22C3<>
20C7< 20D6> 22C3<>
20C7< 20D6> 22D3<>
20D6> 20D6> 20D6>
20D6>
24A5<> 24D3<>
24C3<>
24D3<>
24C3<>
24C3<> 20B4> 24C3<>
6C7<> 21D8<
6C7<> 21C8<
6C7<> 21B8<
6C7<> 21A8<
24D3<>
6C7<> 21B6<
24A1> 24D3<>
6B7<> 21B6<
6B7<> 21A6<
6C7<> 21D3<
20C6> 20C7< 22B7<
20C6> 20C7< 22B7<
20C6> 20C7< 22B7<
20C7< 20D6> 22C7<
20C7< 20D6> 22B7<
20C7< 20D6> 22C7<
20C7< 20D6> 22C7<
20C7< 20D6> 22C7<
MUX9_YMUX1_YMUX2_YMUX3_YMUX4_YMUX6_YMUX7_YMUX8_Y
BUF_IO1BUF_IO10BUF_IO11BUF_IO9BUF_IO6BUF_IO5BUF_IO3
LVL_B_PU4
LVL_B_PU6LVL_B_PU5
LVL_B_PU7
BUF_IO13
LVL_B_OE6_N
LVL_B_OE3_N
LVL_B_OE4_N
LVL_B_OE5_N
LVL_B_OE7_N
LVL_B_OE2_N
LVL_B_OE1_N
LVL_B_OE0_N
LVL_B_PU2LVL_B_PU1LVL_B_PU0
LVL_B_PU3
LVL_B_OE7_N
LVL_B_OE6_N
LVL_B_OE5_N
IO13
IO1
IO10
IO6
IO5
IO3
LVL_B_OE3_N
LVL_B_OE4_N
LVL_B_OE2_N
LVL_B_OE1_N
LVL_B_OE0_N
MUX0_I0
MUX1_I0
MUX2_I0
MUX3_I0IO9
MUX5_I0IO11
MUX6_I0
MUX7_I0
MUX8_I0
191
87
56
20
32
4
2110
111213
1514
181716
9
15
10
1312
10
1312
14
14
9
5421
8
117
6
3
715
11
89
5
24
1
6
3
2
1
3
5
4
6
9
10
8
12
13
11
2
1
3
5
4
6
9
10
8
12
13
11
OUT
OUT
INININININININ
IN
IN
IN
IN
IN
ININ
IN
sn74lv125a
3OE_N3A4OE_N
1Y1OE_N1A2OE_N2A 2Y
GND
3Y
4Y4A
VCC
THPAD
sn74lv541at
OE1_N
A1A2A3A4A5A6A7A8
GND
Y8Y7Y6Y5Y4Y3Y2Y1
OE2_N
VCC
THPAD IN
IN
OUT
IN
IN
IN
sn74lv125a
3OE_N3A4OE_N
1Y1OE_N1A2OE_N2A 2Y
GND
3Y
4Y4A
VCC
THPAD
IN
INININ
BI
OUT
BI
BIBI
BIBI
BIBI
OUT
OUT
OUT
OUT
OUT
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
CAD NOTE:PLACE AT LED AREA
CR-23 : @GALILEO_LIB.GALILEO(SCH_1):PAGE23
GALILEO Gen2H38681
2.0 SHEET 23 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
H31894-001
IC
LEDGREEN
1/16W0402LF
3305%CH
CH0402LF1/16W
IC
X7R
0.1UF16V10%
V5_ALW_ONX7R0402LF16V0.1UF10%
H29265-001
IC 1/16W0402LFCH5% 5%
22K
CH5%22K
LVL C BUFFER
IC
IC74LVC126A
0402LFX7R16V10%
C88413-002
C88413-002
C88413-002
74LVC126A
74LVC126A0.1UF
VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
VCC=V3P3_S0;GND=GND;TH=GND
V3P3_S0
1/16W0402LF
VSHLD_S5
22K
5%CH
22K
0402LF1/16W VCC=V3P3_S0;GND=GND;TH=GND
C88413-002
74LVC126AIC
CH33.2
0402LF
U12
DS2A1
R2A3
R11
C33
C34
U26
R28 R29
EU4
C36EU4
EU4
R30
EU4
R56
6B7< 7B7< 23D2<>
22B6>
6C7<> 21B3< 23D2<> 6C7<> 23C2<>
20A7< 20C4> 23D2<>
20A7< 20C4> 23C2<>
20A7< 20C4> 23C2<>
20B4> 24C3<>
24C3<>
20C4>
20C3<> 20C4>
20A7< 20C3> 23B2<>
20C3>
24C3<>
24A5<> 24D3<>
6C7<> 6C7< 23B1<
6C7<> 23C7<
20A7< 20C4> 23C5<
20A7< 20C4> 23C5<
6B7< 7B7< 23C7<
20A7< 20C4> 23C5<
6C7<> 21B3< 23C7<
20A7< 20C3> 23C5<
6C7<> 6C7< 23B7<
UART0_RXD
BUF_IO13 IO13_LEDBUF_IO12
BUF_IO4BUF_IO2BUF_IO0
IO13_LED_R
LVL_C_A1LVL_C_A2
LVL_C_OE0_N
LVL_C_OE2_N
LVL_C_OE1_NIO2
IO0
LVL_C_A2
LVL_C_OE2_N
LVL_C_OE1_N
LVL_C_PU0
UART0_RXD
LVL_C_OE0_N
LVL_C_A1
LVL_C_PU2LVL_C_PU1
LVL_C_OE5_N
LVL_C_PU5
IO4
IO12
LVL_C_OE5_N
BUF_SPI1_MISO SPI1_MISO
SPI1_MISO
9
10
8
12
13
11
109
13
31245 6
7
8
1112
14
15
1
23456789
10
1112131415161718
19
20
21
2
1
3
5
4
6
IN
ININ
BIBI
BI
BI
IN
IN
ININ
IN
sn74lv125a
3OE_N3A4OE_N
1Y1OE_N1A2OE_N2A 2Y
GND
3Y
4Y4A
VCC
THPAD
IN
IN
IN
IN
IN
sn74lv541at
OE1_N
A1A2A3A4A5A6A7A8
GND
Y8Y7Y6Y5Y4Y3Y2Y1
OE2_N
VCC
THPAD
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
DIGITAL 8DIGITAL 10
DIGITAL 13DIGITAL 12DIGITAL 11DIGITAL 9
DIGITAL 1DIGITAL 0DIGITAL 2
DIGITAL 5DIGITAL 6DIGITAL 4DIGITAL 3
CAD NOTE: PLACE RESISTORS CLOSE TO CONNECTOR.
SILK=ICSP HDR
SILK=RESET
PIN2:IO REFPIN1:OPEN
AMUX1AMUX2DIGITAL 7
CR-24 : @GALILEO_LIB.GALILEO(SCH_1):PAGE24
GALILEO Gen2H38681
2.0 SHEET 24 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
10%0.1UF25VX5R0402LF
VIN
VSHLD_S5
CONN
THLF
G79625-001
G63512-001
V5_ALW_ON
G63512-001
X7R16V10%0.1UF
0402LF
V5_ALW_ON
IC10%
0402LF16VX7R
V5_ALW_ON
0.1UFIC
33.233.2
SWD90553-001
0402LFX5R6.3V1UF10%
1/16W0402LF
CONN
H18587-001
CH
VSHLD_S5
100K1%
AMUX & EXTERNAL IO
V5_ALW_ON
33.2
33.2
33.2
33.233.2
33.2
10%X7R16V
THLF
CONNG79672-001
CONN
G79666-0010.1UF
33.2
33.233.2
33.233.2
CONN
THLF
33.2
0402LF
33.2
V3P3_S5
C37
C2U28
C9U7
S1
R13R14
C13
J1
R1A21
R4M7
R4M9R4M10
R4M8
R4M11R4M12R1B2
J1A5
J1B1
R3M16
R3M18R3M17
R3M19R3M20
C2B5
J2B1
R15
J2A1
20A5< 20B5> 24A5<>
18A7< 20B2<> 20B8<> 20C6<> 20D3<> 20D8<>
20A5< 20B5>
23C3<> 22B4<> 20B4> 23C3<> 20B4> 22C4<>
23C3<> 22C4<> 22C4<>
24C4<> 24D3<> 24C4<> 24D3<>
18A7< 20B5> 18A7< 20B5>
18A7< 20B5> 18A7< 20B5>
20B5> 20C1>
20C1> 20B5> 18A7< 20B2<> 20B8<
20C6< 20D3< 20D8<>
22B4<> 24D3<> 23B3<> 24D3<> 22B4<> 24D3<> 20A5< 20B5> 24A6<>
20A5< 20C3>
24B2<> 24C4<> 24B2<> 24C4<>
23B3<> 24A5<> 22B4<> 24A1>
22B4<> 24A5<>
20A4< 20C3> 22C4<> 22B4<>
24B2<> 24D3<>
24B2<> 24D3<>
RESET_N_SHLD
AVIN4 LVL_I2C_SDAAMUX2_COM1
AMUX1_IN
IO12_ICSP_RIO13_ICSP_R
ANALOG_A5
IO0IO1IO2IO3IO4IO5IO6
ANALOG_A5ANALOG_A4
ANALOG_A1ANALOG_A0
ANALOG_A2ANALOG_A3
IO4_R
IO1_R
IO3_RIO2_R
IO0_R
IO5_RIO6_R
IO9_R
IO13_R
IO11_RIO12_R
IO10_R
AREF
AMUX2_NO1AMUX2_IN1
AMUX2_IN2AMUX2_NO2AVIN5 LVL_I2C_SCL
AMUX2_COM2
IO11_ICSP_R IO11IO12IO13RESET_N_SHLD
ANALOG_A4
IO7
ANALOG_A4ANALOG_A5
IO12IO11
IO13
IO8IO9IO10
2178
56
34
21
745
9
674
9
5
3
6
21
8
10
8
21
10
531
642
54
123
678
123456
123456789
10
3BI
BI
TS5A23159
NC2NO2IN2NC1NO1IN1VP
COM1
GND
COM2
IN
OUTBIIN
OUTBIIN
TS5A23159
NC2NO2IN2NC1NO1IN1VP
COM1
GND
COM2
BIBIBIBIBI
BI
BIBIBIBI
1X6RCPT
OUTBIBI
BIBI
SWSPSTPB
BI
CONN6_H18587001
BI
BI
BI
BIBIBIBI
BI
BIBIBI
1X8RCPT
1X8RCPT
1X10RCPT
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
PLACE CLOSE TOINPUT PINS
VO = (R1/R2)*0.8 + 0.8
MAX LOAD: 2.0A
VR1
MAX LOAD: 1.3A
MAX LOAD: 2.1A
NOTE:CURRENT LIMIT
V3P3_S5 @ 2.45A DCV1P5_S5 @ 1.80A DCV1P0_S0 @ 2.50A DC
IHLP1212BZER2R2M11
CR-25 : @GALILEO_LIB.GALILEO(SCH_1):PAGE25
GALILEO Gen2H38681
2.0 SHEET 25 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
2.2UH 3A
DISCRETE
DISCRETE
2.2UH 3A
DISCRETE
2.2UH 3A
0402LF
6800PF25V0402LFX7R10%
10NF
0402LFX7R10%16V
4700PF50V0402LFX7R10%
CH0402LF158K 1%
4700PF
0402LF50V10%X7R
CH0402LF
1%40.2K
1%CH
1/16W
G43225-001IC
0805LF50V0402LF
5%10K
CH0402LF
10%
22UF20%
V3P3_S5
22UF20%
22UF20%
6.3V6.3V6.3V
0805LF
0805LF
C97875-001
X5R0805LF
V1P5_S5
22UF20%6.3VX5RX5R
20%22UF6.3V0805LF
0805LFX5RX5R
1%CH
CH1%
22UF
V1P0_S5
22UF20%20%X5R6.3V
0805LF6.3VX5R
0402LF
4700PF
0402LF
0402LF45.3K
12.7K
40.2K
V3P3_S5
4700PF1%
0402LFX7R10%
10%X7R50V
40.2K
CH
1/16W
10%0805LF
10%10UF
10UF16V
00CH0402LF
VOLTAGE REGULATORS
10%X7R16V
0603LFX7R16V
0603LF
4700PF
0402LF1%147K
0402LF
10%X7R50V
50VX7R
4700PF10%
0402LF
4700PF50VX7R10%
0402LF
1%CH
24.9K0402LF
0402LF
1000PF10%X7R
5%COG
10PF
0402LF0402LF
1000PF
1%CH0402LF
24.9K
10%X7RCOG
0402LF
10PF5%
0402LF
10%X7R
1000PF
CH1%
0402LF24.9K
0402LF
5%10PF
COG
.047UF
1%0402LF180K
.047UFX7R16V
10%
0603LF
0402LF1%180K
1%0402LF147K
.047UF
X5R0805LF16V10%10UF
V5_ALW_ON
0805LFX5R10%16V10UF
0805LFX5R16V10UF10%
L4B1
L2M1
L3A1
C45C2M5C2L7
R2L20
C2L14R2L19
R2M4
R3A18
R4A2
C2L4C2L11C2L6
C3B11
C3B7C3B1
R2M6
C3B9
C3A11R3A16
C2M6
C3B3
C3B4
U3A1
R2M1
C3A18
C3A15
R3A21
C3B6
C3A14
R3A23
C3A17 C3A13
R3B1
C3B2 C3B8C3A12
R3A22
C3A16
C3A19
R3A19
C4A2
R3B2
R4A7
C2L12C2L9C2L8
6A6< 6B6<
25B6<
25D6<
25D7<
25D7<
25C6<
25B6<
25B7<
25A7<
25B3<>
25C7<
25A8<
25A6<
25B3<
25C3<
25B4> 25C4> 25C4>
25B7<
25B3< 25B3<>
25C3<>
25B6< 25B6< 25C6<
VR1_FB3
EN_V1P0_S5
EN_V1P5_S5
EN_V3P3_S5
VR1_FB1
VR1_FB2
BST_V1P5_S5
VR1_COMP2
BST_V1P5_S5
VR1_COMP3_R
S5_PGOOD
BST_V3P3_S5
VR1_COMP1
VR1_COMP3
V3V
V7V
VR1_FB2
VR1_FB1
F_PWM
ROSC_VR
SS1_3
BST1_2
SS1_2
BST1_1
VR1_COMP3
VR1_COMP2_R
VR1_COMP2
VR1_COMP1_R
VR1_COMP1
BST_V1P0_S5
VR1_FB3BST_V1P0_S5 BST1_3
RLIM1_2
RLIM1_3
BST_V3P3_S5
RLIM1_1SS1_1
EN_V1P0_S5EN_V1P5_S5EN_V3P3_S5
1 2
1 2
1 2
1
2
2
2
1
23
1
31
111
2
2
1
22
2
1
221
1
2
1
1
11
2
2
1
2
2
1
21
2928
148
15
27
16
3
17
3637
52630
32333435
41
139
10
1211
7
1822
1920
24
21
382
40
25
4
6
2
2
1
2
1
2
11
22
21
1
22
21
1 1
22
21
1 1
22
21
2
2
1
2
1
39
2
1
2
1
2
1
OUT
1 2
1 2
1 2TPS652510
POWERPAD
EN3BST3
VIN3LX3_2LX3_1
UCUCUCUCUCUC
V3VV7V
PGOOD
UC
F_PWM
FB2
COMP2SS2RLIM2EN2BST2
VIN2LX2_2LX2_1
LX1_2LX1_1
VIN1
BST1EN1RLIM1SS1
COMP1
FB1
ROSC
UCFB3
COMP3SS3RLIM3
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
V1P0_S5 IS GENERATED W ON-BRD REGULATOR
V1P5_S5 IS GENERATED W ON-BRD REGULATOR
CAD NOTE:
V3P3_S5 IS GENERATED W ON-BRD REGULATOR
V1P0_S0 IS GENERATED W ON-BRD REGULATOR
PLACE DECOUPLING CAPS AS CLOSE AS POSSIBLE TO SWITCH PINS
V1P0_S3 IS GENERATED INTERNALLY
CR-26 : @GALILEO_LIB.GALILEO(SCH_1):PAGE26
GALILEO Gen2H38681
2.0 SHEET 26 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
5%CH
10K
0402LF
V3P3_S0V3P3_S5
V3P3_S3V3P3_S5
0402LF
1UF6.3V10%X5R
10%X5R0402LF6.3V1UF
V1P5_S0
IC
10%1UF
X5R6.3V
0402LF
10K
CH5%
0402LF
V1P5_S5
1UF
X5R10%
0402LF6.3V
IC
0402LF
10K
CH5%
0402LF
1UF6.3VX5R10%
1UF10%
0402LFX5R6.3V
V1P5_S3
IC5%
10K
CH
V1P5_S5
IC10K
CH5%
VOLTAGE REGULATORS
0402LF
10%X5R
0402LF6.3V1UF
10%X5R
0402LF6.3V1UF
0402LF
V1P0_S0
1UF6.3V10%X5R0402LF
V1P0_S5
IC
X5R6.3V10%1UF
0402LF
R9
U2M1U2L1
C3B5
C2A1
C2L5
R2L18
U2A2
C2A2
R2A6
C2L13
C2A5
U2A4
R2L2
R2A7
C2L10
C2A4
C8
U5
C7
6A6> 6A6< 28B8< 28C5<
6A6>
6A6> 27C6< 28B7< 6A6> 28A8<
6A6>
S0_1V0_EN
S0_3V3_EN
S0_1V5_ENS3_1V5_EN
S3_3V3_EN
C1
B1
A1
D1
D1
A1
B1
C1
A2
D2
B2
C2
A2
B2
D2
C2
1
2
C1
B1
A1
D1
C1
B1
A1
D1
C2
B2
A2
D2
A2
B2
D2
C2
B1
A1
C1
D1
B2
A2
C2
D2IN
TPS22920
VOUT3VIN3ON
VIN2
GND
VOUT1VOUT2
VIN1
IN
TPS22920
VOUT3VIN3ON
VIN2
GND
VOUT1VOUT2
VIN1
IN
TPS22920
VOUT3VIN3ON
VIN2
GND
VOUT1VOUT2
VIN1
TPS22920
VOUT3VIN3ON
VIN2
GND
VOUT1VOUT2
VIN1
TPS22920
VOUT3VIN3ON
VIN2
GND
VOUT1VOUT2
VIN1
ININ
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
NORMALLY CLOSED
RECOMMENDED POWER SUPPLY: PHIHONG PSA15R-120PV
OPTION TO POWER FROM USB
REFOUT IS INDEPENDENT OF ENABLE PIN
CR-27 : @GALILEO_LIB.GALILEO(SCH_1):PAGE27
GALILEO Gen2H38681
2.0 SHEET 27 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
6.3V
H31893-001
VOLTAGE REGULATORS
0402LFX5R25V0.1UF10%
1 OF 1
0402LF
10V20%
22UF
0402LF
schottky_diodeDB2W31900LDISCRETE
VIN
1UF
X5R0805
57.6K
0402LF
54.9K1%
0402LFCH
0402LF
1210LF
20%16V47UF
X5R20%
10V10%X5R
EMPTY1%
DISCRETE
2.2UH 3A
DB2W31900L
DISCRETEDB2W31900Lschottky_diode
DISCRETE
V5_ALW_ON
0.1UF
CH5%
10K
ICREV=1
VIN_POE
EMPTY0402LF
X5R10%
0805LF25V
CH5%100K
V5_ALW_ON
0805LF0805LF
CH1%10K
0402LF50V10%X7R
A36096-0460402LF
1000PF
1%10K
CH
V1P5_S3
0402LFA93548-034
X7R0805LF
6.3V10%
10UF
V1P5_S0
X7R
10UF10%6.3V0805LF
0603LFX5R
4.7UF10%
V3P3_S5
10%16VX7R
V3P3_S5
VTT
X7R6.3V10UF10%
X7R6.3V10UF
X7R
10UF
0805LFVREF
6.3V10%10%
10.5K1%CH0402LF
3300PF10%50V
ICE17764-001
10UF
V5_ALW_ON
schottky_diode
V5_ALW_ON
10%25V.01UF
0402LFX7R
.01UF10%25VX7R0402LF1210LF
X5R16V47UF
0603LFX5R25V10%1UF
VIN
D33700-002CONN
0402LFX5R25V
0.1UF10%
0402LF25V10%X7R
.01UF
EMPTY10%0.1UF25V0402LF
EMPTY10%0.1UF25V0402LF 0402LF
25V0.1UF10%X5R
0402LF
VCC_USB1
1%
0603LF
49.9K
EMPTY
5%
0402LF
10K
EMPTY
EMPTY
10%10V0.1UF
EMPTY0402LF
RED
0402LFEMPTY5%1K
TPS2552DRV-1EMPTY
C10
C21D3
C3B13
R53
D4
R55
C4B2
L1
D5
U6C18
R2A4
R19
R3L1 C3L1
R4L9
C1A2 C1A1
C3L2 U2A3
C2A3
R54C4B1
C19
C46
C48
C4B3
J4A3
C4B4C35C47C50C49
C3L4 C3L3 C3L7
R49
C3B15
DS1
R48
R58
U29
6A6> 26B3< 28B7<
VIN_D
FB_V5_ALW_ON
PG_V5_ALW_ON
PG_3P3_S5_NU
V5_ALW_ON_D
REFIN_VTT_REG
S0_1V5_EN
V5_ALW_ON_L
USB_PWR_FAULT_N
1 2
21
9
1211
10
13
8
7
1
14
4
5
6
1516
23
17
21
21
2
122
1
1
2
1
2
1
2
1
2
1
2 2
1 1
7
11
48
6
2
1
2
10 9
3
5
2
1
22
11
2
1
1
23
1
16
57
2
34
1 2
TPS62130
SS/TR
PVIN_12PVIN_11AVIN_10
EN
DEFFSW
SW
VOSPG
FB
AGNDPGND_15PGND_16
SW_2SW_3
EPAD
GNDTHPAD
ILIMOUT
EN_N
IN
FAULT_N
PWR_JACK
1
23
IN
TPS51200
VINVLDOIN
EN
REFIN
THPPGND
GNDREFOUT
VOSNSVO
PGOOD
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3
REBOOT BUTTON
PG DELAY
PG DELAY
PLACE AT LED AREA
V3P3_RTC
PUT THE SILKSCREEN NEXT TO THE CAP
LABEL "+" AND "-" TERMINALS ON 2 PIN HDR
OFF-BOARD BATTERY
CAD NOTE:
CAD NOTE:
SS:
VOL:0.15V
NOTE: RESET_N HAS AN INTERNAL PU TO V3P3_S3
SS:
VOH:2.25V
CAD NOTE:
CR-28 : @GALILEO_LIB.GALILEO(SCH_1):PAGE28
GALILEO Gen2H38681
2.0 SHEET 28 OF 28
2111 NE 25TH AVENUEHILLSBORO OR 97124
0402LFX5R6.3V10%1UF
1%
0402LF
0402LF1/16W
V3P3_RTC
C52251-001
00EMPTY0402LF
V3P3_S5
3305%CH
LEDGREEN
.1UF
0402LFEMPTY16V10%
POWER BUTTONS & MISC
.1UF10%EMPTY16V
BAT54CDIO
HDR
1/16W0402LF
1K1%CH
24.9K1%CH0402LF
0402LF
0.1UF
X7R16V10%
SWD90553-001
0.1UF
X7R16V0402LF
10%
CH0402LF
24.9K
0402LFCH
24.9K1%
0.1UF
0402LF
10%16VX7R
DS4A1
R3A9
CR3A1
R4A9
C3A9C3A8
J3A1
R3A11
R16
C11
S1A1
C4L1
C3A5
R3A1
R3A2
C3A6
6A6<
6A6> 6A6< 26A8< 28B8<
6A6< 6B6<
6A6> 26B3< 27C6<
6B6<
6A6> 6A6< 26A8< 28C5<
6A6<
6A6> 26B5<
PG_V1P0_S0
S0_1V0_EN_LED
S0_1V0_EN
BAT_DIO
BAT_POS
S0_PGOOD
S0_1V5_EN
RESET_N
S0_1V0_EN
S3_PGOOD
S3_1V5_EN
3
2
2
22
2
1
1
2
2
1
SOT23C
IN
OUT
IN
IN
OUT
OUT
IN
1X2HDR
OUT
SWSPSTPB
INTEL CORPORATION
REV:
DOCUMENT NUMBER:TITLE:
7
1
DD
2 1345
8
A
B
67
A
45
C
B
C
8
2
6
3