ELEVATOR CONTROL CIRCUIT - University of...

Post on 30-Apr-2019

259 views 4 download

Transcript of ELEVATOR CONTROL CIRCUIT - University of...

ELEVATOR CONTROL CIRCUIT

Project No: PRJ045Presented by;Masila Jane Mwelu

Supervisor: Prof. MwangiExaminer: Dr. Mang’oli

Presentation Outline

n Project objectivesn Design approachn Implementationn Resultsn Conclusionn Recommendation

Objective

To design and simulate a controller for an elevator that serves three floors, using small scale integration(SSI) and medium scale integration(MSI) logic modules as a sequential logic circuit.

Design approach

n Algorithmic state machine(ASM) methodology has been employed in the design. The method describes the problem statement in a flow chart and allows the circuit to be divided into two parts a;

Ø Data processor partØ Controller partn ASM method is used due to the presence

of large number of inputs.

Implementation

Design specification

n The controller responds to request from each floor.

n When the elevator lands on a given floor, signals are generated from the sensor switches.

n The control logic generates signals to move the elevator up or down, and to open or close the door.

n Display logic indicates the current floor number.

Block diagram of the elevator

Control logic

Displaylogic

D2/X2

UP1/X1

UP0/X0

OPEN

CLOSE

Outputs

7- segmentfloor display

Inputs

ASM chart of the ControllerThe flow chart is composed of:

n State box – Represents the state in which the system is in.

n Decision box – Describes the effect of an input on the control sudsystem.

n Conditional box – Within the box are one or two register operations which take place during the next raising clock edge.

State GRDn CLOSE=1; counter is cleared and the door

is closedn OPEN=1; counter continues to count while

the door is openn UP0 or X0=1; system remains in State

GRDn UP1 or D1 or X1=1; System goes to state

FIRn D2 or X2=1; system goes to state SEC

State FIRn CLOSE=1; counter is cleared and the door

is closedn OPEN=1; counter continues to count while

the door is openn UP0 or X0=1; system goes to State GRDn UP1 or D1 or X1=1; System remains in

state FIRn D2 or X2=1; system goes to state SEC

State SEC

n CLOSE=1; counter is cleared and the door is closed

n OPEN=1; counter continues to count while the door is open

n UP0 or X0=1; system goes to State GRDn UP1 or D1 or X1=1; System goes to state

FIRn D2 or X2=1; system remains in state SEC

Timing Sequence

n Timing in all the flip-flops in the controller is controlled by a clock.

n Each block in the ASM chart describes the state of the system during one clock pulse interval.

n Change from one state to the next is performed in the control logic.

ASM chart for the Controller

Datapath

Performs the data processing operation.The requirements for the design of the Datapath

are specified inside the;Ø State boxesØ Conditional boxes

The Datapath consists of;Ø A pulserØ CountersØ Gates

State table for the controller

Present StateYsf Yff Ygf

InputsCLOSE UP0 X0 UP1 DI X1 D2 X2

Next StateYsf Yff Ygf

OutputsSEC FIR GRD

0 0 1 X X X 0 0 0 0 0 0 0 1 0 0 1

0 1 0 1 1 1 0 0 0 0 0 0 0 1 0 1 0

1 0 0 1 1 1 0 0 0 0 0 0 0 1 1 0 0

0 0 1 1 0 0 1 1 1 0 0 0 1 0 0 0 1

0 1 0 X 0 0 X X X 0 0 0 1 0 0 1 0

1 0 0 1 0 0 1 1 1 0 0 0 1 0 1 0 0

0 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0 1

0 1 0 1 0 0 0 0 0 1 1 1 0 0 0 1 0

1 0 0 X 0 0 0 0 0 X X 1 0 0 1 0 0

Control logicBy inspecting the state table, the next

states are equal to the inputs. Thus the input equations are taken directly from the state table.

D flip-flops were used in the design due to ease in formulating the design equations.

Display logicA decoder was used to produce the outputs

to a 7-segment display.

Control logic diagram

Results and Discussion

n The simulation software used was Circuit maker pro which has most of SSI and MSI components.

n Push buttons were simulated as logic switches and the output indicators used were;

Ø Logic displaysØ Seven-segment display

Tabulated results for the controllerPresent

StateQ3 Q2 Q1

InputsX0,UP0,X1,UP1,D1,X2,D2

OutputsQ3 Q2 Q1 Details

0 0 1 X0 or UP0 0 0 1Elevator remains on

ground floor

0 0 1 X1 or UP1 or D1 0 1 0Elevator is raised to

immediate floor up

0 0 1 X2 or D2 1 0 0 Elevator jumps one floor up

0 1 0 X1 or UP1 or D1 0 1 0Elevator remains on first

floor

0 1 0 X1 or UP1 0 0 1 Immediate floor down

0 1 0 X2 or UP2 1 0 0 Immediate floor up

1 0 0 X0 or UP0 0 0 1Elevator jumps one floor

down

1 0 0 X1 or UP1 or D1 0 1 0Elevator goes to immediate

floor down

1 0 0 X2 or UP2 1 0 0Elevator remains on

second floor

Display logic response

OutputsQ3 Q2 Q1

Display Details

0 0 1 Display a “0”

0 1 0Display a “1”

1 0 0 Display a “2”

Conclusion

Ø Adopting the ASM procedure simplified the design.

Ø Design with D flip-flop proved simple and clear.

Ø The results obtained from simulation agreed with the theoretical expectation.

Recommendations for further work.

The proposed controller can be extended as part of future study into;

Ø Implementation of the hardware.Ø Implementing special dispatching strategies

such as bypassing floor calls when the elevator is full.

Ø The elevator controller design can solved by use of micro-processor based controller.

THANK YOU