Design And Simulation of Modulation Schemes used for FPGA Based Software Defined Radio

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Transcript of Design And Simulation of Modulation Schemes used for FPGA Based Software Defined Radio

 

Presented by 

SUCHARITA SAHAReg No. – 131300410009

Under the guidance of 

Mr. SHREEDEEP GANGOPADHYAYAssistant Professor, ECE Dept.

 

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERINGEM-4/1, Sector-V, Salt Lake,

Kolkata-700091 2013-2014

Design and Simulation of Modulation Schemes Used for FPGA based

Software Defined Radio

Problems with Current Technology & Proposed Solutions

Objective of this Project Relevance To VLSI Design Basic Modulation System Software Defined Radio(SDR) Design and simulation of proposed architectures of

BPSK and QPSK Importance of the Project Observation Conclusion Plan for future

Contents

Problems with Current Technology

• Cell phone communication standards change every few years

• Satellite ground station would like to listen to multiple spacecraft

• Spectrum space is a precious resource

Proposed Solutions

Software-Defined Radio

Flexible radio systems that allow communication standards to migrate

Reconfiguring a radio in software

Communicate via different protocols at different times 

Objective of this Project

To create various modulations schemes (BPSK/QPSK) system for SDR using Hardware Co-Simulation with VHDL targeting a Spartan 3E FPGA device and to verify using MATLAB System Generator.

To implement this design in the reconfigurable architecture ( FPGA ) for real time data communication.

Relevance to VLSI design

The project is targeted on FPGA based embedded system. FPGA itself is a VLSI chip. VLSI design can be broadly classified into three domain. – Behavioral, Structural, Physical An embedded system is nearly any computing system which – Single‐functioned – Tightly constrained – Reactive and real‐time – Hardware and software co-existence

Basic Modulation System

Software Defined Radio(SDR)

Radio in which some or the entire physical layer functions are software defined.

AM/FM Simulink output

Cont.

Cont.

Design and simulation of proposed architectures of BPSK and QPSK

Binary Phase Shift Keying

BPSK has only two phases of the carrier, at the same frequency, but separated by 180º.

BPSK modulator in System Generator environment

BPSK modulator output in System Generator environment

Cont.

Simulink model of BPSK modulator

Simulink model output of BPSK modulator

Simulink model of BPSK modulator using MATLAB Embedded function

Simulink model of BPSK modulator output using MATLAB Embedded function

BPSK modulator in System Generator environment

BPSK modulator Output in System Generator environment

Xilinx Spartan-3E FPGA Starter Kit Board Hardware used : RS232 cable for UART Xilinx Platform USB cable Compact Flash reader (to load programs into the compact

flash)

Software needed :

1. Xilinx ISE Design Suite (version 14.2 is used here) 2. MATLAB (version 2011b is used here)

Hardware needed:

Picture of the XILINX Spartan-3E FPGA Starter Kit Board

Field-Programmable Gate Arrays (FPGA)

Logic blocks

◦ to implement combinational

and sequential logic

Interconnect

◦ wires to connect inputs and

outputs to logic blocks

I/O blocks

◦ special logic blocks at periphery

of device for external connections

Hardware Software Co-simulation of BPSK Modulator

Hardware Software Co-simulation of BPSK modulator Output

Quadrature Phase Shift Keying

DemultiplexerBipolar NRZ level encoder

Adder

Binary data

sequence

b(t)

be(t)

bo(t)

√Ps(cos2пfct)

√Ps(sin2пfct)

Se(t)

So(t) QPSK signal

S(t)

Modulated SignalSe(t) = be(t) √Ps(sin2пfct)So(t) = bo(t) √Ps(cos2пfct)

QPSK signalS(t) = So(t) + Se(t)

Quadrature Phase Shift Keying

b(t)

bo(t)

√Ps(cos2пfct)

So(t)

S(t)

√Ps(sin2пfct)BPSK signal

QPSK Output of MATLAB Programming

QPSK Output of MATLAB Programming

QPSK Output of MATLAB Programming

QPSK modulator in System Generator environment

QPSK modulator Output in System Generator environment

Sub-system of QPSK modulator in System Generator environment

Sub-system Output of QPSK Modulator in System Generator environment

Hardware Software Co-simulation of QPSK Modulator

Hardware Software Co-simulation of QPSK Modulator Output

Observation

The biggest reason to have a Software Defined Radio is the flexibility it offers the user.

Filtering can easily be changed, depending on the needs Modes of operation can be changed to accommodate

new communications technologies All of these functions are controlled in Software, rather

than Hardware, making changes simpler (no new filters/hardware demodulators required- the code takes care of it)

In this system different modulation methods have been studied, analog modulation methods and digital methods using MATLAB Simulink and System Generator platform.

We have designed the Graphical User Interface(GUI) for these analog modulation techniques .

Finally we have shown the hardware co-simulation of two demanding variants of PSK i.e. the BPSK Modulator and the QPSK Modulator for demonstration of modulator for SDR and other Wireless standards. in the MATLAB/Simulink environment using Xilinx System generator.

Conclusion

To implement this design in the reconfigurable architecture ( FPGA ) for real time data communication.

Using this design a SDR system with antenna for transmission and reception of data can be made.

Plan for Future

References 1. Tobias Becker, “Parametric Design for Reconfigurable Software

Defined Radio ”.2. Mitola J, The software radio architecture, communications magazine3. Software Defined Radio Forum, 2007 http://www.sdrforum.org4. P. B. Kenington “RF and Baseband Techniques for Software

Defined Radio”, 2005 :Artech House5. Pentek, “software Defined Radio Hand book”.6. Xinyu Xu, “Analysis and Implementation of Six Port Software defined Radio Receiver Platform” IEEE7. Ronan Farrell, “Software Defined Radio Demonstrators: An Example and Future trends”.8. Tuttlebee, “software defined radio Enabling technologies”, Wiley

Chichester (2002)9. A.A.Abidi, “The path to the software defined radio receiver”, solid state circuits, IEEE J, vol. 42, no. 5

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