Day 4 Successful Entrepreneurship for Microsystems · Successful Entrepreneurship for Microsystems...

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1 ©2014 TCX Inc

Successful Entrepreneurship

for Microsystems

Rakesh Kumar, Ph.D., Life Fellow IEEE

October 23, 2014

rakeshk@eng.ucsd.edu

rakesh@tcxinc.com

858.945.3758

Teaching assistant – Sneha Venkatesh Yelimeli (“Sneha VY”) svyelime@eng.ucsd.edu

Course presented at UCSD CSE 190, Fall Quarter 2014

Day 4-2

2 ©2014 TCX Inc

“DOOM and GLOOM”

BAU

1

“EXCITING Times”

Must ADAPT,

INNOVATE,

Be ENTREPRENEURIAL

2

after “Let’s Make a Deal”

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Changes are coming at an amazingly RAPID rate!

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On the Metro in Shenzen, China, October 28, 2013

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Design

Process

Package

Board

Product Semiconductors drive the Electronics food chain

Software

Let’s educate the people around us, …about our complex business

Die/Dice Chip

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Design

Process

Package

Board

Product

Software

Let’s educate the people around us, …about our complex business

Electronics Value Chain …Smartphones

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Smartphones – Looking Inside

Soure: iFixit iPhone5

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MANY Levels of Innovation

Software Display Antenna

Touchscreen Processor

Radio/RF Front End Sensors

… …

Soure: iFixit iPhone5

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Some Market Opportunities

History

…and some food for thought!

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The Largest Platform in the History of Mankind

Wireless

Mobile

Computing

Social Media

Mobile Wireless Evolution

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Ref: Qualcomm Analyst Day, November 20,2013

A Qualcomm View….

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Ref: Qualcomm Analyst Day, November 20,2013

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Ref: Qualcomm Analyst Day, November 20,2013

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Ref: Qualcomm Stockholder Meeting, March 4, 2014

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Expanding Application Areas

Ref: Qualcomm Stockholder Meeting, March 4, 2014

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Ref: Qualcomm Stockholder Meeting, March 4, 2014

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The New Paradigm

Mobile Connected Smarter..

The “Internet of Things”

Sensors everywhere… Healthcare

Digital Home Green Energy

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The Internet of Things (IoT)

Ref: Qualcomm Stockholder Meeting, March 4, 2014

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Ref: Qualcomm Stockholder Meeting, March 4, 2014

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The Skyworks View…

Ref: Skyworks, Investor Presentation 2014

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Healthcare applications…

PEDOMETER

BLOOD PRESSURE PULSE

GLUCOMETER

ECG SMART

BANDAGES

SMART PILLS OR INTERNAL SENSORS

WEIGHT BODY COMPOSITION

ENVIRONMENTAL SENSORS

Taking charge …many Sensors

Source: University of Michigan, Feb 2011

Millimeter-Scale Computer for Glaucoma Patients:

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Digital 6th Sense… Augmentation of human ability

KNOW the LOCATION

SENSE the user’s MOTION

SEE the user’s ENVIRONMENT

HEAR the user’s SURROUNDINGS

Ref: Qualcomm Analyst Day, November 20,2013

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Ref: Qualcomm Analyst Day, November 20, 2013

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Good news for Start-ups!

Ref: Qualcomm Analyst Day, November 20, 2013

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Market Drivers

Industry Directions & Challenges

History

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Smartphones drive diverse technologies

User Experience

Low Cost

Battery Life Low Power

Compact

Performance Architecture, SW, Design, …

FC + WB stack

TSV + FC stack TSV system stack

More Moore

More than Moore

MEMS Sensors

Ultrabook PCs also drive diverse technologies

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0.001

0.01

0.1

1

10

100

1000

1970 1975 1980 1985 1990 1995 2000 2005 2010

Year Source: IC Knowledge, ISSCC, TCX

Tra

nsis

tors

per

Ch

ip, M

Min

imu

m F

eatu

re S

ize, u

m

More Moore

…Transistor complexities have doubled every 2 years

System Co.’s – IBM, Hitachi, Sony, Philips, Unisys,…

Semiconductor Co’s – Fairchild, T.I., Motorola, National, Intel, Toshiba, …

Fabless Co.’s

MF µP PC iNet Cellular

+43% / year

Moore’s Law 2x / 12mos…1965-70 2x / 18mos,,,1970-90’s

2x / 24mos…now

-13% / year

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ECONOMIC challenges are threatening

Increased Cost of Capital, R&D, Design

Sources: imec Sematech intel tsmc umc asml

McKinsey & Company 4

Working D

raft -Last Modified 4/18/2011 11:19:18 A

MP

rinted 10/13/2010 8:56:28 PM

|

Costs associated with node progression have been rising significantly

6,700

4,850

4,000

2,500

1,800

1,450

22nm32nm45nm65nm90nm130nm

+36% p.a.

Fab cost

$ Millions

Process development cost

$ Millions

Chip design cost including fabless

overhead costs*

$ Millions

SOURCE: Press Reports; iSuppli; ICKnowledge; GSA; WorldFabWatch; ITRS

Estimated

cost CAGR

Percent

16 18 17 21 25 25

1,300

900

600

400

310250

22nm32nm45nm65nm90nm130nm

+39% p.a.

150

100

60

34

24

15

22nm32nm45nm65nm90nm130nm

+58% p.a.

* Chip design cost includes product R&D cost (design, verification & photomask) and other fabless costs (overhead, IP licensing, etc.)

>30% ~40% ~60%

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Top View Bottom View

0.2 (8 mils)

0.650.9 mm

max

0.05 (2 mils) 0.025 (1 mils)

0.075 (3 mils)

a

b

Die

Cu Leadframe

WirebondMold

Compound

Die Attach

Material

Source: ASE

Top View Bottom View

0.2 (8 mils)

0.650.9 mm

max

0.05 (2 mils) 0.025 (1 mils)

0.075 (3 mils)

a

b

Die

Cu Leadframe

WirebondMold

Compound

Die Attach

Material

0.2 (8 mils)

0.650.9 mm

max

0.05 (2 mils) 0.025 (1 mils)

0.075 (3 mils)

a

b

Die

Cu Leadframe

WirebondMold

Compound

Die Attach

Material

Source: ASE

Typical QFN Package

QFN: Qual Flat-pack No-lead

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PNP

PMIC

Spacer

Die #1 Die #2

Stacked Packages

Side-by-Side

Stacked Chips

Source: IMEC

3D Stacked IC’s

Innovative Packaging Examples for Reducing Form Factor

IDM

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HTC Desire Smartphone uses Qualcomm’s MSM 8255

HTC Desire HD

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Source: ASESource: ASE

4-die stack BGA package

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Source: STATS chipPAC

4-die stack

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An example ASIC* Development Cycle

ASIC DESIGN Proto Prod Ramp Hi Volume

Year 0 Year 1 Year 2

Software α

Software β

Software Prod.

Initial Silicon

Initial Silicon Ramp

Initial Product Ramp

Volume Production

Start Design Tapeout ESProd

HW/SW LaunchQS

FPGA

Ref Board

SW

* ASIC: Application Specific Integrated Circuit